CN210325728U - Silicon chip coating film carrier - Google Patents
Silicon chip coating film carrier Download PDFInfo
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- CN210325728U CN210325728U CN201920994032.6U CN201920994032U CN210325728U CN 210325728 U CN210325728 U CN 210325728U CN 201920994032 U CN201920994032 U CN 201920994032U CN 210325728 U CN210325728 U CN 210325728U
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Abstract
The utility model provides a silicon wafer coating carrier, which comprises a bearing plate and a plurality of bearing holes arranged on the bearing plate; the bearing plate comprises a parting strip positioned between adjacent bearing holes and a frame positioned at the edge of the bearing plate; the hole wall of the bearing hole on the parting strip comprises a first bearing part corresponding to the side edge of the silicon wafer and a second bearing part corresponding to the top angle or chamfer angle of the silicon wafer; the first bearing part comprises a first sinking section and a first inclined section, and the first sinking section vertically extends downwards from the upper surface of the bearing plate; the first inclined section extends along the direction from the tail end of the first sinking section to the center of the bearing hole; the second bearing part comprises a second sinking section and a second inclined section, and the second sinking section extends downwards from the upper surface of the bearing plate; the second inclined section extends along the direction from the tail end of the second sinking section to the center of the bearing hole; the sinking depth of the second sinking section is greater than that of the first sinking section. Because the utility model discloses can compatible right angle and chamfer silicon chip, consequently have low in production cost and efficient advantage.
Description
Technical Field
The utility model relates to a silicon chip coating film technical field especially relates to a silicon chip coating film carrier.
Background
Generally, a single/polycrystalline silicon wafer needs to be coated with a film by using a coating device to form some functional layers, for example, a dielectric film passivation treatment is performed on the back surface of the single/polycrystalline silicon wafer, so that the electron recombination speed of the back surface of the silicon wafer is effectively reduced, and the light reflection of the back surface of the silicon wafer is improved. During film coating, a carrier is needed to support the silicon wafer.
Because the silicon wafers in the current market are mainly chamfered silicon wafers, the traditional silicon wafer coating carrier can only bear the chamfered silicon wafers. At present, a right-angle silicon wafer is also appeared, and the right-angle silicon wafer has advantages in the aspects of improving conversion efficiency and reducing production cost, and has been applied to industrial production as a feasible scheme. Therefore, the production line has a production mode of simultaneously chamfering silicon wafers and right-angle silicon wafers for a long time recently.
However, the traditional coating carrier cannot meet the bearing requirements of the right-angle silicon wafer, and the coating carrier which is designed independently and is suitable for the right-angle silicon wafer is not suitable for the chamfering silicon wafer, so that the coating carrier cannot be suitable for the production line in which the chamfering silicon wafer and the right-angle silicon wafer exist at the same time.
SUMMERY OF THE UTILITY MODEL
To the above problem, the utility model aims at providing a can both be suitable for the chamfer silicon chip, be suitable for the silicon chip coating film carrier of right angle silicon chip again.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a silicon wafer coating carrier comprises a bearing plate, wherein a plurality of bearing holes are formed in the bearing plate; the bearing plate comprises a parting strip positioned between adjacent bearing holes and a frame positioned at the edge of the bearing plate; the hole wall of the bearing hole on the parting strip comprises a first bearing part corresponding to the side edge of the silicon wafer and a second bearing part corresponding to the top angle or chamfer angle of the silicon wafer; the first bearing part comprises a first sinking section and a first inclined section, and the first sinking section vertically extends downwards from the upper surface of the bearing plate; the first inclined section extends along the direction from the tail end of the first sinking section to the center of the bearing hole; the second bearing part comprises a second sinking section and a second inclined section, and the second sinking section extends downwards from the upper surface of the bearing plate; the second inclined section extends along the direction from the tail end of the second sinking section to the center of the bearing hole; the sinking depth of the second sinking section is greater than that of the first sinking section.
By adopting the technical scheme, when the bearing hole bears the chamfered silicon wafer, the side edge of the chamfered silicon wafer is supported by the first inclined section of the first bearing part, and the chamfered part of the silicon wafer corresponds to the second bearing part, so that the chamfered silicon wafer is borne. When bearing the weight of the right angle silicon chip in the carrier hole, because the sunken degree of depth that the second sunken section corresponds is greater than the sunken degree of depth that first sunken section corresponds, the apex angle of right angle silicon chip can be held, and the apex angle of right angle silicon chip is unsettled state, the apex angle department of bearing the weight of the hole promptly and the apex angle department of right angle silicon chip contactless, can not cause destruction such as fish tail to right angle silicon chip when placing right angle silicon chip, consequently, the carrier that this scheme relates to can be suitable for the chamfer silicon chip, also can be suitable for right angle silicon chip, in the production, when needing to switch the silicon chip type, need not to switch the carrier thereupon, consequently, it is compatible good, high production efficiency and. In addition, the contact between the silicon wafer and the first inclined section is line contact, so that compared with the surface contact of the existing carrier, the damage of the contact part to the silicon wafer can be reduced, and the yield of the silicon wafer is improved.
Preferably, an avoiding pit for avoiding the top angle of the silicon wafer is formed in the bearing plate; the avoiding pit is positioned at the top angle of the bearing hole.
By adopting the technical scheme, the avoiding pits arranged on the bearing plates corresponding to the top corners of the bearing holes can avoid the silicon wafer top angles, even if the right-angle silicon wafer is rocked or displaced, the collision between the silicon wafer top angles and the parting beads can be avoided, and finally the damage of the parting beads to the silicon wafer top angles is avoided.
Preferably, the avoiding pit is a circular arc pit.
Preferably, the diameter of the circular arc-shaped pit is 2 mm to 10 mm.
Preferably, the first sinking section has a sinking depth of 0.8 to 1.5 mm; the second sinking section has a sinking depth of 1.7 to 2.0 mm.
Preferably, the first inclined section has an inclination angle of 20 to 30 degrees.
By adopting the technical scheme, the silicon wafer is moderate in the upper and lower positions in the bearing hole, and is convenient to take and place; and simultaneously, the winding plating can be avoided.
Preferably, the first bearing part and the second bearing part are in smooth transition.
By adopting the technical scheme, smooth transition is adopted, damage to the silicon wafer corresponding to the intersection of the first bearing part and the second bearing part can be avoided, and the yield of the silicon wafer is further improved.
Preferably, the hole wall of the bearing hole on the frame is different from the hole wall of the bearing hole on the division bar in structure.
Preferably, the end of the first inclined section and/or the second inclined section coincides with or is located above the lower surface of the carrier plate.
Preferably, the carrier holes are distributed in a matrix.
To sum up, the utility model provides a silicon chip coating film carrier can be applicable to right angle silicon chip and chamfer silicon chip simultaneously, when the type of coating film silicon chip changes, need not to change the carrier, consequently can promote coating film efficiency, reduce the coating film cost.
Drawings
Fig. 1 is a schematic view of an overall structure of a coating carrier according to an embodiment of the present invention;
fig. 2 is a schematic overall structure diagram of a bearing hole according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view taken along line D-D of FIG. 2;
FIG. 4 is a sectional view taken along line E-E of FIG. 2;
fig. 5 is a schematic top view of the top corner of the carrying hole provided in this embodiment.
Wherein: 10. the bearing plate comprises a bearing plate body, 11 bearing holes, 110, a first bearing part, 1100, a first sunken section, 1101, a first inclined section, 111, a second bearing part, 1110, a second sunken section, 1111, a second inclined section, 12, a division bar, 13, a frame and 14, and an avoidance pit.
Detailed Description
The following description of the embodiments according to the present invention is made with reference to the accompanying drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those specifically described herein, and the present invention is not limited to the specific embodiments disclosed below.
The utility model provides a silicon wafer coating carrier of a first embodiment, refer to fig. 1 to 4 specifically, it includes the loading board 10, a plurality of bearing holes 11 that set up on the loading board 10, the loading board 10 includes the parting bead 12 that is located between the adjacent bearing holes 11, and the frame 13 that is located the edge of loading board 10; the hole wall of the bearing hole 11 on the parting strip 12 comprises a first bearing part 110 corresponding to the side edge (not shown in the figure) of the silicon wafer and a second bearing part 111 corresponding to the top angle or chamfer angle of the silicon wafer; the first carrier part 110 includes a first sunken section 1100 and a first inclined section 1101, the first sunken section 1100 vertically extending downward from the upper surface of the carrier plate 10; the first inclined section 1101 extends along the end of the first sunken section 1100 towards the center of the bearing hole 11; the second carrier part 111 includes a second sinking section 1110 and a second tilting section 1111, the second sinking section 1110 extends downward from the upper surface of the carrier plate 10; the second inclined section 1111 extends along the end of the second sinking section 1110 towards the center of the bearing hole 11; the second dip section 1110 has a dip depth greater than the dip depth of the first dip section 1100.
In this embodiment, the number of the bearing holes 11 is adapted to the number of the silicon wafers carried at a time, and the shape of the bearing holes 11 is substantially adapted to the shape of the silicon wafers carried. The division bars 12 are naturally formed between adjacent carrying holes 11.
For convenience of description, the bearing holes 11 are divided into two types, one is the bearing hole 11 located at the middle of the bearing plate 10, and the other is the bearing hole 11 located at the edge of the bearing plate 10. The hole wall of the bearing hole 11 in the middle is formed by the side wall of the division bar 12, and the hole wall of the bearing hole 11 in the edge is formed by the inner wall of the frame 13 and the side wall of the division bar 12.
The first bearing part 110 and the second bearing part 111 are located on the hole wall of the bearing hole 11 formed by the side wall of the division bar 12, wherein the first bearing part 110 corresponds to the side face of the silicon wafer, the second bearing part 111 corresponds to the top angle or chamfer angle of the silicon wafer, the first bearing part 110 and the second bearing part 111 both sink first and then chamfer, that is, the first bearing part 110 correspondingly has a first sinking section 1100 and a first inclined section 1101, and the second bearing part 111 relatively has a second sinking section 1110 and a second inclined section 1111. The purpose of making the sinking design for the first bearing part 110 and the second bearing part 111 is that after the silicon wafer is placed in the bearing hole 11, the silicon wafer is equivalently "embedded" in the bearing hole 11, that is, the first sinking section 1100 and the second sinking section 1110 have a certain protection effect on the edge of the silicon wafer, and can avoid the silicon wafer from being plated around in the plating process.
After the silicon wafer is placed in the bearing hole 11, the silicon wafer is carried by the first inclined section 1101, and since the first inclined section 1101 is inclined, the silicon wafer is in line contact with the first inclined section 1101. Compared with the surface contact of the existing carrier, the silicon wafer carrier has the advantages that the contact area is small, the damage risk of the contact part to the silicon wafer is reduced, and the yield of the silicon wafer is favorably improved.
Moreover, because the sunken degree of depth of second sunken section 1110 is darker than the sunken degree of depth of first sunken section 1100, place behind bearing hole 11 when the silicon chip, especially the apex angle of right angle silicon chip is unsettled state, and the apex angle department of bearing hole 11 and the apex angle department of right angle silicon chip do not contact promptly, can not cause destruction such as fish tail to the right angle silicon chip when placing the right angle silicon chip, and the apex angle department of silicon chip is unsettled to be favorable to getting and putting the silicon chip. When the chamfering silicon wafer is placed, the chamfering part of the silicon wafer is in a suspended state corresponding to the second bearing part 111, and the chamfering part of the second bearing part 111 corresponding to the chamfering silicon wafer has abundant taking and placing space, so that the chamfering part of the chamfering silicon wafer cannot be damaged when smooth taking and placing is ensured. Therefore, the carrier related to the embodiment can be suitable for both the chamfer silicon wafer and the right-angle silicon wafer, and in production, when the type of the silicon wafer needs to be switched, the carrier does not need to be switched, so that the carrier has the advantages of good compatibility, high production efficiency and low production cost.
On the basis of the above embodiment, further, as shown in fig. 5, an avoiding pit 14 for avoiding a silicon wafer vertex angle or chamfer is formed on the bearing plate 10; the escape pockets 14 are located at the top corners of the bearing holes 11. That is, the escape recess 14 is formed at the intersection between the frame 13 and the division bar 12 and at the intersection between the division bar 12 and the division bar 12. The avoiding pit 14 can avoid the silicon wafer top angle, so that even if the right-angle silicon wafer shakes or displaces, the collision between the silicon wafer top angle and the parting bead 12 can be avoided, and finally, the damage of the parting bead 12 to the silicon wafer top angle is avoided.
The shape of the avoidance pit 14 is preferably circular arc, and the inner wall of the circular arc avoidance pit 14 is smooth and has no bulge or transition part, so that the damage to the silicon wafer during the taking and placing of the silicon wafer can be further avoided.
Furthermore, the diameter of the arc-shaped groove is selected to be any value between 2 mm and 10 mm, so that the bearing strength of the whole bearing plate 10 can be prevented from being weakened, the silicon wafer corners can not be subjected to winding plating, and a good avoiding effect can be achieved.
Of course, it is understood that the shape and size of the avoiding recess 14 may not be limited specifically as long as the avoiding recess is capable of achieving the avoiding, and even the avoiding recess 14 may penetrate through the upper surface and the lower surface of the bearing plate 10 to form the avoiding through hole.
Further preferably, the first sinking section 1100 has a sinking depth of 0.8 to 1.5 mm; the second sinking section 1110 has a sinking depth of 1.7 mm to 2.0 mm. Therefore, the silicon wafer can be better carried and the problem of plating winding can be avoided. Of course, the sinking depths of the first sinking section 1100 and the second sinking section 1110 are not limited to the above numerical ranges, and can be designed or selected according to the requirements of the actual silicon wafer.
On the basis of the above embodiment, further, the inclination angle of the first inclined section 1101 is 20 degrees to 30 degrees. The silicon chip is moderate in the upper and lower positions in the bearing hole 11, so that the silicon chip is convenient to take and place; and simultaneously, the winding plating can be avoided.
It should be noted that the inclination angle of the first inclined section 1101 is a dihedral angle formed by a plane of the first inclined section 1101 and a plane of the front surface of the carrier plate 10. Similarly, the inclination angle of the second inclined section 1111 is a dihedral angle formed by the plane of the second inclined section 1111 and the plane of the front surface of the carrier plate 10.
The angle of inclination of the second inclined section 1111 is not particularly limited.
On the basis of the above embodiment, further, the first bearing part 110 and the second bearing part 111 are in smooth transition. Because the sinking depth of the first sinking segment 1100 corresponding to the first bearing part 110 is shallower than that of the second sinking segment 1110 corresponding to the second bearing part 111, that is, a transition section from the first sinking segment 1100 to the second sinking segment 1110 needs to be provided, in this embodiment, a smooth transition is adopted, that is, the transition section is an arc section. By adopting smooth transition, damage to the silicon wafer corresponding to the intersection of the first bearing part 110 and the second bearing part 111 can be avoided, and the yield of the silicon wafer is further improved. Of course, the transition section may also adopt other transition modes of non-circular arc section.
In addition to the above embodiments, the hole wall of the bearing hole 11 on the frame 13 is different from the hole wall of the bearing hole 11 on the division bar 12 in structure. The hole walls of the bearing holes 11 on the division bars 12 include a first sunken section 1100, a first inclined section 1101, a second sunken section 1110 and a second inclined section 1111, that is, the hole walls are sunken first and then inclined, and then can be inclined to the lower surface of the bearing plate 10 or vertically sunken to the lower surface of the bearing plate 10. The hole wall of the bearing hole 11 on the frame 13 may not include a sunken section, but is inclined from the upper surface of the frame 13 to the lower surface of the frame 13 directly toward the center of the bearing hole 11. Therefore, the problem of inconsistent coating colors caused by the edge effect of coating can be avoided for the battery piece positioned at the edge.
Of course, the hole wall structure of the bearing holes 11 on the frame 13 may also be the same as the hole wall structure on the division bars 12.
On the basis of the above embodiment, further, the end of the first inclined section 1101 and/or the second inclined section 1111 coincides with the lower surface of the loading plate 10 or is located above the lower surface of the loading plate 10. That is, the first inclined section 1101 and/or the second inclined section 1111 may be inclined to the bottom in unison, or may be inclined to sink vertically to the bottom. When vertically sunk to the bottom after being tilted by one section, the width of the first tilted section 1101 and/or the second tilted section 1111 is preferably 1 mm to 3 mm.
On the basis of the above embodiment, further, the carrier plate 10 is a rectangular carbon fiber carrier plate. Of course, it is understood that other shapes or materials may be selected, such as metal or non-metal carrier plates with certain strength and rigidity.
On the basis of the above embodiment, further, the bearing holes 11 are distributed in a matrix. Of course, the carrying holes 11 may be arranged in other distribution forms besides the matrix distribution according to the actual working condition.
On the basis of the above embodiment, further, the carrier includes 4 rows and 6 rows of the carrying holes 11 or 5 rows and 6 rows of the carrying holes 11.
On the basis of the above embodiment, further, the outer wall of the frame 13 is a structure perpendicular to the upper surface of the bearing plate 10, and may also be a structure inclined toward the center of the bearing plate 10 or the opposite direction, which is not limited herein.
The utility model discloses because compatible right angle silicon chip and chamfer silicon chip simultaneously, consequently, in the actual production process, need not change the carrier according to the change of silicon chip type, consequently have low in production cost and efficient advantage.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A silicon wafer coating carrier comprises a bearing plate; the bearing plate is provided with a plurality of bearing holes; the bearing plate comprises a parting strip positioned between the adjacent bearing holes and a frame positioned at the edge of the bearing plate;
the method is characterized in that: the hole wall of the bearing hole on the parting bead comprises a first bearing part corresponding to the side edge of the silicon wafer and a second bearing part corresponding to the top angle or chamfer angle of the silicon wafer;
the first bearing part includes:
a first sink segment extending vertically downward from an upper surface of the bearing plate;
the first inclined section extends along the tail end of the first sunken section to the direction of the center of the bearing hole;
the second bearing part includes:
a second sink segment extending vertically downward from an upper surface of the bearing plate;
the second inclined section extends along the tail end of the second sinking section to the direction of the center of the bearing hole;
the sinking depth of the second sinking section is greater than that of the first sinking section.
2. The silicon wafer coating carrier of claim 1, wherein: an avoidance pit for avoiding the top angle of the silicon wafer is formed in the bearing plate; the avoiding concave pit is positioned at the top angle of the bearing hole.
3. The silicon wafer coating carrier of claim 2, wherein: the avoiding pits are arc pits.
4. The silicon wafer coating carrier of claim 3, wherein: the diameter of the arc-shaped concave pit is 2 mm to 10 mm.
5. The silicon wafer coating carrier of claim 1, wherein: the sinking depth of the first sinking section is 0.8-1.5 mm; the sinking depth of the second sinking section is 1.7-2.0 mm.
6. The silicon wafer coating carrier of claim 1, wherein: the inclination angle of the first inclined section is 20 degrees to 30 degrees.
7. The silicon wafer coating carrier of claim 1, wherein: the first bearing part and the second bearing part are in smooth transition.
8. The silicon wafer coating carrier of claim 1, wherein: the hole wall of the bearing hole on the frame is different from the hole wall of the bearing hole on the parting stop in structure.
9. The silicon wafer coating carrier of claim 1, wherein: the tail end of the first inclined section and/or the tail end of the second inclined section coincide with or are positioned on the lower surface of the bearing plate.
10. The silicon wafer coating carrier of claim 1, wherein: the bearing holes are distributed in a matrix.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920994032.6U CN210325728U (en) | 2019-06-28 | 2019-06-28 | Silicon chip coating film carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920994032.6U CN210325728U (en) | 2019-06-28 | 2019-06-28 | Silicon chip coating film carrier |
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| Publication Number | Publication Date |
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| CN210325728U true CN210325728U (en) | 2020-04-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920994032.6U Active CN210325728U (en) | 2019-06-28 | 2019-06-28 | Silicon chip coating film carrier |
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| CN (1) | CN210325728U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111733396A (en) * | 2020-07-15 | 2020-10-02 | 苏州迈为科技股份有限公司 | Film coating jig and film coating device |
-
2019
- 2019-06-28 CN CN201920994032.6U patent/CN210325728U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111733396A (en) * | 2020-07-15 | 2020-10-02 | 苏州迈为科技股份有限公司 | Film coating jig and film coating device |
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