CN210272354U - Avalanche photodetector integrated with filtering amplification chip - Google Patents

Abstract

The utility model discloses an avalanche photodetector of integrated filtering amplification chip, including APD chip, refrigerator and avalanche signal processing chip, APD chip output is connected with avalanche signal processing chip's signal input part electricity, and avalanche signal processing chip's output is through the avalanche signal after handling, the cold junction face of APD chip and refrigerator is closely laminated, and APD chip, refrigerator and avalanche signal processing chip are whole to be packaged in a casing. The utility model has the advantages that: the avalanche photodetector of the integrated filter amplification chip has small size and mass, simple circuit structure, low power consumption and stable detection efficiency.

Description

Avalanche photodetector integrated with filtering amplification chip

Technical Field

The utility model relates to a photoelectric detection technical field, more specifically relate to an integrated filter amplifier chip's avalanche photodetector.

Background

With the continuous development of photoelectric detection technology, single photon detection is widely applied to the detection of weak signals due to the characteristic of high sensitivity, thereby promoting the progress of the fields of biological fluorescence detection, spectral measurement, laser radar, light quantum information processing, optical fiber sensing and the like. Especially in the field of quantum communication, the single photon detector plays an important role in both quantum random number generators and quantum key distribution technologies. At present, the quantum communication technology gradually goes to practicability, commercialization and integration, so that further requirements on the size, power consumption, stability and the like of the single photon detector are provided. Avalanche Photodiodes (APDs) are one of the core devices of single photon detectors, determining the sensitivity of the detector. The dark current noise of the APD can be reduced by reducing the temperature of the working environment of the APD, so that the sensitivity of the single photon detector is greatly improved.

In the prior art, a clamp is used to fix an APD tube on a refrigerating surface of a semiconductor refrigerator (TEC), heat generated by the APD tube is transferred to the TEC through a tube case, and the TEC refrigerates the entire APD tube. This approach has a low cooling efficiency and typically requires the use of multiple stages of TEC, resulting in high power consumption. When the APD tube works, bias current and dynamic driving voltage need to be provided for the APD through an external driving circuit module, and as original avalanche signals output by the APD are mixed with strong gating and second and above harmonic interference signals, an avalanche detection reading circuit module is needed to process the original avalanche signals output by the APD and extract photocurrent generated by detection. The avalanche detection read-out circuit module firstly needs to adopt a targeted filtering measure to greatly suppress the gate control signal interference in the background, and simultaneously does not change the amplitude of the avalanche signal as much as possible. Next, the filtered avalanche signal needs to be amplified by a low noise amplification unit. The drive circuit, the filter and the low-noise amplifier unit of the current detector are all realized in a PCB superior connection mode through discrete circuits, and the overall size and weight of the detector in actual use are greatly increased. Meanwhile, the cascade connection of a plurality of discrete circuits also introduces additional noise and crosstalk, and in order to reduce the negative effects, a shielding case needs to be additionally arranged for the partial circuits to improve electromagnetic field spatial coupling and digital control signal crosstalk, so that the complexity of system design and manufacturing is increased. In addition, each circuit needs to be driven by a power supply, so that the detector is complex in driving and high in power consumption.

Because the above solution is low in refrigeration efficiency, high in power consumption and large in size, related researchers have proposed an integrated solution for packaging the TEC in the avalanche photodiode, and the patent publication No. CN 107167251a discloses an integrated solution for an integrated refrigeration avalanche photodetector, as shown in fig. 1, the detector includes an avalanche photodiode 100, a dc bias voltage generating circuit unit 200, a sine gate pulse generating circuit unit 300, a filtering, amplifying and shaping circuit unit 400, a temperature control circuit unit 500 and an FPGA circuit unit 600, and in the solution, a thermistor and a semiconductor refrigerator are built in the package of the avalanche photodiode 100, thereby improving the refrigeration efficiency to a certain extent. However, the integrated package of APD and TEC is not sufficient to support the miniaturization of the overall size of the detector, and this solution still requires the following discrete circuit units to be connected outside the APD package structure for proper operation in practical use: the direct current bias voltage generating circuit unit, the sine gate pulse generating circuit unit, the filtering, amplifying and shaping circuit unit, the temperature control circuit unit and the FPGA circuit unit, so that the actual size of the detector still has an improvement space of more than two orders of magnitude.

In the refrigeration mode, the prior art adopts a constant voltage source to supply power to the semiconductor refrigeration chip, so that the semiconductor refrigeration chip works under the maximum refrigeration power. The patent with publication number CN 103557950 discloses a single photon detector with stable efficiency and a control method, as shown in fig. 2, the single photon detector in this scheme includes a stable voltage source, a refrigeration box, a single chip, a high voltage module, a semiconductor refrigeration chip, an APD and a temperature sensitive resistor. The APD and the temperature-sensitive resistor are fixed on the semiconductor refrigerating sheet and are packaged in the refrigerating box together, the stable voltage source is electrically connected with the semiconductor refrigerating sheet, the temperature-sensitive resistor and the high-voltage module are connected with the single chip microcomputer, and the high-voltage module is connected with the APD to provide driving voltage for the APD. The semiconductor refrigeration piece works under the maximum refrigeration power, when the temperature of the working environment of the APD changes, the resistance value of the temperature-sensitive resistor changes along with the temperature in the refrigeration box, and transmits a temperature signal to the single chip microcomputer, and the single chip microcomputer controls the output of the high-voltage module according to the temperature signal, so that the bias voltage of the APD is controlled.

The constant refrigerating power is adopted, so that the temperature in the refrigerating box changes along with the temperature of the external environment, and the temperature stability is poor. In order to compensate the APD detection efficiency change caused by the external temperature change, the prior art adopts a method of changing the APD reverse bias voltage along with the temperature change to control the detection efficiency, but the dark current changes along with the change of the APD reverse bias voltage, which causes the dark count change to affect the detection error rate, i.e. changing the APD reverse bias voltage affects the stability of the detection output to a certain extent.

SUMMERY OF THE UTILITY MODEL

The utility model discloses the technical problem that will solve lies in that prior art detector size and quality are big, the external circuit is complicated, signal crosstalk and the big problem of signal noise between the circuit.

The utility model discloses a solve above-mentioned technical problem through following technical scheme: an avalanche photodetector integrated with a filtering amplification chip comprises an APD chip, a refrigerator and an avalanche signal processing chip, wherein the output end of the APD chip is electrically connected with the signal input end of the avalanche signal processing chip, the output end of the avalanche signal processing chip outputs processed avalanche signals, the APD chip is closely attached to the cold end face of the refrigerator, and the APD chip, the refrigerator and the avalanche signal processing chip are integrally packaged in a shell. The utility model provides an avalanche photodetector of integrated filtering amplification chip realizes that the chipization of APD is integrated, avalanche signal processing circuit's that the APD output is connected chipization is integrated to encapsulate in a casing that the radiating effect is good, the detector no longer need connect complicated peripheral circuit, has greatly reduced the device size, has improved the integrated level.

Preferably, the avalanche photodetector integrated with the filtering amplification chip further comprises an APD driving chip, an input end of the APD chip is electrically connected with the APD driving chip, and the APD driving chip is also packaged in the housing. The utility model provides an avalanche photodetector of integrated filtering amplification chip further realizes that the drive circuit's that the APD input is connected chipization is integrated, has further reduced the device size, has improved the integrated level.

Preferably, the avalanche photodetector integrated with the filtering amplification chip further comprises a ceramic substrate, the APD chip is arranged in a refrigeration area of the ceramic substrate, the avalanche signal processing chip and the APD driving chip are arranged in a non-refrigeration area of the ceramic substrate, and the ceramic substrate is also packaged in the shell.

Preferably, the avalanche photodetector integrated with the filtering amplification chip further comprises a thermistor, the thermistor is arranged in the refrigeration area of the ceramic substrate and is close to the APD chip, and the thermistor is also packaged in the shell.

Preferably, the avalanche photodetector integrated with the filtering amplification chip further comprises a temperature control circuit, the temperature control circuit comprises a temperature acquisition ADC, a processor and a refrigerator driver, the temperature acquisition ADC is connected in parallel at two ends of the thermistor, the refrigerator driver is connected with the refrigerator, one end of the processor is connected with the temperature acquisition ADC, the other end of the processor is connected with the refrigerator driver, and the temperature control circuit is arranged in a non-refrigeration area of the ceramic substrate and is also packaged in the shell. In the working process of the detector, the refrigerating power of the refrigerator is adjusted according to the temperature change, so that the APD works in a stable low-temperature environment, and the reverse bias voltage and the gate control signal are kept unchanged, thereby ensuring the states of low noise and high sensitivity of the APD dark current, and ensuring the stable detection efficiency of the detector.

Preferably, the ceramic substrate is subjected to heat insulation treatment between a refrigerating area and a non-refrigerating area. The detector only has an APD chip which needs to work in a low-temperature environment (-55 ℃), and the APD driving chip and the LTCC chip can also work normally at normal temperature, so that the temperature reduction effect of the APD chip can be improved by carrying out heat insulation treatment on the APD driving chip and the LTCC chip.

Further preferably, the refrigerator is only arranged in the refrigerating area of the ceramic substrate; furthermore, the non-refrigeration area of the ceramic substrate can be independently subjected to temperature control. So as to realize the heat insulation treatment between the refrigeration area and the non-refrigeration area of the ceramic substrate.

Preferably, the avalanche signal processing chip is an LTCC chip. The LTCC chip is a chip with a filtering and amplifying function and integrates the functions of a filter and a low noise amplifier.

Preferably, the LTCC chip includes a first filter, a second filter, a first low noise amplifier and a second low noise amplifier, the first filter, the first low noise amplifier, the second low noise amplifier and the second filter are connected in sequence by ac coupling of capacitors, an input terminal of the first low noise amplifier is grounded through a first inductor and a first resistor connected in series, an input terminal of the second low noise amplifier is grounded through a second inductor and a second resistor connected in series, an output terminal of the first low noise amplifier is connected to the supply voltage Vcc through a third inductor and a third resistor connected in series, and an output terminal of the second low noise amplifier is connected to the supply voltage Vcc through a fourth inductor and a fourth resistor connected in series.

Preferably, the LTCC chip further includes a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, where a first end of the first capacitor is connected to a node between the first inductor and the first resistor, and another end of the first capacitor is grounded, a first end of the second capacitor is connected to a node between the second inductor and the second resistor, and another end of the second capacitor is grounded, a first end of the third capacitor is connected to a node between the third inductor and the third resistor, and another end of the third capacitor is grounded, and a second end of the fourth capacitor is connected to a node between the fourth inductor and the fourth resistor, and another end of the fourth capacitor is grounded. The first capacitor, the second capacitor, the third capacitor and the fourth capacitor are used for filtering an alternating current signal in the circuit and preventing the alternating current signal from being coupled into the power circuit.

Compared with the prior art, the utility model has the following advantages:

1) the utility model provides an avalanche photodetector of integrated filtering amplification chip realizes that the chipization of APD is integrated, avalanche signal processing circuit's that the APD output is connected chipization is integrated. The detector does not need to be connected with a complex peripheral circuit, so that the size of the device is greatly reduced, and the integration level is improved.

2) The utility model provides an avalanche photodetector of integrated filtering amplification chip further realizes that the drive circuit's that the APD input is connected chipization is integrated, has further reduced the device size, has improved the integrated level.

3) The utility model discloses to have the LTCC chip integration of filtering amplification function to the detector in, the avalanche signal after the direct output filtering of detector signal output pin enlargies, photoelectric detection result promptly no longer need handle the original avalanche signal of APD output through outside filter circuit, low noise amplifier circuit, has retrencied the external circuit structure, has reduced whole size and the weight of detector when the in-service use.

4) The LTCC chip replaces a plurality of discrete circuits, so that parasitic parameters of signal links are reduced, channel crosstalk between the discrete circuits is reduced, circuit noise is effectively reduced, and complexity of system design and manufacturing is reduced.

5) The utility model discloses utilize the LTCC chip to realize comparing in the cascaded mode of utilizing discrete circuit to the filtering amplification function of original avalanche signal, greatly reduced driving voltage, reduced the consumption.

6) Through the design of the temperature control circuit, in the working process of the detector, the refrigerating power of the refrigerator is adjusted according to the temperature change, so that the APD works in a stable low-temperature environment, the reverse bias voltage and the gate control signal are kept unchanged, the states of low noise and high sensitivity of the APD dark current are ensured, and the detector can keep stable detection efficiency.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings required for the description of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a schematic diagram of an integrated refrigeration avalanche photodetector of the prior art;

FIG. 2 is a schematic diagram of a prior art single photon detector with stable efficiency;

fig. 3 is a circuit diagram of an avalanche photodetector integrated with a filter amplifier chip disclosed in embodiment 1 of the present invention;

fig. 4 is a schematic circuit diagram of an LTCC chip of an integrated filter amplifier chip avalanche photodetector according to an embodiment of the present invention;

fig. 5 is a circuit diagram of an avalanche photodetector integrated with a filter amplifier chip disclosed in embodiment 2 of the present invention;

fig. 6 is a circuit diagram of an avalanche photodetector integrated with a filter amplifier chip disclosed in embodiment 3 of the present invention;

fig. 7 is a circuit diagram of an avalanche photodetector integrated with a filter amplifier chip disclosed in embodiment 4 of the present invention.

The corresponding part names indicated by the numbers in the figures:

1. first pin 2, second pin 3, third pin

4. Fourth pin 5, fifth pin 6, sixth pin

7. Seventh pin 8, eighth pin 9, APD chip

LTCC chip 11, thermistor 12, case

13. Temperature acquisition ADC 14, processor 15 and refrigerator drive

16. Ceramic substrate 17, APD driving chip 18, refrigerator

100. Avalanche photodiode 200. DC bias voltage generating circuit unit

300. Sine gate pulse generating circuit unit 400, filtering, amplifying and shaping circuit unit

500. Temperature control circuit unit 600.FPGA circuit unit

1001. First low pass filter 1002. second low pass filter

1003. First low noise amplifier 1004, second low noise amplifier 1005, first inductor

1006. First resistance 1007, second inductance 1008, second resistance

1009. First 1010, second 1011 and third inductors

1012. Third resistance 1013, fourth inductance 1014, fourth resistance

1015. Third capacitor 1016, fourth capacitor

Detailed Description

The embodiments of the present invention will be described in detail below, and the present embodiment is implemented on the premise of the technical solution of the present invention, and a detailed implementation manner and a specific operation process are given, but the scope of the present invention is not limited to the following embodiments.

Example 1

As shown in fig. 3, an avalanche photodetector integrated with a filter amplifier chip includes an APD chip 9 and an LTCC chip 10 (low temperature co-fired ceramic chip).

The output end of the APD chip 9 is electrically connected with the avalanche signal input end of the LTCC chip 10, the output end of the LTCC chip 10 outputs the processed avalanche signal, and the APD chip 9 is closely attached to the cold end face of the refrigerator 18. The APD chip 9, LTCC chip 10 and refrigerator 18 are enclosed in a housing 12.

The cold end of the refrigerator 18 is attached to the bottom of the APD chip 9, or attached to the APD chip 9 from the top of the APD chip 9. And the cold side of the refrigerator 18 may be attached to the APD chip 9 by a thermally conductive material.

The LTCC chip 10 is a chip with filtering and amplifying functions. Preferably, the LTCC chip 10 integrates the functions of a filter and a low noise amplifier.

As a specific embodiment of the LTCC chip 10, as shown in fig. 4, the LTCC chip 10 includes a first low pass filter 1001, a second low pass filter 1002, a first low noise amplifier 1003, and a second low noise amplifier 1004.

The first low-pass filter 1001, the first low-noise amplifier 1003, the second low-noise amplifier 1004 and the second low-pass filter 1002 are connected in sequence in a capacitive ac coupling manner, the input end of the first low-noise amplifier 1003 is grounded through a first inductor 1005 and a first resistor 1006 which are connected in series, the input end of the second low-noise amplifier 1004 is grounded through a second inductor 1007 and a second resistor 1008 which are connected in series, a first capacitor 1009 is connected with a node LB1 between the first inductor 1005 and the first resistor 1006 in series, the other end is grounded, a first capacitor 1010 is connected with a node LB2 between the second inductor 1007 and the second resistor 1008 in series, the other end is grounded, the output end 1012 of the first low-noise amplifier 1003 is connected with a power supply voltage Vcc through a third inductor 1011 and a third resistor 1006 which are connected in series, the output end of the second low-noise amplifier 1004 is connected with the power supply voltage Vcc through a fourth inductor 1013 and a fourth resistor 1014 which are connected in series, one end of the third capacitor 1015 is connected to the node LD1 between the third inductor 1011 and the third resistor 1012, the other end is connected to ground, one end of the fourth capacitor 1016 is connected to the node LD2 between the fourth inductor 1013 and the fourth resistor 1014, and the other end is connected to ground.

The circuits connected to the input and output terminals of the first low noise amplifier 1003 and the second low noise amplifier 1004 provide the dc driving voltage for them, specifically: for the first low noise amplifier 1003, the voltage at the node LD1 between the third inductor 1011 and the third resistor 1012 is the drain bias voltage of the first low noise amplifier 1003, the supply voltage Vcc provides a stable drain bias voltage for the first low noise amplifier 1003 after passing through the third inductor 1011 via the third resistor 1012 for stabilizing the bias voltage, and the supply voltage Vcc provides a stable drain bias voltage for the second low noise amplifier 1004 after passing through the fourth inductor 1013 via the fourth resistor 1014 for stabilizing the bias voltage. A third capacitor 1015 connected in series beside the LD1 is used to filter the ac signal output by the first low noise amplifier 1003 and prevent the ac signal from being coupled into the power circuit, and similarly, a fourth capacitor 1016 connected in series beside the LD2 is used to filter the ac signal output by the second low noise amplifier 1004 and prevent the ac signal from being coupled into the power circuit. The voltage at the node LB1 between the first inductor 1005 and the first resistor 1006 is the base bias voltage of the first lna 1003, wherein the first resistor 1006 connected in series to the ground and the first capacitor 1009 connected in parallel with the first resistor 1003 are used to generate a proper and stable base voltage, and the first inductor 1005 connected in series to the input terminal of the first lna 1003 is used to suppress the external ac signal from flowing into the input terminal of the first lna 1003. Similarly, the voltage at the node LD2 between the fourth inductor 1013 and the fourth resistor 1014 is the drain bias voltage of the second low noise amplifier 1004, and the voltage at the node LB2 between the second inductor 1007 and the second resistor 1008 is the base bias voltage of the second low noise amplifier 1004. An original avalanche signal output by the APD chip 9 passes through the first low-pass filter 1001, is ac-coupled to the first low-noise amplifier 1003 through a capacitor, is amplified by low noise, and is ac-coupled to the second low-noise amplifier 1004 for amplification; the amplified signal is ac-coupled to the final second low-pass filter 1002 for ac amplification, and finally the photocurrent generated by detection is output.

The first low-pass filter 1001 and the second low-pass filter 1002 may also be notch filters.

The LTCC chip 10 serves as an avalanche signal processing chip, and the avalanche signal processing chip is configured to suppress the gating signal and the second and higher harmonic signals in the original avalanche signal output by the APD chip 9, and perform low-pass filtering and low-noise amplification on the avalanche signal.

The embodiment 1 of the utility model discloses an integrated filtering amplification chip's avalanche photodetector theory of operation as follows: when the APD chip 9 operates, if an optical signal reaches the photosensitive surface of the APD chip 9, an avalanche effect occurs in the APD chip 9, and the generated original avalanche signal is output to the LTCC chip 10. The LTCC chip 10 processes the original avalanche signal, filters the gate control signal and the second and above harmonic signal frequencies, and filters the interference of the high frequency gate control signal. Meanwhile, the detection of the input optical signal is realized by low-pass filtering and low-noise amplification of the avalanche signal caused by the optical signal.

Example 2

The embodiment 2 of the utility model and the utility model discloses embodiment 1's difference lies in:

the avalanche photodetector of the integrated filter amplification chip of the embodiment further integrates an APD driving chip.

As shown in fig. 5, except for the same structure as in embodiment 1, the input terminal of the APD chip 9 is electrically connected to an APD driving chip 17, and the APD driving chip 17 supplies a driving voltage to the APD chip 9.

The embodiment 2 of the utility model discloses an integrated filtering amplification chip's avalanche photodetector theory of operation as follows: the APD driving chip 17 outputs a voltage signal to drive the APD chip 9 to operate, and if an optical signal reaches a photosensitive surface of the APD chip 9, an avalanche effect occurs in the APD chip 9, and the generated original avalanche signal is output to the LTCC chip 10. The LTCC chip 10 processes the original avalanche signal, filters the gate control signal and the second and above harmonic signal frequencies, and filters the interference of the high frequency gate control signal. Meanwhile, the avalanche signal caused by the optical signal is subjected to low-pass filtering and low-noise amplification, and the avalanche signal is output, namely, the detection of the input optical signal is realized.

In this embodiment, it is preferable that a thermal insulation process is performed between the APD chip 9 and the APD driver chip 17 or the LTCC chip 10, where the thermal insulation process includes placing the APD driver chip 17 or the LTCC chip 10 outside the refrigerator 18, or performing temperature control on the APD driver chip 17 or the LTCC chip 10 separately. The only chips in the detector that need to operate in a low temperature environment (-55 ℃) are the APD chips 9. The APD driver chip 17 and the LTCC chip 10 can also normally operate at normal temperature, and therefore, the APD driver chip 17 and the LTCC chip 10 can be placed outside the refrigerator 18 without refrigerating the same, but it is noted that heat between the chips is conducted by circuit connection, and air heat insulation measures can be taken or separate temperature control can be provided for the chips, so that the chips can operate at normal temperature.

Example 3

The embodiment 3 of the utility model and the utility model discloses embodiment 2's difference lies in:

referring to fig. 6, the avalanche photodetector further includes a ceramic substrate 16, each chip can be disposed on the ceramic substrate 16, and the circuit connection between the chips can also be disposed on the ceramic substrate 16, the ceramic substrate 16 is packaged in the housing 12.

Specifically, the ceramic substrate 16 is divided into a cooling area and a non-cooling area. The APD driving chip 17 and the LTCC chip 10 are arranged in a non-refrigeration area of the ceramic substrate 16, and the APD chip 9 is arranged in a refrigeration area of the ceramic substrate 16. In the embodiment, the APD chip 9 and the cold end face of the refrigerator 18 are closely attached, the cold end face of the refrigerator 18 can be directly attached below the position of the ceramic substrate 16 where the APD chip 9 is located, and can also be attached to the APD chip 9 from the top of the APD chip 9, so that the refrigerating efficiency of the APD chip 9 is improved. The ceramic substrate 16 is heat insulated between the refrigeration area and the non-refrigeration area, the heat insulation treatment mode can be that the refrigerator 18 is only arranged in the refrigeration area of the ceramic substrate 16, and the air heat insulation measure is adopted between the refrigeration area and the non-refrigeration area of the ceramic substrate 16 or the non-refrigeration area of the ceramic substrate 16 is independently controlled in temperature, so that the ceramic substrate works at normal temperature.

Example 4

As shown in fig. 7, embodiment 4 of the present invention differs from embodiment 3 of the present invention in that:

the avalanche photodetector of the embodiment integrates a temperature control function, and has the following specific structure:

an avalanche photodetector integrated with a filter amplification chip comprises an APD driving chip 17, an APD chip 9, an LTCC chip 10 (a low temperature co-fired ceramic chip), a thermistor 11 and a temperature control circuit, and the photodetector is provided with eight pins: first pin 1 to eighth pin 8. The thermistor 11 and the temperature control circuit are also packaged in the shell 12, the thermistor 11 is arranged in a refrigerating area of the ceramic substrate 16 and is close to the APD chip 9, and the temperature control circuit is arranged in a non-refrigerating area of the ceramic substrate 16.

An eighth pin 8 of the photodetector is used as an input end of the APD driving chip 17 and is connected with a power supply through the eighth pin 8; the output end of the APD driving chip 17 is connected with the input end of the APD chip 9 to provide driving voltage for the APD chip 9; the output end of the APD chip 9 is electrically connected with the avalanche signal input end of the LTCC chip 10, and the output end of the LTCC chip 10 is used as a seventh pin 7 of the photoelectric detector and outputs a processed avalanche signal; a sixth pin 6 of the photodetector is used as a driving signal input end of the LTCC chip 10 to input a driving signal; and the grounding ends of the LTCC chip 10 and the APD chip 9 are used as a third pin 3 of the photoelectric detector. Two ends of the thermistor 11 are respectively used as a first pin 1 and a second pin 2 of the photoelectric detector. The fourth pin 4 and the fifth pin 5 of the photodetector are connected to the refrigerator 18.

It should be noted that, on the basis of ensuring that the function is not changed, the positions of the first pin 1 to the eighth pin 8 may be changed according to the device or the circuit layout connected thereto, and the positions in the schematic diagram are not the only limiting cases.

The temperature control circuit comprises a temperature acquisition ADC13, a processor 14 and a refrigerator driver 15, wherein the temperature acquisition ADC13 is connected in parallel at two ends of a thermistor 11, and the refrigerator driver 15 is connected with the refrigerator 18 through a fourth pin 4 and a fifth pin 5 of a photoelectric detector. The processor 14 is connected to the temperature acquisition ADC13 at one end and to the refrigerator driver 15 at the other end.

The temperature control circuit provides a continuous low temperature environment for the APD chip 9.

The embodiment 4 of the utility model discloses an integrated filtering amplification chip's avalanche photodetector theory of operation as follows: the heat generated by the APD chip 9 is transmitted to the ceramic substrate 16, and the resistance value of the thermistor 11 changes along with the temperature of the ceramic substrate 16 and is fed back to the processor 14 through the temperature acquisition ADC 13. The processor 14 controls the refrigerator driver 15 according to the resistance value fed back by the temperature acquisition ADC13, so as to control the refrigeration power of the semiconductor refrigerator, and cool the cold end surface of the refrigerator 18, so as to ensure that the ambient temperature of the APD chip 9 is kept constant.

Through the technical scheme, the utility model discloses an integrated filtering amplification chip's avalanche photodetector has that size and quality are little, and circuit structure retrencies, low power dissipation and the stable advantage of detection efficiency. The LTCC chip with the filtering and amplifying functions is integrated into a detector, and a signal output pin of the detector directly outputs an avalanche signal after filtering and amplifying; the LTCC chip replaces a plurality of discrete circuits, so that parasitic parameters of signal links are reduced, channel crosstalk between the discrete circuits is reduced, circuit noise is effectively reduced, driving voltage is greatly reduced, and power consumption is reduced; through the design of the temperature control circuit, in the working process of the detector, the refrigerating power of the refrigerator is adjusted according to the temperature change, so that the APD works in a stable low-temperature environment, and the reverse bias voltage and the gate control signal are kept unchanged, thereby ensuring the states of low noise and high sensitivity of the APD dark current and ensuring that the detector can keep stable detection efficiency.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, as any modifications, equivalents, improvements and the like made within the spirit and principles of the present invention are intended to be included within the scope of the present invention.

Claims (11)

1. The avalanche photodetector integrated with the filtering amplification chip comprises an APD chip, a refrigerator and an avalanche signal processing chip, wherein the output end of the APD chip is electrically connected with the signal input end of the avalanche signal processing chip, the APD chip is closely attached to the cold end face of the refrigerator, and the APD chip, the refrigerator and the avalanche signal processing chip are integrally packaged in a shell.

2. The integrated filter amplifier chip avalanche photodetector of claim 1, further comprising an APD driver chip, wherein the input terminal of the APD chip is electrically connected to the APD driver chip, and the APD driver chip is also packaged in the housing.

3. The integrated filter amplification chip avalanche photodetector of claim 2, further comprising a ceramic substrate, wherein the APD chip is disposed in a refrigerated region of the ceramic substrate, the avalanche signal processing chip and the APD driving chip are disposed in a non-refrigerated region of the ceramic substrate, and the ceramic substrate is also enclosed in the housing.

4. The integrated filter amplifier chip avalanche photodetector of claim 3, further comprising a thermistor, said thermistor being disposed in said ceramic substrate in the cooling region, proximate to the APD chip, said thermistor also being enclosed in said housing.

5. The avalanche photodetector integrated with a filter amplifier chip as claimed in claim 4, further comprising a temperature control circuit, wherein the temperature control circuit comprises a temperature acquisition ADC connected in parallel to the thermistor, a processor connected to the temperature acquisition ADC at one end and a refrigerator driver connected to the refrigerator at the other end, and a refrigerator driver, wherein the temperature control circuit is disposed in the non-refrigerated region of the ceramic substrate and also enclosed in the housing.

6. The integrated filter amplifier chip avalanche photodetector of claim 5, wherein the ceramic substrate is thermally insulated between the refrigerated region and the non-refrigerated region.

7. The integrated filter amplifier chip avalanche photodetector of claim 6, wherein the said refrigerator is disposed only in the refrigeration area of the ceramic substrate.

8. The integrated filter amplifier chip avalanche photodetector of claim 7, wherein the non-refrigerated area of the ceramic substrate is temperature controlled separately.

9. The integrated filter amplifier chip avalanche photodetector of any one of claims 1 to 8, wherein the avalanche signal processing chip is an LTCC chip.

10. The integrated filter amplifier chip avalanche photodetector of claim 9, wherein said LTCC chip comprises a first filter, a second filter, a first low noise amplifier and a second low noise amplifier, said first filter, said first low noise amplifier, said second low noise amplifier and said second filter are serially connected by means of capacitive ac coupling, an input of said first low noise amplifier is connected to ground through a first inductor and a first resistor connected in series, an input of said second low noise amplifier is connected to ground through a second inductor and a second resistor connected in series, an output of said first low noise amplifier is connected to a supply voltage Vcc through a third inductor and a third resistor connected in series, and an output of said second low noise amplifier is connected to the supply voltage Vcc through a fourth inductor and a fourth resistor connected in series.

11. The integrated filter amplifier chip avalanche photodetector of claim 10, wherein said LTCC chip further comprises a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, said first capacitor is connected to a node between the first inductor and the first resistor at a first end and to ground at another end, said second capacitor is connected to a node between the second inductor and the second resistor at a first end and to ground at another end, said third capacitor is connected to a node between the third inductor and the third resistor at one end and to ground at another end, and said fourth capacitor is connected to a node between the fourth inductor and the fourth resistor at one end and to ground at another end.

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