CN210224953U

CN210224953U - Leakage surge protection circuit

Info

Publication number: CN210224953U
Application number: CN201921535544.2U
Authority: CN
Inventors: Weiqing Wang; 王卫青; Jie Wen; 文杰
Original assignee: Zhejiang Xia Xing Electronic Technology Co Ltd
Current assignee: Zhejiang Xia Xing Electronic Technology Co Ltd
Priority date: 2019-09-16
Filing date: 2019-09-16
Publication date: 2020-03-31
Anticipated expiration: 2029-09-16

Abstract

The utility model relates to an electric leakage surge protection circuit, the leakage current of main loop is gathered to leakage signal sampling circuit, leakage signal sampling circuit is connected with leakage signal processing circuit electricity, leakage signal processing circuit is connected with silicon controlled rectifier control circuit electricity, silicon controlled rectifier control circuit is connected with the trip coil electricity, trip coil, current limiting circuit, rectifier circuit electricity is connected in proper order, trip coil's one end and rectifier circuit's one end are connected to the main loop respectively, rectifier circuit is connected with the filter rectifier circuit electricity, rectifier filter circuit is connected with leakage signal processing circuit electricity, first order surge protection circuit sets up between live wire L and zero line N, second level surge protection circuit sets up between trip coil and zero line N. The utility model discloses an electric leakage surge protection circuit sets up the hierarchical surge energy that absorbs of two-stage surge protection circuit, has strengthened the protection level and the reliability of anti surge greatly, has improved the anti surge impact life-span of electric leakage protection circuit.

Description

Leakage surge protection circuit

Technical Field

The utility model relates to a leakage circuit breaker's circuit especially relates to a leakage surge protection circuit.

Background

The leakage circuit breaker is a switch which can automatically act when the leakage current in the circuit exceeds a preset value, and the common leakage circuit breaker is divided into a voltage type and a current type, wherein the current type leakage circuit breaker detects a leakage current by a zero sequence transformer, so that a release acts, the leakage circuit breaker is disconnected, and the leakage protection is completed. Most of leakage circuit breakers in the existing market adopt a single-stage piezoresistor for absorption protection, so that the anti-surge protection level is low and unreliable, and if a single small piezoresistor is selected, the anti-surge impact performance is poor, the service life is short, and if a single large piezoresistor is selected, the small-sized product cannot be normally installed.

Disclosure of Invention

In view of this, the utility model aims at providing a absorb surge energy, long service life's electric leakage surge protection circuit in grades to improve the anti surge protection level and the use reliability of product.

In order to achieve the above object, the present invention adopts such a leakage surge protection circuit, which comprises a main loop for connecting a load, a trip coil, a leakage signal sampling circuit, a leakage signal processing circuit, a thyristor control circuit, a current limiting circuit, a rectifying circuit, a filtering voltage stabilizing circuit, a first-stage surge protection circuit, and a second-stage surge protection circuit, wherein the main loop comprises a live line L and a zero line N, the leakage signal sampling circuit collects a leakage current of the main loop, the leakage signal sampling circuit is electrically connected with the leakage signal processing circuit, the leakage signal processing circuit is electrically connected with the thyristor control circuit, the thyristor control circuit is electrically connected with the trip coil, the current limiting circuit and the rectifying circuit are electrically connected in sequence, one end of the trip coil and one end of the rectifying circuit are respectively connected to the main loop, the rectifying circuit is electrically connected with the filtering rectifying circuit, the rectification filter circuit is electrically connected with the leakage signal processing circuit, the first-stage surge protection circuit is arranged between the live wire L and the zero line N, and the second-stage surge protection circuit is arranged between the trip coil and the zero line N.

Above-mentioned electric leakage surge protection circuit is provided with two-stage surge protection, and first order surge protection circuit sets up between live wire L and zero line N, can the primary absorb surge energy, prevents to influence the supply voltage of circuit because of the surge voltage who produces on the major loop, and second level surge protection circuit sets up between trip coil and zero line N, further absorbs surplus surge energy, and the circuit that is main with the electric leakage signal processing circuit to the rear stage provides effective, reliable protection, the utility model discloses take the absorptive mode of two-stage to surge energy, strengthened the protection level and the reliability of anti surge greatly, improved the anti surge impact life-span of electric leakage protection circuit.

The utility model discloses further set up to electric leakage surge protection circuit still includes test circuit, test circuit is connected with the major loop electricity.

The utility model discloses further set up to first order surge protection circuit and include piezo-resistor RV1 and piezo-resistor RV2, piezo-resistor RV1 and piezo-resistor RV2 establish ties, and live wire L is connected to piezo-resistor RV 1's one end, and zero line N is connected to piezo-resistor RV 2's one end.

The utility model discloses further set up to second level surge protection circuit and include piezo-resistor RV3, on the trip coil was connected to piezo-resistor RV 3's one end, zero line N was connected to piezo-resistor RV 3's the other end.

Above-mentioned first order surge protection circuit and second level surge protection circuit set up respectively at trip coil's front end and rear end, and surge protection is effectual, and owing to adopt two-stage surge protection circuit, can absorb the surge energy in grades for piezo-resistor RV1, RV2, RV3 all can adopt the piezo-resistor of small volume, can save the space size of product, make the complete machine product do more miniaturized.

Drawings

Fig. 1 is a schematic circuit diagram according to an embodiment of the present invention.

Detailed Description

As shown in fig. 1, the utility model relates to an electric leakage surge protection circuit, which comprises a main loop 1 and a trip coil 2 for connecting a load, an electric leakage signal sampling circuit 3, an electric leakage signal processing circuit 4, a silicon controlled control circuit 5, a current limiting circuit 6, a rectification circuit 7, a filtering voltage stabilizing circuit 8, a test circuit 11, a first-stage surge protection circuit 9 and a second-stage surge protection circuit 10, wherein the main loop 1 comprises a live wire L and a zero wire N, the test circuit 11 is electrically connected with the main loop 1, the electric leakage signal sampling circuit 3 collects the electric leakage current of the main loop 1, the electric leakage signal sampling circuit 3 is electrically connected with the electric leakage signal processing circuit 4, the electric leakage signal processing circuit 4 is electrically connected with the silicon controlled control circuit 5, the silicon controlled control circuit 5 is electrically connected with the trip coil 2, the current limiting circuit 6 and the rectification circuit 7 are electrically connected in sequence, one end of the trip coil 2 and one end of the rectifying circuit 7 are respectively connected to the main loop 1, the rectifying circuit 7 is electrically connected with the filter rectifying circuit 8, the rectifying filter circuit 8 is electrically connected with the leakage signal processing circuit 4, the first-stage surge protection circuit 9 is arranged between the live wire L and the zero line N, and the second-stage surge protection circuit 10 is arranged between the trip coil 2 and the zero line N.

As shown in fig. 1, the main loop includes a live wire L and a null wire N, the trip coil is a coil KM, the leakage signal sampling circuit includes a zero-sequence transformer TA1, resistors R1-R3, a capacitor C3, and diodes D2-D3, the leakage signal processing circuit includes capacitors C1-C2, capacitors C5-C7, and a leakage chip U1 with model VG54123, the thyristor control circuit includes a diode D1 and a thyristor SCR1, the current limiting circuit includes resistors R4-R5, the rectifying circuit includes a rectifier bridge DB1, the filter voltage stabilizing circuit includes a capacitor C8 and a voltage stabilizing diode ZD1, the TEST circuit includes a TEST key TEST and a resistor RS, the first-stage surge protection circuit includes piezoresistors RV 1-RV 9, the second-stage surge protection circuit includes a piezoresistor RV3, the coil KM controls the breaking of the main loop, the live wire L and the null wire N are both disposed in the zero-sequence transformer TA 56, the zero-sequence transformer TA 53 is wound around the coil, and the two ends of the resistor R3 are connected respectively, a diode D3, a diode D2 and a capacitor C3 are respectively connected in parallel at two ends of a resistor R3, two ends of a capacitor C3 are respectively connected with one end of a resistor R1 and one end of a resistor R2, the other end of the resistor R1 is connected with a first pin of a leaky chip U1, the other end of the resistor R2 is connected with a second pin of a leaky chip U1, a capacitor C1 is connected between the first pin and the second pin of the leaky chip U1, a capacitor C2 is connected between the second pin and the third pin of the leaky chip U1, a capacitor C6 is connected between the sixth pin and the seventh pin of the leaky chip U1, the fourth pin and the fifth pin of the leaky chip U1 are connected, the fourth pin of the leaky chip U1 is connected with one end of the capacitor C1, the other end of the capacitor C1 is respectively connected with one end of the capacitor C1 and the ground, the other end of the varistor RV1 is connected with one end of the varistor RV of the varistor L1 and one end of the resistor L1 in series connection, one end of a piezoresistor RV2 is connected with a zero line N, one end of a coil KM is connected with a live line L, a diode D1 is connected with a thyristor SCR1 in series, a resistor R4 is connected with a resistor R5 in series, the other end of the coil KM is respectively connected with the anode of a diode D1 and one end of a resistor R4, the cathode of the thyristor SCR1 is grounded, the seventh pin of a control electrode leakage chip U1 of the thyristor SCR1, one end of the resistor R5 and the zero line N are respectively connected with the input end of a rectifier bridge DB1, a capacitor C8 is connected with a zener diode ZD1 in parallel, the output end of the rectifier bridge DB1 is respectively connected with the cathode of a zener diode ZD1 and the eighth pin of a leakage chip U1, the anode of the zener diode ZD1 is grounded, one end of a piezoresistor RV3 is connected with the other end, the TEST key TEST is connected with the resistor RS in series, one end of the TEST key TEST is connected with the live wire L, and one end of the resistor RS is connected with the zero line N.

Claims

1. A leakage surge protection circuit, characterized by: the device comprises a main loop, a trip coil, a leakage signal sampling circuit, a leakage signal processing circuit, a silicon controlled control circuit, a current limiting circuit, a rectifying circuit, a filtering voltage stabilizing circuit, a first-stage surge protection circuit and a second-stage surge protection circuit, wherein the main loop is used for connecting a load, the leakage signal sampling circuit collects leakage current of the main loop, the leakage signal sampling circuit is electrically connected with the leakage signal processing circuit, the leakage signal processing circuit is electrically connected with the silicon controlled control circuit, the silicon controlled control circuit is electrically connected with the trip coil, the current limiting circuit and the rectifying circuit are sequentially and electrically connected, one end of the trip coil and one end of the rectifying circuit are respectively connected to the main loop, the rectifying circuit is electrically connected with the filtering rectifying circuit, and the rectifying filtering circuit is electrically connected with the leakage signal processing circuit, the first-stage surge protection circuit is arranged between the live wire L and the zero line N, and the second-stage surge protection circuit is arranged between the trip coil and the zero line N.

2. A leakage surge protection circuit according to claim 1, wherein: the leakage surge protection circuit further comprises a test circuit, and the test circuit is electrically connected with the main loop.

3. A leakage surge protection circuit according to claim 1 or 2, wherein: first order surge protection circuit includes piezo-resistor RV1 and piezo-resistor RV2, piezo-resistor RV1 and piezo-resistor RV2 are established ties, and live wire L is connected to piezo-resistor RV 1's one end, and zero line N is connected to piezo-resistor RV 2's one end.

4. A leakage surge protection circuit according to claim 1 or 2, wherein: the second-stage surge protection circuit comprises a voltage dependent resistor RV3, one end of the voltage dependent resistor RV3 is connected to the trip coil, and the other end of the voltage dependent resistor RV3 is connected to a zero line N.