CN210182037U

CN210182037U - Splicing screen

Info

Publication number: CN210182037U
Application number: CN201921013456.6U
Authority: CN
Inventors: Meixian Zhou; 周美贤; Xiangqing Cen; 岑祥庆; Yonghuai Chen; 陈永淮; Qijun Xie; 谢奇君
Original assignee: Guangzhou Touch-Pie Electronic Technology Co Ltd
Current assignee: Guangzhou Touch Technology Co ltd
Priority date: 2019-06-28
Filing date: 2019-06-28
Publication date: 2020-03-24
Anticipated expiration: 2029-06-28

Abstract

The utility model discloses a spliced screen, which comprises an AD board, wherein the AD board is provided with a master control single chip microcomputer, a switching chip, a single control single chip microcomputer, an external FLASH and a power module, the master control single chip microcomputer is connected with the switching chip, the single control single chip microcomputer and the external FLASH are both connected with the switching chip, and the power module is connected with the master control single chip microcomputer; the power supply module comprises a voltage input end, a rectifier bridge, a first capacitor, a first resistor, a first triode, a third capacitor, a second triode, a second resistor, a third resistor, a first diode, a third triode, a fourth potentiometer, a second capacitor and a voltage output end, wherein one end of the voltage input end is connected with one input end of the rectifier bridge, and the other end of the voltage input end is connected with the other input end of the rectifier bridge. The utility model discloses circuit structure is comparatively simple, the cost is lower, the security and the reliability of convenient maintenance, circuit are higher.

Description

Splicing screen

Technical Field

The utility model relates to a display screen circuit field, in particular to concatenation screen.

Background

The spliced screen is currently divided into a curved liquid crystal spliced screen, a plasma spliced screen, a DLP (digital light processing), a transparent screen and the like, at present, the spliced screen can be matched with auxiliary materials such as a splicing processor, a central control type HDMI (high-definition multimedia interface) matrix, an HDMI distributor and the like to achieve the use of the whole system, wherein the latest technology is the HDMI matrix which can be controlled by a mobile phone. The spliced screen is a complete liquid crystal spliced display unit, can be used as a display independently, and can be spliced into an oversized screen by liquid crystal. According to different use requirements, the changeable large-screen function which can be changed into large and small is realized: the method comprises the following steps of single-screen split display, single-screen independent display, arbitrary combined display, full-screen liquid crystal splicing, vertical screen display and optional compensation or covering of an image frame.

Fig. 1 is a schematic circuit diagram of a power supply portion of a conventional spliced screen, and it can be seen from fig. 1 that the power supply portion of the conventional spliced screen uses many components and parts, and has a complex circuit structure, a high hardware cost and inconvenient maintenance. In addition, the power supply part of the traditional spliced screen lacks corresponding circuit protection functions, such as: the lack of a signal interference prevention function results in poor safety and reliability of the circuit.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model lies in, to the above-mentioned defect of prior art, provide a circuit structure comparatively simple, the cost is lower, the security and the higher concatenation screen of reliability of convenient maintenance, circuit.

The utility model provides a technical scheme that its technical problem adopted is: the spliced screen is constructed and comprises an AD board, wherein a master control single chip microcomputer, a switching chip, a single control single chip microcomputer, an external FLASH and a power supply module are arranged on the AD board, the master control single chip microcomputer is connected with the switching chip, the single control single chip microcomputer and the external FLASH are both connected with the switching chip, and the power supply module is connected with the master control single chip microcomputer;

the power module comprises a voltage input end, a rectifier bridge, a first capacitor, a first resistor, a first triode, a third capacitor, a second triode, a second resistor, a third resistor, a first diode, a third triode, a fourth potentiometer, a second capacitor and a voltage output end, wherein one end of the voltage input end is connected with one input end of the rectifier bridge, the other end of the voltage input end is connected with the other input end of the rectifier bridge, one output end of the rectifier bridge is respectively connected with a collector electrode of the first triode, one end of the first resistor and one end of the first capacitor, a base electrode of the first triode is respectively connected with the other end of the first resistor and one end of the third capacitor, the other end of the third capacitor is respectively connected with a collector electrode of the second triode and a collector electrode of the third triode, and the other output end of the rectifier bridge is respectively connected with the other end of the first capacitor, The one end of the projecting pole of second triode and second resistance is connected, the projecting pole of first triode respectively with the one end of third resistance, a stiff end of fourth potentiometre, the one end of second electric capacity and the one end of voltage output end are connected, the other end of third resistance respectively with the positive pole of first diode and the projecting pole of third triode are connected, the other end of second resistance respectively with the negative pole of first diode, another stiff end of fourth potentiometre, the other end of second electric capacity and the other end of voltage output end are connected, the base of third triode with the sliding end of fourth potentiometre is connected, the capacitance value of third electric capacity is 320 pF.

The spliced screen of the present invention is characterized in that the power module further comprises a second diode, an anode of the second diode is connected to a base of the third triode, a cathode of the second diode is connected to a sliding end of the fourth potentiometer, and a model of the second diode is S-701T.

The spliced screen in, power module still includes fifth resistance, the one end of fifth resistance with the projecting pole of first triode is connected, the other end of fifth resistance with the one end of third resistance is connected, the resistance of fifth resistance is 36k omega.

In the spliced screen of the present invention, the first triode is an NPN-type triode.

In the spliced screen of the present invention, the second triode is an NPN-type triode.

In the spliced screen of the present invention, the third triode is an NPN-type triode.

Implement the utility model discloses a concatenation screen has following beneficial effect: the AD board is provided with a master control singlechip, a switching chip, a single control singlechip, an external FLASH and a power supply module; power module includes voltage input end, the rectifier bridge, first electric capacity, first resistance, first triode, the third electric capacity, the second triode, the second resistance, the third resistance, first diode, the third triode, the fourth potentiometre, second electric capacity and voltage output end, this power module compares with the power supply part of traditional concatenation screen, the components and parts that it used are less, owing to saved some components and parts, can reduce the hardware cost like this, in addition, the third electric capacity is used for preventing the interference between first triode and the second triode, consequently the utility model discloses circuit structure is comparatively simple, the cost is lower, convenient maintenance, the security and the reliability of circuit are higher.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a schematic circuit diagram of the power supply portion of a conventional tiled display;

fig. 2 is a schematic structural view of an AD board in an embodiment of the splicing screen of the present invention;

fig. 3 is a schematic circuit diagram of the power supply module in the embodiment.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

The utility model discloses in the concatenation screen embodiment, this concatenation screen includes the AD board, and the schematic structure diagram of this AD board is shown in FIG. 2. In fig. 2, a master control single chip microcomputer 1, a switching chip 2, a single control single chip microcomputer 3, an external FLASH4 and a power module 5 are arranged on the AD board, the master control single chip microcomputer 1 is connected with the switching chip 2, the single control single chip microcomputer 3 and the external FLASH4 are both connected with the switching chip 2, and the power module 5 is connected with the master control single chip microcomputer 1.

The master control singlechip 1 is connected with an upper computer, receives a cascade upgrade command and cascade upgrade data sent by the upper computer, and sends the cascade upgrade command when the upper computer is ready for cascade upgrade. And after the upper computer sends the cascade upgrading command, sending the cascade upgrading data until the sending of the cascade upgrading data is finished.

The main control single chip microcomputer 1 sends a switching command according to the cascade upgrading command, and the switching chip 2 completes switching of data channels according to the switching command. When the main control single chip microcomputer 1 receives the cascade upgrading command, the switching name is sent to the switching chip 2. In a normal working state, the data channel is in a state that the main control single chip microcomputer 1 is connected with the external FLASH4 through the switching chip 2, the main control single chip microcomputer 1 is disconnected from the external FLASH4, and the data channel is switched into a state that the main control single chip microcomputer 1 is connected with the external FLASH4 through the switching chip 2 and the single control single chip microcomputer 3 is disconnected from the external FLASH4, so that the main control single chip microcomputer 1 updates data of the external FLASH4 through the switching chip 2.

The switching chip 2 also receives the cascade upgrade data, and the external FLASH4 stores the cascade upgrade data to update the original data. When the data channel is switched to the state that the main control single chip microcomputer 1 is connected with the external FLASH4 through the switching chip 2 and the single control single chip microcomputer 3 is disconnected from the external FLASH4, the switching chip 2 receives the cascade upgrading data, and the external FLASH4 receives the cascade upgrading data through the switching chip 2 and stores the cascade upgrading data to update the original data. The switching chip 2 also reads the cascade upgrade data stored in the external FLASH4, and the single-control single chip microcomputer 3 receives the cascade upgrade data read by the external FLASH 4.

In this embodiment, the main control single chip microcomputer 1, the switching chip 2, the single control single chip microcomputer 3 and the external FLASH4 are all realized by adopting structures in the prior art, and the working principle thereof also adopts working principles in the prior art, for example: the model of the main control single chip microcomputer 1 is STM8S207C6T6, the model of the switching chip 2 is 74HC4053/SO, and the model of the external FLASH4 is EN25F16-100, which is not described again here.

Fig. 3 is a schematic circuit diagram of a power supply module in this embodiment, in fig. 3, the power supply module 5 includes a voltage input terminal Vin, a rectifier bridge Z, a first capacitor C1, a first resistor R1, a first transistor Q1, a third capacitor C3, a second transistor Q2, a second resistor R2, a third resistor R3, a first diode D1, a third transistor Q3, a fourth potentiometer RP4, a second capacitor C2, and a voltage output terminal Vo, wherein one end of the voltage input terminal Vin is connected to one input terminal of the rectifier bridge Z, the other end of the voltage input terminal Vin is connected to the other input terminal of the rectifier bridge Z, one output terminal of the rectifier bridge Z is respectively connected to a collector of the first transistor Q1, one end of the first resistor R1, and one end of the first capacitor C1, a base of the first transistor Q1 is respectively connected to the other end of the first resistor R1 and one end of the third capacitor C3, and the other end of the third capacitor C3 is respectively connected to a collector 3 of the second transistor Q2, the other output end of the rectifier bridge Z is connected with the other end of the first capacitor C1, the emitter of the second triode Q2 and one end of the second resistor R2, the emitter of the first triode Q1 is connected with one end of the third resistor R3, one fixed end of the fourth potentiometer RP4, one end of the second capacitor C2 and one end of the voltage output Vo, the other end of the third resistor R3 is connected with the anode of the first diode D1 and the emitter of the third triode Q3, the other end of the second resistor is connected with the cathode of the first diode D1, the other fixed end of the fourth potentiometer RP4, the other end of the second capacitor C2 and the other end of the voltage output Vo, and the base of the third triode Q3 is connected with the sliding end of the fourth potentiometer RP 4.

Compared with the power supply part of the traditional spliced screen in the figure 1, the power supply module 5 has the advantages of fewer used components, simpler circuit structure and convenience in maintenance, and can reduce the hardware cost due to the fact that some components are saved. In addition, the third capacitor C3 is a coupling capacitor for preventing interference between the first transistor Q1 and the second transistor Q2, so that the circuit has high safety and reliability, and achieves better technical effects than the conventional technology with fewer components.

The effect of the coupling capacitor is: an ac signal is passed from a previous stage to a next stage. The coupling method is also a direct coupling and a transformer coupling method. The direct coupling efficiency is highest, the signal is not distorted, but the adjustment of the front and rear two-stage working points is complex and mutually involved. In order to prevent the working point of the next stage from being affected by the previous stage, the previous stage and the next stage need to be separated in terms of direct current, and meanwhile, the alternating current signal can be smoothly transmitted from the previous stage to the next stage. They can both transmit AC signals and cut off DC, so that the working points of the front and rear stages are not involved. However, the difference is that the phase of the signal is delayed a little when the signal is transmitted by a capacitor, and the high frequency component of the signal is lost a little when the signal is transmitted by a transformer. Generally, a capacitor is commonly used as a coupling element in small signal transmission, and a transformer is commonly used as a coupling element in large signal or strong signal transmission. The utility model discloses in adopt third electric capacity C3 as coupling element, can make the operating point of back one-level not receive the influence of preceding one-level like this, that is to say make second triode Q2's operating point not receive first triode Q1's influence. The third capacitor C3 is an inter-stage coupling capacitor, and functions to isolate the dc bias circuits of the front and rear stages of the first transistor Q1 and the second transistor Q2, so as to prevent the static operating points of the front and rear stages from affecting each other. The working principle of the method utilizes the working principle of interstage coupling electricity in the prior art, and the mastiff is not described herein.

It should be noted that, in the present embodiment, the capacitance of the third capacitor C3 is 320 pF. Of course, in practical applications, the capacitance value of the third capacitor C3 may be adjusted accordingly, that is, the capacitance value of the third capacitor C3 may be increased or decreased accordingly.

In this embodiment, the first transistor Q1, the second transistor Q2, and the third transistor Q3 are all NPN transistors. Certainly, in practical applications, the first transistor Q1, the second transistor Q2, and the third transistor Q3 may also all adopt PNP transistors, but the circuit structure is also changed accordingly.

In this embodiment, the power module 5 further includes a second diode D2, an anode of the second diode D2 is connected to the base of the third transistor Q3, and a cathode of the second diode D2 is connected to the sliding end of the fourth potentiometer RP 4. The second diode D2 is a current limiting diode, and is used for current limiting protection of the base current of the third transistor Q3. The current limiting protection principle is as follows: when the base current of the third triode Q3 is large, the base current of the third triode Q3 can be reduced by the second diode D2 to keep the base current in a normal working state, so that the components in the circuit are not burnt out due to too large current, and the safety and reliability of the circuit are further enhanced.

It should be noted that in this embodiment, the second diode D2 has a model number S-701T. Of course, in practical applications, the second diode D2 may also be another type of diode with similar functions.

In this embodiment, the power module 5 further includes a fifth resistor R5, one end of the fifth resistor R5 is connected to the emitter of the first transistor Q1, and the other end of the fifth resistor R5 is connected to one end of the third resistor R3. The fifth resistor R5 is a current limiting resistor, and is used for current limiting protection of the emitter current of the first transistor Q1. The current limiting protection principle is as follows: when the emitter current of the first triode Q1 is large, the fifth resistor R5 can reduce the emitter current of the first triode Q1 to keep the first triode Q1 in a normal working state, so that the elements in the circuit are not burnt out due to the large current, and the safety and reliability of the circuit are further enhanced.

It should be noted that, in the present embodiment, the resistance of the fifth resistor R5 is 36k Ω. Of course, in practical applications, the resistance of the fifth resistor R5 may be adjusted according to specific situations, that is, the resistance of the fifth resistor R5 may be increased or decreased according to specific situations.

In a word, in this embodiment, this power module 5 compares with the power supply part of traditional concatenation screen, and its components and parts that use are less, and circuit structure is comparatively simple, and convenient maintenance can reduce the hardware cost like this owing to saved some components and parts. In addition, since the power module 5 is provided with a coupling capacitor, the safety and reliability of the circuit are high.

The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A spliced screen is characterized by comprising an AD board, wherein a master control single chip microcomputer, a switching chip, a single control single chip microcomputer, an external FLASH and a power module are arranged on the AD board, the master control single chip microcomputer is connected with the switching chip, the single control single chip microcomputer and the external FLASH are both connected with the switching chip, and the power module is connected with the master control single chip microcomputer;

2. The spliced screen of claim 1, wherein the power module further comprises a second diode, an anode of the second diode is connected to a base of the third transistor, a cathode of the second diode is connected to a sliding terminal of the fourth potentiometer, and the second diode is of a type S-701T.

3. The spliced screen of claim 2, wherein the power module further comprises a fifth resistor, one end of the fifth resistor is connected to the emitter of the first triode, the other end of the fifth resistor is connected to one end of the third resistor, and the resistance of the fifth resistor is 36k Ω.

4. The tiled screen of any of claims 1-3, wherein the first transistor is an NPN transistor.

5. The tiled screen of any of claims 1-3, wherein the second transistor is an NPN transistor.

6. The tiled screen of any of claims 1-3, wherein the third transistor is an NPN transistor.