CN210167544U

CN210167544U - PCIE connector

Info

Publication number: CN210167544U
Application number: CN201921580023.9U
Authority: CN
Inventors: 刘法志; 徐国振
Original assignee: Suzhou Wave Intelligent Technology Co Ltd
Current assignee: Suzhou Wave Intelligent Technology Co Ltd
Priority date: 2019-09-21
Filing date: 2019-09-21
Publication date: 2020-03-20
Anticipated expiration: 2029-09-21

Abstract

The embodiment of the utility model discloses PCIE connector, including first connector and second connector, first connector includes a plurality of first terminals, the second connector includes a plurality of second terminals, first terminal and second terminal one-to-one, first terminal includes first welding part, first atress portion and first contact site, the second terminal includes second contact site, arm of force portion, horizontal part and second welding part. The embodiment of the utility model provides a through the contact site and the closed angle position of optimizing connector first terminal and second terminal, improve signal integrality and destroy serious problem in the signal transmission, the utility model discloses the optimization scheme of connector can expand the connector of other high-speed signals, like SATA, SAS, MDI signal etc.

Description

PCIE connector

Technical Field

The utility model relates to an electric connector field, concretely relates to PCIE connector.

Background

With the advent of the high-speed circuit era, various types of large-scale integrated circuits are continuously emerging, and the high-speed circuit has replaced the traditional low-speed circuit and becomes the mainstream trend of the circuit design development in the world nowadays. Connectors in high speed signals play a crucial role.

In a high-speed link, a connector often carries multiple pairs of high-speed line transmission jobs. In practical design, the connector connects two blocked or isolated different circuits, so that two isolated circuit boards complete signal transmission, which requires that the electrical performance and the mechanical performance of the connector are improved well. In the prior art, the winding is often set according to empirical values, and the design of the connector in actual design is finished without referential data, so that a plurality of uncertain factors are brought to the design.

If the connector is not well designed, the receiving end cannot respond accurately, so that the signal integrity of the connector in signal transmission is seriously damaged, which is directly related to whether the whole system design can successfully realize the application function. After the two terminals of the connector are electrically connected, except for being used as a signal transmission part, a part which is in contact with air also exists, if the length of the connector is too long, a pin Stub is caused, on one hand, extra noise is generated, on the other hand, the pin Stub is reflected back and forth at a receiving end until the pin Stub is finally stable, and the eye height in an eye diagram is low; the part contacting with the air can form an antenna effect because of being directly exposed in the air, on one hand, electromagnetic waves are introduced into the noise from an external electromagnetic field, and on the other hand, the impedance discontinuity at the angle change point can cause reflection. At the stressed part of the terminal, because the sharp angle is too large, capacitance exists at the pin, so that the eye width in an eye pattern is narrowed, and the signal is not good.

SUMMERY OF THE UTILITY MODEL

The embodiment of the utility model provides an in the embodiment provides a PCIE connector, through contact site and the closed angle position of optimizing the connector terminal, improves signal integrity and destroys serious problem in signal transmission.

The embodiment of the utility model discloses following technical scheme:

the utility model provides a PCIE connector, including first connector and second connector, first connector includes first terminal, the second connector includes the second terminal, and first terminal includes a plurality of terminal, and the second terminal includes a plurality of terminal, first terminal and second terminal one-to-one, when first connector and second connector are to inserting, first terminal and second terminal contact form electric connection.

Further, the first terminal comprises a first welding part, a first stress part and a first contact part, the first welding part is connected with the first stress part through a first bending part, and the first stress part is connected with the first contact part through a second bending part;

the second terminal comprises a second contact part, a force arm part, a horizontal part and a second welding part, the second contact part is connected with the force arm part through a third bending part, the force arm part is connected with the horizontal part through a fourth bending part, and the horizontal part is connected with the second welding part through a fifth bending part.

Further, an angle of 120 degrees is formed between the first welding portion and the first force receiving portion, and an angle of 120 degrees is formed between the first force receiving portion and the first contact portion.

Further, the first contact portion includes a first contact portion inner side and a first contact portion outer side, and a length of the first contact portion outer side is 4 mm.

Further, the horizontal portion is larger than the width of the force arm portion and the second weld portion.

Furthermore, the second contact part comprises an extension part and a second force-bearing part which are connected, the extension part is connected with the second force-bearing part through a sixth bending part, and the second force-bearing part is connected with the force arm part through a third bending part.

Further, an angle of 150 degrees is formed between the extending portion and the second force-bearing portion, and an angle of 150 degrees is formed between the second force-bearing portion and the force arm portion.

Further, the length of the extension is 2.5 mm.

The effects provided in the contents of the present invention are only the effects of the embodiments, not all the effects of the present invention, and one of the above technical solutions has the following advantages or advantageous effects:

1) the PCIE connector provided by the utility model shortens the length of the outer side of the first contact part to 4mm, shortens the length of the extension part to 2.5mm, weakens the pin Stub and the antenna effect, and also reduces the generated noise and reflection, thereby reducing the loss of signal integrity;

2) the utility model provides a PCIE connector is 120 with the angle increase between first weld part and the first atress portion, and the angle increase between first atress portion and the first contact site is 120, and the increase is 150 between extension and the second atress portion, and the increase is 150 between second atress portion and the arm of force portion, has weakened the electric capacity effect that the closed angle produced too greatly, has reduced the loss of signal integrality.

Because the differential impedance that different signal transmission required is roughly the same, and common characteristic impedance is 85ohm, 100ohm, so the utility model discloses the optimization scheme of connector can expand the connector of other high-speed signals, like SATA, SAS, MDI signal etc..

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic plan view of a PCIE connector according to an embodiment of the present invention;

fig. 2 is a schematic perspective view of a terminal of a PCIE connector according to an embodiment of the present invention;

fig. 3 is a front view of a terminal of a PCIE connector according to an embodiment of the present invention;

fig. 4 is a simulation analysis diagram of insertion loss before and after terminal optimization of the PCIE connector according to the embodiment of the present invention;

fig. 5 is a simulation analysis diagram of return loss before and after terminal optimization of the PCIE connector according to the embodiment of the present invention;

in the figure, the first connector S1, the second connector S2, the first terminal 1, the second terminal 2, the first soldering portion 11, the first force-receiving portion 12, the first contact portion 13, the first bent portion 14, the second bent portion 15, the first contact portion inner side 131, the first contact portion outer side 132, the second contact portion 20, the force arm portion 23, the horizontal portion 22, the second soldering portion 21, the extension portion 25, the second force-receiving portion 24, the third bent portion 27, the fourth bent portion 26, the fifth bent portion 29, and the sixth bent portion 28.

Detailed Description

In order to clearly illustrate the technical features of the present invention, the present invention is explained in detail by the following embodiments in combination with the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and processes are omitted so as to not unnecessarily limit the invention.

As shown in fig. 1 and 2, the utility model provides a PCIE connector, including first connector S1 and second connector S2, first connector S1 includes first terminal 1, second connector S2 includes second terminal 2, first terminal 1 includes a plurality of terminal, second terminal 2 includes a plurality of terminal, first terminal 1 and second terminal 2 one-to-one, when first connector S1 and second connector S2 are to inserting, first terminal 1 and second terminal 2 contact and form electric connection.

As shown in fig. 3, the first terminal 1 includes a first welding portion 11, a first force-receiving portion 12, and a first contact portion 13, the first welding portion 11 is connected to the first force-receiving portion 12 by a first bent portion 14, and the first force-receiving portion 12 is connected to the first contact portion 13 by a second bent portion 15; the first soldering part 11 is used for soldering with a corresponding soldering point on the PCB, and the first force-receiving part 12 provides a force to the contact surface when the two terminals are connected.

An angle of 120 degrees is formed between the first welding part 11 and the first force-bearing part 12, and an angle of 120 degrees is formed between the first force-bearing part 12 and the first contact part 13; compared with the angle before optimization, the angle after optimization is more gentle, the capacitance effect of the sharp angle part can be weakened, and the signal quality is improved.

The first contact portion 13 includes a first contact portion inner side 131 and a first contact portion outer side 132, the length of the first contact portion outer side 132 being 4 mm; the reduced length of the first contact outer side 132 weakens the pin Stub and antenna effect, reduces noise and reflections that occur, and thus reduces loss of signal integrity.

The second terminal 2 includes a second contact portion 20, a force arm portion 23, a horizontal portion 22 and a second soldering portion 21,

the second contact portion 20 is connected to the force arm portion 23 by a third bent portion 27, the force arm portion 23 is connected to the horizontal portion 22 by a fourth bent portion 26, and the horizontal portion 22 is connected to the second welded portion 21 by a fifth bent portion 29; the second contact portion 20 provides a force to the contact surface when the two terminals are connected, and the second soldering portion 21 is used for soldering with a corresponding soldering point on the PCB.

The horizontal portion 22 is wider than the force arm portion 23 and the second welded portion 21, and the force applied to the force arm portion 23 can be increased.

The second contact portion 20 includes an extension portion 25 and a second force-receiving portion 24, the extension portion 25 is connected to the second force-receiving portion 24 by a sixth bent portion 28, and the second force-receiving portion 24 is connected to the force arm portion 23 by a third bent portion 27.

An angle of 150 degrees is formed between the extension part 25 and the second force-bearing part 24, and an angle of 150 degrees is formed between the second force-bearing part 24 and the moment arm part 23; compared with the angle before optimization, the angle after optimization is more gentle, the capacitance effect of the sharp angle part can be weakened, and the signal quality is improved.

The length of the extension part 25 is 2.5mm, and the shortened extension part 25 weakens the pin Stub and the antenna effect, and improves the signal quality.

The utility model discloses an insertion loss and return loss around optimizing connector terminal carry out simulation analysis, verify the improvement of signal integrality around optimizing.

As shown in fig. 4, for a simulation analysis chart of the insertion loss before and after the optimization of the connector, the rise time of the test impedance is set to 50ps, and the insertion loss before and after the optimization is obtained by measuring impedance data before and after the optimization of the connector. The difference of insertion loss before and after optimization at the frequency point of 4Ghz can be seen by a simulation chart to be 0.5 dB; on the other hand, at a resonance point, namely a point where the loss of a certain frequency point can be rapidly reduced, the frequency point is 4.8GHz before optimization and 5.1GHz after optimization, and the frequency point is further away from a base frequency point by 4GHz of a PCIE3.0 base frequency signal; in addition, the difference between the resonance point and the expected smooth insertion loss before optimization is about 1dB, and the difference is 0.7dB after optimization, so that the optimized connector can better meet the signal quality.

As shown in fig. 5, for a simulation analysis chart of return loss before and after connector optimization, the rise time of the test impedance is set to 50ps, and the insertion loss before and after optimization is obtained by measuring impedance data before and after connector optimization. As can be seen from the simulation graph, under the same frequency, after the 2G frequency point, the optimized return loss is lower; the insertion loss difference is about 8dB before and after optimization at the frequency point of 4Ghz, and the high-speed signal after optimization can reduce great crosstalk, so that the signal quality can be better ensured. Since high-speed signals such as PCIE, SATA, SAS and the like can exceed 6G, the optimized connector can meet the requirement of return loss.

The above description is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that a plurality of modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations are also considered as the protection scope of the present invention.

Claims

1. The utility model provides a PCIE connector, includes first connector and second connector, its characterized in that, first connector includes first terminal, the second connector includes the second terminal, and first terminal includes a plurality of terminal, and the second terminal includes a plurality of terminal, first terminal and second terminal one-to-one, when first connector and second connector are to inserting, first terminal and second terminal contact form electric connection.

2. The PCIE connector according to claim 1, wherein the first terminal comprises a first welding portion, a first stressed portion and a first contact portion, the first welding portion is connected to the first stressed portion through a first bending portion, and the first stressed portion is connected to the first contact portion through a second bending portion;

3. The PCIE connector of claim 2, wherein an angle between the first welding portion and the first force-receiving portion is 120 °, and an angle between the first force-receiving portion and the first contact portion is 120 °.

4. The PCIE connector of claim 2, wherein the first contact portion comprises a first contact portion inner side and a first contact portion outer side, and the length of the first contact portion outer side is 4 mm.

5. The PCIE connector of claim 2, wherein the horizontal portion is wider than the width of the force arm portion and the second solder portion.

6. The PCIE connector of claim 2, wherein the second contact portion comprises an extension portion and a second force-bearing portion, the extension portion is connected to the second force-bearing portion through a sixth bending portion, and the second force-bearing portion is connected to the arm of force through a third bending portion.

7. The PCIE connector of claim 6, wherein an angle between the extension portion and the second force-bearing portion is 150 °, and an angle between the second force-bearing portion and the force arm portion is 150 °.

8. The PCIE connector of claim 6, wherein the length of the extension is 2.5 mm.