CN210157538U

CN210157538U - FPGA experimental box

Info

Publication number: CN210157538U
Application number: CN201920132947.6U
Authority: CN
Inventors: 张慧
Original assignee: Yancheng Vocational Institute of Industry Technology
Current assignee: Yancheng Vocational Institute of Industry Technology
Priority date: 2019-01-25
Filing date: 2019-01-25
Publication date: 2020-03-17
Anticipated expiration: 2029-01-25

Abstract

The utility model discloses a FPGA experimental box, which comprises a shell, a first roller, a PCB, a sealing cover, a disk display rack and a FPGA chip, wherein the sealing cover is arranged at the rear side of the shell, the sealing cover is connected with the left end of the shell through a hinge, a display screen is fixedly arranged in the sealing cover, a bolt is arranged at the right side of the front end of the sealing cover, the PCB is fixedly arranged at the lower part in the shell, the PCB is electrically connected with the display screen, the disk display rack is arranged at the left side of the PCB, a slot is electrically connected at the top of the PCB, and the FPGA chip is inserted at the upper part in the shell. The device is connected with external equipment, the display screen is installed on the sealing cover, and the sealing cover can be opened after the pressing block is pressed down.

Description

FPGA experimental box

Technical Field

The utility model relates to a proof box specifically is a FPGA experimental box.

Background

The FPGA is a field programmable gate array, and is a product further developed on the basis of programmable devices such as PAL, GAL, CPLD and the like. The circuit is a semi-custom circuit in the field of application-specific integrated circuits, not only overcomes the defects of the custom circuit, but also overcomes the defect that the number of gate circuits of the original programmable device is limited.

FPGA proof box for debug the FPGA chip, or reprogram, modify programming etc. to the FPGA chip, and common FPGA proof box, it is comparatively troublesome when carrying out the installation of FPGA chip, and insert through manual, insert the back probably because insert askewly and insert and appear contact failure, the proof box closing cap is connected with the machine case through a plurality of screw, and is comparatively troublesome when the installation is dismantled. Accordingly, one skilled in the art provides an FPGA experimental box to solve the problems set forth in the background above.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a FPGA experimental box to solve the problem that proposes among the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme:

an FPGA experimental box comprises a shell, a first roller, a PCB, a sealing cover, a disk display rack and an FPGA chip, wherein the sealing cover is arranged on the rear side of the shell and is connected with the left end of the shell through a hinge;

the FPGA chip comprises a shell and is characterized in that a second roller and a first roller are arranged on the left side and the right side of the shell corresponding to the FPGA chip respectively, a plurality of tooth blocks are symmetrically arranged on the first roller and the second roller, a touch block is arranged on the first roller opposite to the tooth blocks, an upper baffle and a lower baffle are arranged on the right wall of the shell corresponding to the upper side and the lower side of the touch block respectively, a first limit switch and a second limit switch are arranged on the upper baffle and the lower baffle respectively, a jack is arranged in the right wall of the shell, and a bolt is inserted into the jack.

As a further aspect of the present invention: the right wall of the shell is provided with a plurality of signal interfaces, the signal interfaces are electrically connected with the PCB, and the signal interfaces comprise a USB interface, a network cable interface and a VGA interface.

As a further aspect of the present invention: the rear side of the first roller is connected with the motor, a first driving wheel is arranged between the motor and the first roller, the rear side of the second roller is connected with a second driving wheel, and the second driving wheel is connected with the first driving wheel through a belt.

As a further aspect of the present invention: the jack is characterized in that the upper side and the lower side of the inner side of the jack are respectively provided with a clamping block, the right side of the jack is provided with a pressing block, a connecting rod is arranged between the left end of the pressing block and the upper clamping block and between the left end of the pressing block and the lower clamping block, the left side and the right side of the connecting rod are respectively connected with the clamping blocks and the pressing block in a rotating mode.

As a further aspect of the present invention: be provided with a plurality of louvre on the shell antetheca, correspond the FPGA chip left and right sides on the inboard antetheca of shell and be provided with the locating plate.

Compared with the prior art, the beneficial effects of the utility model are that:

the utility model discloses structural design is simple reasonable, use convenient operation swift, the practicality is very high, the FPGA chip can freely be followed the proof box and taken out or insert, when inserting or taking out, through motor drive, and through the locating plate location, it is more accurate to make things convenient for more during the insertion, provide a plurality of signal interface on the PCB board, be used for equipment and external equipment to be connected, the display screen is installed on the closing cap, can open the closing cap after pressing down the briquetting, lock by oneself after closing the closing cap, it is very convenient during the use, still be provided with the disk display rack in the shell in addition, the extension dish of easy to assemble.

Drawings

FIG. 1 is a schematic structural diagram of an FPGA experimental box.

FIG. 2 is a schematic diagram of a roller transmission structure in an FPGA experiment box.

FIG. 3 is a schematic structural diagram of a door lock in an FPGA experiment box.

In the figure: 1-shell, 2-upper baffle, 3-first roller, 4-rotating shaft, 5-first limit switch, 6-touch block, 7-second limit switch, 8-lower baffle, 9-jack, 10-signal interface, 11-PCB, 12-disk display rack, 13-hinge, 14-sealing cover, 15-bolt, 16-display screen, 17-FPGA chip, 18-connecting electric board, 19-slot, 20-boss, 21-tooth block, 22-second roller, 23-positioning board, 24-motor, 25-first driving wheel, 26-belt, 27-second driving wheel, 26-rotating shaft, 5-first limit switch, 6-touch block, 7-second limit switch, 8-lower baffle, 9-jack, 10-signal interface, 11-PCB, 12-disk display rack, 13-hinge, 14-sealing cover, 15,

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 1 to 3, in an embodiment of the present invention, an FPGA experimental box includes a housing 1, a first roller 3, a PCB 11, a sealing cover 14, a disk display rack 12, and an FPGA chip 17, where the sealing cover 14 is disposed at a rear side of the housing 1, the sealing cover 14 is connected to a left end of the housing 1 through a hinge 13, a display screen 16 is fixedly disposed in the sealing cover 14, a plug 15 is disposed at a right side of a front end of the sealing cover 14, the PCB 11 is fixedly disposed below an inner portion of the housing 1, the PCB 11 is electrically connected to the display screen 16, the disk display rack 12 is disposed at a left side of the PCB 11, a slot 19 is electrically connected to a top of the PCB 11, the FPGA chip 17 is inserted above an inner portion of the housing 1, bosses 20 are disposed at left and right ends of the FPGA chip 17, and a connection electric board 18 is disposed at a bottom;

the utility model discloses a shell, including shell 1, FPGA chip 17, first gyro wheel, second gyro wheel 22, first gyro wheel 3, a plurality of tooth piece 21, first gyro wheel 21, touch piece 6, upper baffle 2 and lower baffle 8, be provided with first limit switch 5 and second limit switch 7 respectively on upper baffle 2 and the lower baffle 8, be provided with jack 9 in the shell 1 right wall, plug 15 inserts and establishes in jack 9 that the left and right sides that corresponds FPGA chip 17 in shell 1 is provided with second gyro wheel 22 respectively, and the symmetry is provided with a plurality of tooth piece 21 on first gyro wheel, and the first gyro wheel is provided with touch piece 6 with tooth piece 21 opposite side on the first gyro wheel, correspond on the shell.

The right wall of the shell 1 is provided with a plurality of signal interfaces 10, the signal interfaces 10 are electrically connected with the PCB 11, and the signal interfaces 10 comprise USB interfaces, network cable interfaces and VGA interfaces.

The rear side of the first roller 3 is connected with a motor 24, a first driving wheel 25 is arranged between the motor 24 and the first roller 3, the rear side of the second roller 22 is connected with a second driving wheel 27, and the second driving wheel 27 is connected with the first driving wheel 25 through a belt 26.

The upper side and the lower side of the inner side of the insertion hole 9 are both provided with a clamping block 29, the right side of the insertion hole 9 is provided with a pressing block 31, a connecting rod 30 is arranged between the left end of the pressing block 31 and the upper clamping block 29 and between the left end of the pressing block 31 and the lower clamping block 29, the left side and the right side of the connecting rod 30 are respectively rotatably connected with the clamping block 29 and the pressing block 31, and the opposite ends of.

A plurality of heat dissipation holes are formed in the front wall of the shell 1, and positioning plates 23 are arranged on the front wall of the inner side of the shell 1 corresponding to the left side and the right side of the FPGA chip 17.

The utility model discloses a theory of operation is:

the utility model relates to an FPGA experimental box, when in use, after an FPGA chip is inserted into a shell, the boss 20 on the FPGA chip drives the gear block 21 to rotate the first roller 3, the touch block 6 leaves the first limit switch 7, the motor 24 is started to drive the first roller 3 to rotate, meanwhile, the second roller 22 is driven to rotate through the driving wheel and the belt 26, so that the tooth blocks 21 at the left and right sides can stir the projection 20 to move downwards, the connecting electric plate 18 at the lower end of the FPGA chip can be inserted into the slot 19, thereby connecting the FPGA chip 17 with the control system on the PCB board 11, arranging a disk display rack 12 in the shell 1 for placing disks, installing a display screen 16 on a sealing cover 14, installing the sealing cover 14 on the shell 1 through a bolt 15 and a hinge 13, after pressing a pressing block 31, the connecting rod 30 pushes the latch 29 to move up and down, and the cover 14 can be opened at this time.

It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. An FPGA experimental box comprises a shell (1), a first roller (3), a PCB (11), a sealing cover (14), a disk display rack (12) and an FPGA chip (17), and is characterized in that the sealing cover (14) is arranged at the rear side of the shell (1), the sealing cover (14) is connected with the left end of the shell (1) through a hinge (13), a display screen (16) is fixedly arranged in the sealing cover (14), a plug pin (15) is arranged at the right side of the front end of the sealing cover (14), the PCB (11) is fixedly arranged below the inner part of the shell (1), the PCB (11) is electrically connected with the display screen (16), the disk display rack (12) is arranged at the left side of the PCB (11), a slot (19) is electrically connected to the top of the PCB (11), the FPGA chip (17) is inserted above the inner part of the shell (1), bosses (20) are arranged at the left end and the right end of the FPGA chip (17), the bottom of the FPGA chip (17) is provided with a connecting electric plate (18);

the utility model discloses a shell (1) is inside to be provided with second gyro wheel (22) and first gyro wheel (3) respectively corresponding FPGA chip (17) left and right sides, and the symmetry is provided with a plurality of tooth piece (21) on first gyro wheel (3) and second gyro wheel (22), is provided with touch piece (6) with tooth piece (21) opposite side on the first gyro wheel, correspond on shell (1) right wall and touch piece (6) upper and lower both sides and be provided with overhead gage (2) and lower baffle (8) respectively, be provided with first limit switch (5) and second limit switch (7) on overhead gage (2) and lower baffle (8) respectively, be provided with jack (9) in shell (1) right wall, plug (15) are inserted and are established in jack (9).

2. The FPGA experimental box of claim 1, characterized in that a plurality of signal interfaces (10) are arranged on the right wall of the housing (1), the signal interfaces (10) are electrically connected with the PCB (11), and the signal interfaces (10) comprise a USB interface, a network cable interface and a VGA interface.

3. The FPGA experimental box of claim 1, characterized in that the rear side of the first roller (3) is connected with a motor (24), a first driving wheel (25) is arranged between the motor (24) and the first roller (3), the rear side of the second roller (22) is connected with a second driving wheel (27), and the second driving wheel (27) is connected with the first driving wheel (25) through a belt (26).

4. The FPGA experimental box of claim 1, wherein the upper and lower sides of the inner side of the insertion hole (9) are provided with fixture blocks (29), the right side of the insertion hole (9) is provided with a pressing block (31), a connecting rod (30) is arranged between the left end of the pressing block (31) and the upper and lower fixture blocks (29), the left and right sides of the connecting rod (30) are respectively rotatably connected with the fixture blocks (29) and the pressing block (31), and the opposite ends of the two fixture blocks (29) are provided with springs (28).

5. The FPGA experimental box of claim 1, characterized in that a plurality of heat dissipation holes are formed in the front wall of the housing (1), and positioning plates (23) are arranged on the front wall of the inner side of the housing (1) corresponding to the left and right sides of the FPGA chip (17).