CN210129222U - Device for measuring lengths of NCSI clock source signal wires - Google Patents
Device for measuring lengths of NCSI clock source signal wires Download PDFInfo
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- CN210129222U CN210129222U CN201921430006.7U CN201921430006U CN210129222U CN 210129222 U CN210129222 U CN 210129222U CN 201921430006 U CN201921430006 U CN 201921430006U CN 210129222 U CN210129222 U CN 210129222U
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Abstract
The utility model provides a device with equal length for NCSI clock source signal wire, which comprises a BMC, an external clock source and a NCSI connector on the mainboard, and a network interface controller and a network card interface on the network card; the BMC is connected with the NCSI connector through a clock line L5; the external clock source is connected with the NCSI connector through L1 and L2; the network card interface is connected with the network card interface through a clock line L4; the network card interface is connected with the NCSI connector through L3, and the length of an equal-length line L6 between an external clock source on the mainboard and the BMC is adjusted by adjusting the length of L3. L1, L2, L4, and L5 are fixed values, L3 and L6 are external CABLE CABLEs, and the length of L6 is adjusted by the length of L3 by sharing the NCSI connector. The utility model discloses utilize the NCSI connector from the area on the mainboard, reach dynamic adjustment NCSI clock source length through outside cable and match.
Description
Technical Field
The utility model belongs to the technical field of server clock signal line design, in particular to be applied to isometric device of NCSI clock source signal line.
Background
With the rapid development of IT technology, people have higher and higher requirements on the length of a clock signal line of a server. Taking the server BMC (AST2500) with the highest market occupation rate at present as an example, 2 types of topology diagrams of the NC-SI clock source provided according to the chip specification are provided, as shown in fig. 1, a schematic diagram of the NCSI clock source generated by the BMC is given. Because the BMC has limited driving capability, 10inch at the longest, it is not suitable for longer applications. For the length limitation requirement of fig. 1, as shown in fig. 2, a schematic diagram for solving the length limitation by an external clock source is given. In addition, the 10inch length limitation can be solved by an external clock source, but the length matching requires special consideration. The former length matching specification needs to do special length-winding action on the PCB to meet the specification. The winding mode is two kinds, and the right angle is walked the line and is the worst in the PCB wiring, seems on the signal line level, and the turn can make the line width of transmission line change, causes impedance discontinuity and capacitive load, can slow down rise time, and impedance discontinuity again can cause the reflection of signal, and shortcomings such as EMI that the right angle pointed end produced. The most common way to match the length on a PCB board is currently a serpentine. It minimizes the effect of the right-angled traces on the signal, but if the length matching requires a longer length, then more PCB space is required to meet the serpentine specifications, since the greater the angle at which the serpentine is wound, the less the coupling effect on each other. If the Ethernet is connected through 20cm of cable, the PCB engineer needs to use a special winding method on the PCB board to achieve the specification of length matching, which not only wastes PCB space but also limits the length of the cable.
The Network Controller-side Interface (Sideband) of the NC-SI (Network Controller-side Interface), namely the Sideband Interface (Sideband) of the Network Controller (NIC), is used for realizing information transfer between the BMC chip and the Ethernet Controller, and enables the BMC chip to use the Network Interface on the mainboard like using an independent management Network Interface. As shown in fig. 3, a diagram is given of the BMC sharing access mode with the CPU through NCSI. To ensure that the signal transmission can be triggered according to the digital signal, the clock source must be designed according to the standard to ensure the quality of the digital signals, so the quality of the digital signals is particularly important for the TSU/THD measurement to check the design. Fig. 4 shows a timing diagram of the NCSI clock source. The definition of equal-length matching is different on different signals, if the lengths of the differential lines are equal, the ideal differential mode is mainly prevented from advancing into a common mode, the quality of the signals is reduced, and EMI scattering is increased. The length of the clock source at the NCSI is matched to the TXD/RXD to conform to the TSU/THD specification. Under the condition that the NCSI clock source is applied to the external network card, the driving of the clock source inside the BMC can only be within the length of 10inch (25.4cm), and the length requirement can not be met for the system configuration in a longer case. As shown in fig. 5, the BMC is shown sharing the network port function with the NIC via the NCSI cable. Or the length is increased by using an external clock source, although the problem of the length is solved, the length matching is that the distance from an NCSI external clock source (50M OSC) to the BMC and the distance from the OSC to the NIC cannot exceed 4inch length, and the part needs to be wound on a PCB. As shown in fig. 6, the BMC is wrapped by an external clock source.
To solve the problem of extending the length using an external clock source, we need more PCB space to match the length around the length, and in addition, if we encounter the two problems that the NIC needs to change its position so that the length is not fixed. A network card clock adapter board device proposed by chinese patent CN201820044828 needs to use a clock adapter board. Chinese patent CN201711295046 discloses a structure for optimizing the equal length of NCSI clock signal lines, in which there is no clock transfer board, and it is to use an equal length adjustment scheme on the main board, but in addition, 8 to 10 cabes are required for length adjustment.
Disclosure of Invention
The utility model provides a be applied to isometric device of NCSI clock source signal line is different from reaching on the PCB board in the past, but realizes through the mode of cable, not only can save the PCB space, also can elastic come dynamic adjustment length through outside cable, lets whole device more nimble.
In order to achieve the above object, the present invention provides a device for NCSI clock source signal line with equal length, which includes a BMC located on the motherboard, an external clock source OSC and an NCSI connector, and a network interface controller NIC and a network card interface located on the network card;
the BMC is connected with the NCSI connector through a clock line L5 positioned on the mainboard; the external clock source OSC is connected to the NCSI connector through clock lines L1 and L2 located on the main board; the network card interface is connected with the network card interface through a clock line L4 positioned on the network card; the network card interface is connected with the NCSI connector through L3, and the length of an equal-length line L6 between an external clock source OSC and the BMC on the mainboard is adjusted by adjusting the length of NCSI CABLE L3.
Further, the L3 is an external NCSI CABLE.
Further, the L6 is an external NCSI CABLE.
Further, the L3 and L6 share the NCSI connector.
Further, the length of the L5 is 2 inch.
Further, the length of the L1 is 2 inch.
Further, the length of the L2 is 2 inch.
Further, the formula of the equal length of the NCSI clock source signal line is as follows:
L1+L5+L6=L2+L3+L4。
further, when the length of L3 is 20 inches, the length of L6 is 20 inches, and an error value of 4 inches is allowed.
The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:
the embodiment of the utility model provides a be applied to isometric device of NCSI clock source signal line, including BMC, external clock source OSC and the NCSI connector that are located the mainboard and network interface controller NIC and the network card interface that are located the network card; the BMC is connected with the NCSI connector through a clock line L5 positioned on the mainboard; the external clock source OSC is connected to the NCSI connector through clock lines L1 and L2 located on the motherboard; the network card interface is connected with the network card interface through a clock line L4 positioned on the network card; the network card interface is connected with the NCSI connector through L3, and the length of an equal-length line L6 between an external clock source OSC and the BMC on the mainboard is adjusted by adjusting the length of NCSI CABLE L3. L1, L2, and L5 are fixed values for PCB traces on the motherboard, L4 is fixed value for PCB traces on the network card, L3 and L6 are external NCSI CABLE, L3 and L6 share an NCSI connector, so the length of L6 can be adjusted according to the length of L3. The utility model discloses utilize the NCSI connector from the area on the mainboard, promote and the PCB cost also improves the condition along with the high-speed signal frequency at present PCB material under, not only can improve the PCB available space, also comparatively elasticity to isometric adjustment, effectual PCB's space of saving increases PCB and walks the line space. In addition, the system can not be limited by the method of adjusting the clock source on the PCB in the past in the same length, so that the system can only select a fixed position due to the length limitation on the configuration of the IO card, and the IO card position can be changed by more effectively utilizing the characteristic.
Drawings
FIG. 1 shows a schematic diagram of the clock source of NCSI generated internally by BMC;
FIG. 2 is a schematic diagram illustrating a solution of length limitation by an external clock source;
FIG. 3 shows a diagram of sharing access mode between BMC and CPU through NCSI;
FIG. 4 shows a timing diagram of a NCSI clock source;
FIG. 5 shows a functional diagram of the BMC sharing the network port with the NIC through the NCSI cable;
FIG. 6 shows a schematic diagram of the winding of the BMC by an external clock source;
fig. 7 is a schematic diagram of an apparatus for equalizing the lengths of clock source signal lines of the NCSI according to embodiment 1 of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description of the present invention, and do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the present invention.
Example 1
The embodiment 1 of the present invention provides a device for NCSI clock source signal line length, as shown in fig. 7, a device schematic diagram for NCSI clock source signal line length provided in embodiment 1 of the present invention, including BMC located on the motherboard, external clock source OSC and NCSI connector, and network interface controller NIC and network card interface located on the network card.
The BMC is connected with the NCSI connector through a clock line L5 positioned on the mainboard; the external clock source OSC is connected to the NCSI connector via clock lines L1 and L2 located on the motherboard.
The network card interface is connected to the network card interface through a clock line L4 located on the network card.
The network card interface is connected with the NCSI connector through L3, and the length of an equal-length line L6 between an external clock source OSC and the BMC on the mainboard is adjusted by adjusting the length of NCSI CABLE L3.
The NC-SI connector on the mainboard is used for dynamic length matching, and L1, L2 and L5 are traces of a PCB on the mainboard and are fixed values. Wherein L1 is 2 inches in length, L2 is 2 inches in length, and L5 is 2 inches in length. L3 is an external NCSI CABLE and L6 is an external NCSI CABLE. L3 and L6 share the NCSI connector.
The NCSI clock source signal line is equal in length and meets the formula as follows: l1+ L5+ L6 ═ L2+ L3+ L4.
When L3 is 20 inches in length, L1(2 inches) + L6 (dynamic) + L5(2 inches) — L2(2 inches) + L3(20 inches) + L4(2 inches). The length of L6 can meet the length matching requirement as long as the length is controlled at 20inch +/-4 inch. I.e., L6 is 20 inches in length and allows an error value of 4 inches.
The utility model discloses utilize the NCSI connector from the area on the mainboard, reach dynamic adjustment NCSI clock source length through outside cable and match.
The foregoing is merely exemplary and illustrative of the structure of the invention, and various modifications, additions and substitutions as may be made to the specific embodiments described by those skilled in the art without departing from the scope and spirit of the invention as defined in the following claims.
Claims (9)
1. A device with equal length applied to NCSI clock source signal lines is characterized by comprising a BMC, an external clock source OSC and an NCSI connector which are positioned on a mainboard, and a network interface controller NIC and a network card interface which are positioned on a network card;
the BMC is connected with the NCSI connector through a clock line L5 positioned on the mainboard; the external clock source OSC is connected to the NCSI connector through clock lines L1 and L2 located on the main board; the network card interface is connected with the network card interface through a clock line L4 positioned on the network card; the network card interface is connected with the NCSI connector through L3, and the length of an equal-length line L6 between an external clock source OSC and the BMC on the mainboard is adjusted by adjusting the length of NCSI CABLE L3.
2. The apparatus of claim 1, wherein the L3 is an external NCSI CABLE.
3. The apparatus of claim 1, wherein the L6 is an external NCSI CABLE.
4. The apparatus of claim 1, wherein said L3 and L6 share said NCSI connector.
5. The apparatus of claim 1, wherein the length of the L5 is 2 inch.
6. The apparatus of claim 1, wherein the length of the L1 is 2 inch.
7. The apparatus of claim 1, wherein the length of the L2 is 2 inch.
8. The apparatus of claim 1, wherein the formula for the NCSI clock source signal line length is as follows:
L1+L5+L6=L2+L3+L4。
9. the apparatus of claim 8, wherein when the length of L3 is 20 inches, the length of L6 is 20 inches, and an error value of 4 inches is allowed.
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CN201921430006.7U CN210129222U (en) | 2019-08-30 | 2019-08-30 | Device for measuring lengths of NCSI clock source signal wires |
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CN201921430006.7U CN210129222U (en) | 2019-08-30 | 2019-08-30 | Device for measuring lengths of NCSI clock source signal wires |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113220622A (en) * | 2021-05-27 | 2021-08-06 | 浪潮电子信息产业股份有限公司 | Mainboard and time sequence control method and device |
CN114610662A (en) * | 2022-03-08 | 2022-06-10 | 浪潮云信息技术股份公司 | NCSI (network control information system) time sequence adjusting method and device |
CN115114213A (en) * | 2022-06-30 | 2022-09-27 | 苏州浪潮智能科技有限公司 | Transmission device and server |
-
2019
- 2019-08-30 CN CN201921430006.7U patent/CN210129222U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113220622A (en) * | 2021-05-27 | 2021-08-06 | 浪潮电子信息产业股份有限公司 | Mainboard and time sequence control method and device |
CN114610662A (en) * | 2022-03-08 | 2022-06-10 | 浪潮云信息技术股份公司 | NCSI (network control information system) time sequence adjusting method and device |
CN115114213A (en) * | 2022-06-30 | 2022-09-27 | 苏州浪潮智能科技有限公司 | Transmission device and server |
CN115114213B (en) * | 2022-06-30 | 2023-07-14 | 苏州浪潮智能科技有限公司 | Transmission device and server |
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Granted publication date: 20200306 |