CN210120504U

CN210120504U - Circuit for controlling rotation speed of motor of fan

Info

Publication number: CN210120504U
Application number: CN201920872212.7U
Authority: CN
Inventors: 周欣耕; 闫冰
Original assignee: Emerson Climate Technologies Suzhou Co Ltd
Current assignee: Copeland Suzhou Co Ltd
Priority date: 2019-06-11
Filing date: 2019-06-11
Publication date: 2020-02-28
Anticipated expiration: 2029-06-11

Abstract

A circuit for controlling a rotational speed of a motor of a blower is provided. According to one embodiment of the present disclosure, the circuit includes: the power output device comprises a logic gate circuit and a relay group, wherein the logic gate circuit and the relay group are connected to output power only from a power output port corresponding to a rotating speed grade indicated by a digital rotating speed signal with the highest priority and in a first logic state of the relay group when at least one of the n digital rotating speed signals is in the first logic state. The scheme of the present disclosure can at least contribute to the following effects: and the fan is protected.

Description

Circuit for controlling rotation speed of motor of fan

Technical Field

The present disclosure relates to motor control, and more particularly, to a circuit for controlling a rotational speed of a motor of a blower.

Background

An air conditioner is a common household appliance. A fan of an air conditioner has a motor. The user may adjust the speed of the fan (i.e., the rotational speed of the motor of the fan). Specifically, the user may select a speed gear to be a low-speed, medium-speed, or high-speed gear, for example, and a control signal corresponding to the selected gear is input to the corresponding ac relay; in response to the input control signal, the connection state of the corresponding ac relay is changed, and the commercial power is connected to the power input port of the motor at the corresponding rotational speed, so that the motor rotates at the corresponding rotational speed of the selected gear.

Fig. 1 shows a schematic block diagram of a conventional circuit 10 for controlling the rotational speed of a motor of a fan. The circuit 10 includes a relay set 110 and a wind speed selection circuit 140. The relay set 110 includes relays Re1 ', Re2 ', Re3 '. The relays Re1 ', Re2 ' and Re3 ' are alternating current relays. The relays have output ports PRo1 ', PRo2 ', and PRo3 ', respectively. The output ports pri 1 ', pri 2', and pri 3 'are connected to a low-speed port PM 1', a medium-speed port PM2 ', and a high-speed port PM 3' of the motor M of the fan, respectively. The wind speed selection circuit 140 may correspond to a wind speed selection circuit in a thermostat of an air conditioner, and may output 24V ac control signals Sa1 ', Sa2 ', and Sa3 '. The ac control signals Sa1 ', Sa2 ', and Sa3 ' may correspond to a low speed control signal for operating the motor in a low speed shift mode, a medium speed control signal for operating the motor in a medium speed shift mode, and a high speed control signal for operating the motor in a high speed shift mode, respectively. The output terminal of the wind speed selection circuit 140 is connected to the corresponding relays Re1 ', Re2 ', Re3 ' to control the connection state of the relays. For example, when the wind speed selection circuit 140 outputs the 24V ac control signal Sa1 ', the relay Re1 ' changes the connection state to connect the live line of the utility power to the low speed port PM1 ', so that the motor M operates in the low speed gear mode.

Disclosure of Invention

A brief summary of the disclosure is provided below in order to provide a basic understanding of some aspects of the disclosure. It should be understood that this summary is not an exhaustive overview of the disclosure. It is not intended to identify key or critical elements of the disclosure or to delineate the scope of the disclosure. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.

The inventor finds that: when the speed gear of the fan is selected, it may happen that the motor receives two or more rotation speed commands at the same time, and at this time, the fan may be damaged.

Based on the above findings, the inventors conceived the following technical solutions.

According to an aspect of the present disclosure, a circuit for controlling a rotational speed of a motor of a fan is provided. The circuit comprises a logic gate circuit, a first logic gate circuit and a second logic gate circuit, wherein the logic gate circuit is provided with n input ports and n output ports, the n input ports are respectively used for receiving n digital rotating speed signals indicating corresponding rotating speed grades, the n output ports are respectively used for outputting control signals, all the digital rotating speed signals have different priorities, and all the digital rotating speed signals have two logic states; and a relay group having a power input port to which power is input and n power output ports corresponding to the n rotation speed levels, each power output port being for outputting power to a rotation speed port corresponding to a corresponding rotation speed of the motor, and including n relays and n drive circuits, wherein control signals output from the n output ports are respectively input to the n drive circuits to control the n relays, so that when at least one of the n digital rotation speed signals is in a first logic state, power is output only from a power output port of the relay group corresponding to a rotation speed level indicated by a digital rotation speed signal having a highest priority and being in the first logic state; wherein n is equal to or greater than two.

The circuit for controlling the rotating speed of the motor of the fan can at least help to realize the following effects: and the fan is protected.

Drawings

The above and other objects, features and advantages of the present disclosure will be more readily understood from the following description of embodiments thereof with reference to the accompanying drawings. The drawings are only for the purpose of illustrating the principles of the disclosure. The dimensions and relative positioning of the elements in the figures are not necessarily drawn to scale. Like reference numerals may denote like features. In the drawings:

FIG. 1 shows a schematic block diagram of a conventional circuit for controlling the rotational speed of a motor of a wind turbine;

FIG. 2 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan according to one embodiment of the present disclosure;

FIG. 3 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan in accordance with one embodiment of the present disclosure;

FIG. 4 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan in accordance with one embodiment of the present disclosure;

FIG. 5 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan according to one embodiment of the present disclosure;

FIG. 6 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan in accordance with one embodiment of the present disclosure;

FIG. 7 shows a schematic block diagram of a circuit to control the rotational speed of a motor of a fan in accordance with one embodiment of the present disclosure;

FIG. 8 shows a schematic block diagram of a circuit to control the rotational speed of the motor of the fan according to one embodiment of the present disclosure; and

fig. 9 illustrates the connection of a circuit for controlling the rotational speed of a motor of a fan according to one embodiment of the present disclosure when the input digital rotational speed signals are all in a first logic state.

Detailed Description

Exemplary embodiments of the present disclosure will be described hereinafter with reference to the accompanying drawings. In the interest of clarity and conciseness, not all features of an actual embodiment are described in the specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions may be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another.

Here, it should be further noted that, in order to avoid obscuring the present disclosure with unnecessary details, only the device structure closely related to the scheme according to the present disclosure is shown in the drawings, and other details not so related to the present disclosure are omitted.

It is to be understood that the disclosure is not limited to the described embodiments, as described below with reference to the drawings. In this context, embodiments may be combined with each other, features may be replaced or borrowed between different embodiments, one or more features may be omitted in one embodiment, where feasible.

One aspect of the present disclosure relates to a circuit for controlling a rotational speed of a motor of a wind turbine. The circuit is particularly suitable for controlling the rotating speed of a fan of an air conditioner. The circuit may also be used to control the speed of the fan of other electrical devices, where applicable. A circuit for controlling the rotational speed of the motor of the blower according to the present disclosure is described below with reference to fig. 2.

FIG. 2 shows a schematic block diagram of a circuit 20 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. Circuit 20 includes a logic gate circuit 210 and a relay bank 220.

The logic gate 210 has input ports PLi1 to PLin (when not distinguished, abbreviated as input ports PLi) and output ports PLo1 to PLon (when not distinguished, abbreviated as output ports PLo), where n is the number of ports, n is equal to or greater than two, and n may be 2, 3, 4, or greater. That is, when n takes 3, the logic gate circuit 210 has 3 input ports PLi1 to PLi3 and3 output ports PLo1 to PLo 3. The n input ports are respectively used for receiving n digital rotation speed signals Sd 1-Sdn (when the signals are not distinguished, the signals are simply called digital rotation speed signals Sd) indicating corresponding rotation speed levels, the n output ports are respectively used for outputting control signals Sc 1-Scn (when the signals are not distinguished, the signals are simply called control signals Sc), each digital rotation speed signal Sd has different priorities, and each digital rotation speed signal has two logic states. For example, as the number increases, the priority increases, i.e., the digital rotation speed signal Sd1 has the lowest priority and the digital rotation speed signal Sdn has the highest priority. For example, a first logic state is represented by "1" and a second logic state is represented by "0".

The relay group 220 has a power input port Pp to which power is input and n power output ports PRo1 to pon (simply referred to as power output ports PRo when not distinguished) corresponding to the n rotation speed levels. For example, the power input port Pp is used for connection to a (mains) power line, and the mains may be 220V ac. The motor M has n rotation speed ports PM1 to PMn (simply referred to as rotation speed ports PM when not distinguished). Each power output port PRo is used to output power to the corresponding rotational speed port PM of the corresponding motor M. When a certain rotating speed port is connected with a live wire of the mains supply, the motor M operates in a corresponding rotating speed grade mode. The relay group 220 includes n relays Re1 to Ren (simply referred to as relays Re when not distinguished) and n drive circuits Dr1 to Drn (simply referred to as drive circuits Dr when not distinguished). The relay Re is, for example, a dc relay. The use of a dc relay can reduce costs relative to an ac relay. Wherein the control signals output from the n output ports are respectively input to the n drive circuits to control the n relays such that when at least one of the n digital rotation speed signals is in a first logic state "1", electric power is output only from the electric power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and being in the first logic state. For example, when n is 3, the 1 st digital rotation speed signal Sd1 is 1, the second digital rotation speed signal Sd2 is 1, the 3 rd digital rotation speed signal Sd3 is 1, and the priority of the digital rotation speed signals Sd1, Sd2, and Sd3 is sequentially increased, power is output only from the power output port PRo 3. When n is 3, the output terminals prio 1, prio 2, and prio 3 of the relay group are respectively connected with the rotation speed ports PM1, PM2, and PM3 of the motor M, and the rotation speed ports PM1, PM2, and PM3 may respectively correspond to the low speed port, the medium speed port, and the high speed port of the motor M; the motor is operated in a low gear mode with a rotation speed in a predetermined low rotation speed range when only the low speed port is connected to the power input port Pp, operated in a medium gear mode with a rotation speed in a predetermined intermediate rotation speed range when only the medium speed port is connected to the power input port Pp, and operated in a high gear mode with a rotation speed in a predetermined high rotation speed range when only the high speed port is connected to the power input port Pp.

In one embodiment, the logic gate circuit includes 1 st to n-1 st logic gate units connected to corresponding 1 st to n-1 st relays among the n relays; and each of the n-1 logic gate units receives at least 2 of the n digital speed signals and generates a control signal that controls the correspondingly connected relay. The logic operation is carried out on the digital rotating speed signal combination to realize that: when at least one of the n digital rotating speed signals is in a first logic state '1', the electric power is output only from the electric power output port of the relay group corresponding to the rotating speed grade indicated by the digital rotating speed signal with the highest priority and in the first logic state, and the following effects are realized: when at least two of the n digital rotation speed signals are in a first logic state "1", electric power is output only from the power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and in the first logic state.

In one embodiment, the common contact of the 1 st relay is connected with the live power line; and the 1 st logic gate unit is connected to receive the n digital speed signals to control the 1 st relay such that the common contact and the normally open contact of the 1 st relay are connected when at least one of the n digital speed signals is in a first logic state ('1').

In one embodiment, an nth drive circuit of the n drive circuits is connected to receive an nth digital speed signal of the n digital speed signals to control the nth relay such that the common contact and the normally open contact of the nth relay are connected when the nth digital speed signal is in a first logic state ("1"); the normally open contact of the nth relay is connected with the nth power output port corresponding to the nth rotating speed grade in the n power output ports; and the normally closed contact of the nth relay is connected with the (n-1) th power input port corresponding to the (n-1) th rotation speed grade in the n power output ports.

In one embodiment, for two adjacent relays adjacent in sequence number in the n relays, the normally open contact of the previous adjacent relay is connected with the normally closed contact of the next adjacent relay.

In one embodiment, the logic gate circuit comprises an OR gate. For example, n-1 logic gate units are n-1 OR gates.

In one embodiment, the logic gate circuit includes a nor gate and a not gate connected in series with each other.

FIG. 3 shows a schematic block diagram of a circuit 23 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. In this embodiment, n is 3.

Circuit 23 includes logic gate 213 and relay bank 223.

The logic gate circuit 213 has input ports PLi1 to PLi3 (simply referred to as input ports PLi when not distinguished) and output ports PLo1 to PLo3 (simply referred to as output ports PLo when not distinguished). The 3 input ports are respectively used for receiving 3 digital rotation speed signals Sd 1-Sd 3 (when not distinguished, the digital rotation speed signals Sd are short for short), the 3 output ports are respectively used for outputting control signals Sc 1-Sc 3 (when not distinguished, the control signals Sc are short for short), each digital rotation speed signal Sd has different priority, and each digital rotation speed signal has two logic states. In the connection case shown in fig. 3, the priority increases as the number increases, i.e., the digital rotation speed signals Sd1, Sd2, Sd3 sequentially increase in priority.

As shown in fig. 3, the logic gate circuit 213 includes a first logic gate unit (shown as a1 st or gate AND1) AND a second logic gate unit (shown as a2 nd or gate AND 2). The 1 st or gate AND1 receives the digital rotation speed signals Sd1, Sd2, AND Sd 3. The 2 nd or gate AND1 receives the digital rotation speed signals Sd2 AND Sd 3.

The relay group 223 has a power input port Pp to which power is input and3 power output ports pri 1 to pri 3 (simply referred to as power output ports pri when not distinguished) corresponding to 3 rotation speed levels. For example, the power input port Pp is for connection to a (mains) power line. The motor M has 3 rotation speed ports PM1 to PM3 (simply referred to as rotation speed ports PM when not distinguished). Each power output port PRo is used to output power to the rotation speed port PM corresponding to the corresponding rotation speed of the motor M. When a certain rotating speed port is connected with a live wire of the mains supply, the motor M operates in a corresponding rotating speed grade mode. The relay group 223 includes n relays Re1 to Re3 (simply referred to as relays Re when not distinguished) and3 drive circuits Dr1 to Dr3 (simply referred to as drive circuits Dr when not distinguished). The relay Re is, for example, a dc relay. Each relay includes 3 contacts, and for distinction, the common contact is identified by c, the normally closed contact by b, and the normally open contact by o. Wherein, the control signals output from the 3 output ports are respectively input to the 3 driving circuits to control the 3 relays, so that when at least one of the 3 digital rotation speed signals is in a first logic state "1", electric power is output only from the electric power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and in the first logic state. For example, when the priority of the 1 st digital rotation speed signal Sd1, the priority of the second digital rotation speed signal Sd2, the priority of the 3 rd digital rotation speed signal Sd3, and the priority of the digital rotation speed signals Sd1, Sd2, and Sd3 are sequentially increased, power is output only from the power output port PRo 3. In fig. 3, for example, the digital rotation speed signals Sd1, Sd2, Sd3 are all in the second logic state ("0"), and therefore the control signals Sc1, Sc2, Sc3 are all in the second logic state, so that the common contact c of each relay Re1, Re2, Re3 is connected to the normally closed contact b, and each rotation speed port PM1, PM2, PM3 is disconnected from the power input port Pp, under the control of the drive circuits Dr1, Dr2, Dr 3.

As shown in fig. 3, the common contact c of the 1 st relay Re1 is connected with the power input port Pp, the normally closed contact b is floating, and the normally open contact o is connected with the common contact c of the 2 nd relay Re 2; the normally closed contact b of the 2 nd relay Re2 is connected to the 1 st power output port PRo1 corresponding to the 1 st rotation speed level among the 3 power output ports PRo1, PRo2, and PRo 3; the normally closed contact b of the 3 rd relay Re3 is connected to the 2 nd power output port PRo2 corresponding to the 2 nd rotation speed class among the 3 power output ports PRo1, PRo2, and PRo3, and the normally open contact o of the 3 rd relay Re3 is connected to the 3 rd power output port PRo3 corresponding to the 3 rd rotation speed class among the 3 power output ports PRo1, PRo2, and PRo 3. In fig. 3, exemplarily, the 1 st digital rotation speed signal Sd1 corresponds to the 1 st rotation speed level, the 2 nd digital rotation speed signal Sd2 corresponds to the 2 nd rotation speed level, the 3 rd digital rotation speed signal Sd3 corresponds to the 3 rd rotation speed level, the priority levels of the 3 digital rotation speed signals are Sd3, Sd2 and Sd1 from top to bottom, and the 1 st, 2 nd and3 rd rotation speed levels may correspond to the low speed, medium speed and high speed rotation speed levels, respectively. If it is desired that the middle speed class has the highest priority, a modification of this embodiment may be made, for example, by inputting a digital speed signal corresponding to a middle speed as the third digital speed signal and a digital speed signal corresponding to a high speed as the second speed signal, and adaptively adjusting the connection of each power output port and the speed port of the fan M such that the power output port and the speed port connected to each other correspond to the speed class associated with the speed port (i.e., Pro2 is connected to PM3, Pro3 is connected to PM 2).

Fig. 3 shows the connection state of each of the relays Re1, Re2, and Re3 when the digital rotation speed signals Sd1, Sd2, and Sd3 are all 0 (the common contacts are all connected to the normally closed contacts). When the power output ports PRo1, PRo2, and PRo3 are respectively indicated by "1" and "0" for power output, the output states of the circuits, i.e., the combined states of PRo1, PRo2, and PRo3, are shown in table 1 when the digital rotation speed signals Sd1, Sd2, and Sd3 are combined differently.

TABLE 1 output states of the circuits

Sd1 Sd2 Sd3	Sc1 Sc2 Sc3	PRo1 PRo2 PRo3
			0 0 0	0 0 0	0 0 0
0 0 1	1 1 1	0 0 1
			0 1 0	1 1 0	0 1 0
0 1 1	1 1 1	0 0 1
			1 0 0	1 0 0	1 0 0
1 0 1	1 1 1	0 0 1
			1 1 0	1 1 0	0 1 0
1 1 1	1 1 1	0 0 1

From table 1, it can be seen that: using the circuit 23, it is possible to realize: outputting power from only one power output port of the relay group corresponding to the rotational speed level indicated by the digital rotational speed signal having the highest priority and being in the first logic state when at least one of the 3 digital rotational speed signals is in the first logic state ("1"); in particular, when at least two (e.g., 2 or 3) of the 3 digital speed signals are in the first logic state ("1"), power is output from only one power output port of the relay group corresponding to the speed level indicated by the digital speed signal having the highest priority and being in the first logic state. Therefore, the fan can be protected, and the condition that the motor of the fan is damaged due to the fact that two or more rotating speed instructions are received at the same time can be avoided.

Although an or gate is used as the logic gate unit in fig. 3, those skilled in the art will understand that the or gate in fig. 3 may be replaced by a combinational logic gate unit capable of implementing the same logic function, for example, a nor gate and a not gate connected to each other, or a not gate and a nand gate connected to each other.

FIG. 4 shows a schematic block diagram of the circuit 24 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. Circuit 24 includes logic gate 214 and relay set 224.

In fig. 4, the logic gate circuit 214 has input ports PLi1 to PLi2, and output ports PLo1 to PLo 2. The input ports PLi1 to PLi2 receive digital rotation speed signals Sd1 and Sd2, respectively. The output ports PLo1 to PLo2 output control signals Sc1 to Sc2, respectively. The logic gate circuit 214 has a logic gate unit. In fig. 4, the logic gate unit is exemplarily shown as an or gate AND 1. The or gate AND1 receives the digital rotation speed signals Sd1, Sd2 AND outputs a control signal Sc 1.

In fig. 4, the relay group 224 includes 1 st and2 nd drive circuits Dr1 and Dr2, and1 st and2 nd relays Re1 and Re 2. The relay set 224 is connected to the output ports PLo1 to PLo2 to receive the control signals Sc1 to Sc 2. The relay group 224 has a power input port Pp to which power is input and2 power output ports pri 1 to pri 2 corresponding to 2 rotation speed levels. The power output ports pri 1 to pri 2 are connected to rotation speed ports PM1 and PM2 of a motor M of the fan, respectively. The speed ports PM1, PM2 may be associated with a first speed level, a second speed level, respectively.

With respect to the circuit 23 in fig. 3, n in fig. 4 is 2, AND1 AND gate AND1, 2 drive circuits (Dr1 AND Dr2), AND2 relays (Re1 AND Re2) are used. Referring to table 1, table 2 showing the output state of the circuit 23 can be obtained.

TABLE 2 output states of the circuits

Sd1 Sd2	Sc1 Sc2	PRo1 PRo2
				0 0	0 0	0 0
0 1	1 1	0 1
			1 0	1 0	1 0
1 1	1 1	0 1

From table 2, it can be seen that: using the circuit 24, it is possible to realize: when the 2 digital rotation speed signals are all in the first logic state ("1"), power is output from only one power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and in the first logic state. Therefore, the fan can be protected, and the situation that the motor of the fan is damaged due to the fact that the motor of the fan receives two rotating speed instructions at the same time can be avoided.

FIG. 5 shows a schematic block diagram of a circuit 25 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. Circuit 25 includes a logic gate circuit 215 and a relay bank 225.

In fig. 5, the logic gate circuit 215 has input ports PLi1 to PLi4, and output ports PLo1 to PLo 4. The input ports PLi1 to PLi4 receive the digital rotation speed signals Sd1 to Sd4, respectively. The output ports PLo1 to PLo4 output control signals Sc1 to Sc4, respectively. The logic gate circuit 215 has a logic gate unit. In fig. 4, the logic gate units are exemplarily shown as or gates AND1, AND2, AND 3. The or gate AND1 receives the digital rotation speed signals Sd1 to Sd4 AND outputs a control signal Sc 1. The or gate AND2 receives the digital rotation speed signals Sd2 to Sd4 AND outputs a control signal Sc 2. The or gate AND3 receives the digital rotation speed signals Sd3 to Sd4 AND outputs a control signal Sc 3.

In fig. 5, the relay set 225 includes 1 st, 2 nd, 3 th, and 4 th drive circuits Dr1, Dr2, Dr3, and Dr4, and1 st, 2 nd, 3 th, and 4 th relays Re1, Re2, Re3, and Re 4. The relay set 225 is connected to the output ports PLo1 to PLo4 to receive the control signals Sc1 to Sc 4. The relay group 225 has a power input port Pp to which power is input and 4 power output ports pri 2 to pri 4 corresponding to 4 rotation speed levels. The power output ports pri 1 to pri 4 are connected to rotation speed ports PM1, PM2, PM3, and PM4 of a motor M of the fan, respectively. The speed ports PM1, PM2, PM3, PM4 may be associated with the first, second, third, and fourth speed levels, respectively.

As for the circuit 23 in fig. 3, 3 AND gates (AND1, AND2, AND3), 4 drive circuits (Dr1, Dr2, Dr3, Dr4), AND 4 relays (Re1, Re2, Re3, Re4) are used, where n is 4 in fig. 5. Referring to table 1, table 3 showing the output state of circuit 25 can be obtained.

TABLE 3 output states of the circuits

From table 3, it can be seen that: using the circuit 25, it is possible to realize: outputting power from only one power output port of the relay group corresponding to the rotational speed level indicated by the digital rotational speed signal having the highest priority and being in the first logic state when at least one of the 4 digital rotational speed signals is in the first logic state ("1"); in particular, when at least two (e.g., 2, 3, or 4) of the 4 digital speed signals are in the first logic state ("1"), power is output from only one power output port of the relay group corresponding to the speed level indicated by the digital speed signal having the highest priority and being in the first logic state. Therefore, the fan can be protected, and the condition that the motor of the fan is damaged due to the fact that two or more rotating speed instructions are received at the same time can be avoided.

Referring to the concepts of FIG. 5, those skilled in the art, given the benefit of this disclosure, will be able to devise circuits for controlling the speed of a wind turbine with more speed steps and still be within the scope of this disclosure.

FIG. 6 shows a schematic block diagram of a circuit 26 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. With respect to the circuit 20 of fig. 2, the circuit 26 also includes a set of converters 236. The converter group 236 includes n converters C1 to Cn. Each converter C1 to Cn serves to convert n respective alternating control signals (Sa1 to San) corresponding to n rotational speed levels into n digital rotational speed signals Sd1 to Sdn.

FIG. 7 shows a schematic block diagram of a circuit 27 for controlling the rotational speed of the motor of the fan according to one embodiment of the present disclosure. With respect to the circuit 26 of fig. 6, the circuit 27 also includes a wind speed selection circuit 247. The wind speed selection circuit 247 is configured to generate n respective ac control signals (Sa1 to San) corresponding to the n rotational speed levels, and has n ac control signal output ports to output the respective ac control signals from the respective ac control signal output ports. The wind speed selection circuit 247 may be a circuit in a thermostat of an air conditioner. Note that, if an ac control signal corresponding to the rotation speed level is to be output from a certain output port of the wind speed selection circuit 247, the remaining output ports except for the output port may normally have no output. To this end, each converter in the converter group 236 is preferably configured to: when the corresponding alternating current control signal output port of the wind speed selection circuit outputs, a digital rotating speed signal of a first logic state ('1') is output; and when the corresponding alternating current control signal output port of the wind speed selection circuit has no output, outputting a digital rotating speed signal of a second logic state ('0').

FIG. 8 shows a schematic block diagram of the circuit 28 that controls the rotational speed of the motor of the fan according to one embodiment of the present disclosure. The circuit 28 includes: logic gate circuit 213, relay group 223, converter group 236 and wind speed selection circuit 247. These components have been previously described and will not be described in detail herein.

Fig. 9 shows the connection of the circuit 23 for controlling the rotational speed of the motor of the fan according to an embodiment of the present disclosure when the input digital rotational speed signals are all in the first logic state. For circuit 23, n is 3. The power input port Pp may be connected to a live line of 220V power of a utility grid. As shown in fig. 9, when the digital rotation speed signals Sd1, Sd2, Sd3 are all in the first logic state ("1"), the common contact of each relay is connected with the normally open contact, so that power is output only from the power output port PRo3, wherein the 3 rd digital rotation speed signal Sd3 has the highest priority. The circuit can realize that: when at least one (including one, two, and three) of the 3 digital rotation speed signals is in a first logic state ("1"), power is output from only one power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and being in the first logic state.

Based on the above description of the specific embodiments of the present disclosure, those skilled in the art can understand that the technical solution of the present disclosure can implement protection of the wind turbine. When at least one of the n digital rotation speed signals is in a first logic state ("1"), power is output from only one power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and in the first logic state. In other words, when two or more alternating current control signals are input from the wind speed selection circuit at the same time, the fan can only receive one control signal with the highest priority (for example, the control signal corresponding to the highest rotating speed) at the same time, and the safety of the system is ensured. According to the technical scheme, the fan is protected by the hardware circuit, and compared with software protection, the fan is more reliable. In addition, the dc driving circuit has a cost advantage over the ac driving circuit.

It will be understood that the terms "comprises" and/or "comprising," when used herein, specify the presence of stated features, integers, steps, or components, but do not preclude the presence or addition of one or more other features, integers, steps, components, or groups thereof.

It is to be understood that features described and/or illustrated with respect to one embodiment may be used in the same or a similar manner in one or more other embodiments, in combination with or instead of the features of the other embodiments, without departing from the spirit of the present disclosure. For example, in some embodiments of the present disclosure, the digital rotation speed signal with the highest priority and corresponding to the highest rotation speed is defined as the nth digital rotation speed signal, but this is not essential, and in a modification, the priority of the digital rotation speed signal corresponding to the highest rotation speed may be reduced, and the connection relationship of the components in the circuit may be adjusted accordingly, thereby achieving the effect of the technical solution of the present disclosure.

The present disclosure has been described in conjunction with specific embodiments, but it should be understood by those skilled in the art that these descriptions are intended to be illustrative, and not limiting, of the scope of the present disclosure. Various modifications and alterations of this disclosure will become apparent to those skilled in the art from the spirit and principles of this disclosure, and such modifications and alterations are also within the scope of this disclosure.

Claims

1. A circuit for controlling a rotational speed of a motor of a blower, the circuit comprising:

the logic gate circuit is provided with n input ports and n output ports, wherein the n input ports are respectively used for receiving n digital rotating speed signals indicating corresponding rotating speed grades, the n output ports are respectively used for outputting control signals, each digital rotating speed signal has different priorities, and each digital rotating speed signal has two logic states; and

a relay group having a power input port to which power is input and n power output ports corresponding to the n rotation speed levels, each power output port being for outputting power to a rotation speed port corresponding to a corresponding rotation speed of the motor, and including n relays and n drive circuits, wherein control signals output from the n output ports are respectively input to the n drive circuits to control the n relays such that when at least one of the n digital rotation speed signals is in a first logic state, power is output only from a power output port of the relay group corresponding to a rotation speed level indicated by a digital rotation speed signal having a highest priority and being in the first logic state;

wherein n is equal to or greater than two.

2. The circuit of claim 1, wherein the logic gate circuit includes 1 st to n-1 st logic gate units connected corresponding to 1 st to n-1 st relays among the n relays; and is

Each of the n-1 logic gate units receives at least 2 of the n digital rotational speed signals and generates a control signal for controlling the correspondingly connected relay.

3. The circuit of claim 2, wherein the common contact of the 1 st relay is connected to a live power line; and is

The 1 st logic gate unit is connected to receive the n digital rotation speed signals to control the 1 st relay so that a common contact and a normally open contact of the 1 st relay are connected when at least one digital rotation speed signal of the n digital rotation speed signals is in the first logic state.

4. The circuit of claim 2 wherein an nth of the n drive circuits is connected to receive an nth of the n digital speed signals to control the nth relay such that a common contact and a normally open contact of the nth relay are connected when the nth digital speed signal is in the first logic state;

the normally open contact of the nth relay is connected with the nth power output port corresponding to the nth rotating speed grade in the n power output ports; and is

And the normally closed contact of the nth relay is connected with the (n-1) th power input port corresponding to the (n-1) th rotating speed grade in the n power output ports.

5. The circuit of claim 1, wherein for two adjacent relays of the n relays that are adjacent in sequence number, the normally open contact of a preceding adjacent relay is connected with the normally closed common contact of a succeeding adjacent relay.

6. The circuit of claim 1, wherein the logic gate circuit comprises an OR gate.

7. The circuit of claim 1, wherein the control signals output from the n output ports are input to the n drive circuits, respectively, to control the n relays such that when at least two of the n digital rotation speed signals are in a first logic state, power is output only from one power output port of the relay group corresponding to the rotation speed level indicated by the digital rotation speed signal having the highest priority and in the first logic state.

8. The circuit of claim 1, further comprising:

and the converter group comprises n conversion units and is used for converting the n corresponding alternating current control signals corresponding to the n rotating speed grades into the n digital rotating speed signals.

9. The circuit of claim 8, further comprising:

and the wind speed selection circuit is used for generating n corresponding alternating current control signals corresponding to the n rotating speed grades and is provided with n alternating current control signal output ports so as to output the corresponding alternating current control signals from the corresponding alternating current control signal output ports.

10. The circuit of claim 9, wherein each converter of the set of converters is configured to: and when the corresponding alternating current control signal output port of the wind speed selection circuit outputs the signal, outputting a digital rotating speed signal in a first logic state.

11. The circuit of claim 9, wherein each converter of the set of converters is configured to: and when the corresponding alternating current control signal output port of the wind speed selection circuit does not output, outputting a digital rotating speed signal in a second logic state.

12. The circuit of claim 3, wherein n equals 3;

the normally closed contact of the 2 nd relay in the n relays is connected with the 1 st power output port corresponding to the 1 st rotating speed grade in the n power output ports;

the 2 nd logic gate unit from the 1 st logic gate unit to the n-1 st logic gate unit is connected to receive the residual digital rotating speed signals except the 1 st digital rotating speed signal in the n digital rotating speed signals so as to control the 2 nd relay, so that when at least one digital rotating speed signal in the residual digital rotating speed signals is in the first logic state, the common contact and the normally open contact of the 2 nd relay are connected; and is

The 1 st digital rotational speed signal corresponds to the 1 st rotational speed level.