CN210072372U

CN210072372U - Multi-path high-power equipment control system

Info

Publication number: CN210072372U
Application number: CN201920939160.0U
Authority: CN
Inventors: 郝弘毅
Original assignee: Hangzhou Shenyu Internet Of Things Technology Co Ltd
Current assignee: Hangzhou Shenyu Internet Of Things Technology Co Ltd
Priority date: 2019-06-21
Filing date: 2019-06-21
Publication date: 2020-02-14
Anticipated expiration: 2029-06-21

Abstract

The utility model belongs to the technical field of circuit control, especially, relate to a multichannel high-power equipment control system. The direct-current power supply device comprises a control chip, a power supply circuit, a voltage reduction circuit, a power amplification circuit, a bootstrap programming circuit, a 485 communication circuit and an input port, wherein an input pin of the control chip is sequentially connected with a photoelectric isolation circuit and the input port, an output pin of the control chip is sequentially connected with the power amplification circuit and the output port, and the bootstrap programming circuit, the 485 communication circuit and the input port are respectively connected with the control chip. Through use step-down circuit on power supply circuit for the control system of this application is applicable to most power on the market, satisfies the operation requirement of control chip and relay simultaneously. Through setting up opto-coupler isolation circuit, the effectual influence of avoiding high-voltage circuit to low-voltage circuit.

Description

Multi-path high-power equipment control system

Technical Field

The utility model belongs to the technical field of circuit control, especially, relate to a multichannel high-power equipment control system.

Background

In the market, the power amplifier modules are all independent and are not integrated with the controller, so that if the power amplifier modules are used in a large scene, the use cost of the hardware quantity is increased. In addition, the power amplifier module needs to support power supply, so that the support of a plurality of power supplies is needed, and the power consumption cost is increased. Furthermore, if the power amplifier modules are docked in groups one-to-one, the overall power is taken into account, and if the overall power exceeds the total power that the electrical energy can withstand, there is a risk of tripping, burning fuses.

SUMMERY OF THE UTILITY MODEL

In order to solve the technical problem, the utility model discloses a following technical scheme can solve:

a multi-path high-power equipment control system comprises,

the control chip is used for controlling the switch of each circuit in the system;

the power supply circuit is connected with the control chip through the voltage reduction circuit and is used for providing low-voltage for the control chip;

the control end of the power amplifier circuit is connected with the control chip, the voltage input end of the power amplifier circuit is connected with the power supply circuit, and the voltage output end of the power amplifier circuit is connected with the output port;

the bootstrap program burning circuit is connected with the control chip and used for burning a bootstrap program;

the program burning circuit is connected with the control chip and used for user programming input;

the 485 communication circuit is connected with the control chip and is used for communicating with other equipment;

the control chip is also connected with a plurality of input ports.

In the application, a control chip, a power supply circuit, a voltage reduction circuit, a power amplification circuit, a guiding program burning circuit, a 485 communication circuit and an input port are integrated on one PC board. The control chip is combined with a plurality of power amplification circuits, and the control chip is used for controlling the high-power equipment. The power supply circuit is directly connected to the power amplifying circuit to output high-power electric energy. The low voltage is provided for the control chip through the voltage reduction circuit. Through the bootstrap program burning circuit, the bootstrap program burner is guided to burn the bootstrap program under the condition that power supply for the development board is not needed. The program burning circuit can provide a port for later-stage user self programming. The two development boards can be communicated with each other through the 485 communication circuit. The control chip is provided with an input port for connecting an external input signal or a switch.

Preferably, the control chip adopts an ATMEGA328P chip or an STM32 or MEGA2560 or 51 singlechip.

Preferably, the bootstrap program burning circuit is connected to the RESET end of the control chip, and the bootstrap program burning circuit includes a switch S2 and a 2x3pin J3 connected in parallel to the RESET end of the control chip.

Preferably, the ATMEGA328P is connected to the crystal oscillator X1-16M on the 7 and 8 pins of the control chip.

Preferably, the program burning circuit comprises a cp2104 chip, a resistor R3 is connected between pin 5 and pin 9 of the cp2104 chip, pin 5 is connected with pin 6, an electrolytic capacitor C21 is connected between pin 5 and pin 2, and

pins

3 and 4 are connected with the USB interface.

Preferably, the 485 communication circuit adopts a max1345 type chip, and a dial switch S1 is connected between

pins

6 and 7 of a max1345 type chip IC7 in sequence.

Preferably, the power amplification circuit comprises a triode U $9, a triode U $4 and a MOS transistor Q1, wherein the base level of the triode U $9 is connected with an output pin D3 of the control chip, the emitting electrodes of the triode U $9 and the triode U $4 are connected with the voltage reduction circuit, the base level of the triode U $4 is connected with the collector electrode of the triode U $9, a diode D1 is connected between the collector electrode and the emitting electrode of the triode U $4, the collector electrode of the triode U $4 is connected with the grid electrode of the MOS transistor Q1, a diode D5 for protecting the MOS transistor Q1 is arranged between the drain electrode and the source electrode of the MOS transistor Q1, and a diode D4 is arranged on the drain electrode of the MOS transistor Q1; an output cathode port X2-1 and an output anode port X2-2 are respectively arranged on the anode and the cathode of the diode D4, and the anode port X2-2 is directly connected with a power circuit.

Preferably, an optical coupling isolation circuit is connected between the input port and the control chip.

Preferably, the chip type adopted by the optical coupling isolation circuit is PS 2501.

Preferably, the voltage reduction circuit adopts a voltage reduction chip with the model XL 1509.

The utility model discloses owing to adopted above technical scheme, have apparent technological effect: through the integrated optimization design between the relay and the controller, the size and the use cost of the control system are effectively reduced. Through use step-down circuit on power supply circuit for the control system of this application is applicable to most power on the market, satisfies the operation requirement of control chip and relay simultaneously. Through setting up opto-coupler isolation circuit, the effectual influence of avoiding high-voltage circuit to low-voltage circuit.

Drawings

Fig. 1 is a circuit block diagram of the multi-channel high-power device control system of the present invention.

Fig. 2 is a circuit diagram of the control chip of the present invention.

Fig. 3 is a circuit diagram of the power supply circuit of the present invention.

Fig. 4 is a circuit diagram of the optical coupler isolation circuit of the present invention.

Fig. 5 is a circuit diagram of the crystal power amplifier of the present invention.

Fig. 6 is a circuit diagram of the program burning circuit of the present invention.

Fig. 7 is a circuit diagram of the 485 communication circuit of the present invention.

Fig. 8 is a circuit diagram of the burning guiding circuit of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples.

As shown in fig. 1, a multi-way switch control system includes a control chip, a power circuit, a voltage reduction circuit, a power amplification circuit, a bootstrap programming circuit, a 485 communication circuit, and an input port. The control chip is used for controlling the switch of each circuit in the system; the power supply circuit is connected with the control chip through the voltage reduction circuit and is used for providing low-voltage for the control chip; the control end of the power amplifier circuit is connected with the control chip, the voltage input end of the power amplifier circuit is connected with the power supply circuit, and the voltage output end of the power amplifier circuit is connected with the output port; the bootstrap program burning circuit is connected with the control chip and used for burning a bootstrap program; the program burning circuit is connected with the control chip and used for user programming input; the 485 communication circuit is connected with the control chip and is used for communicating with other equipment; the control chip is also connected with a plurality of input ports. In this application, multiple input ports are connected to an input pin of a control chip, for example, six input lines are provided in this application, which are input port 1, input port 2, input port 3, input port 4, input port 5, and input port 6, respectively. The control end of the multi-path power amplifying circuit is connected to the output end of the control chip, for example, six paths of power amplifying circuits are arranged, namely, the power amplifying circuit 1, the power amplifying circuit 2, the power amplifying circuit 3, the power amplifying circuit 4, the power amplifying circuit 5 and the power amplifying circuit 6, the input end of each power amplifying circuit is connected with the power circuit, the output end of each power amplifying circuit is connected with the output port, for example, the six paths of power amplifying circuits are respectively connected with the output port 1, the output port 2, the output port 3, the output port 4, the output port 5 and the output port 6. The power amplification circuits are respectively directly connected with the power supply circuits, so as to output high voltage for the output ports. The power circuit is connected with an external power supply through a power interface, and further obtains an external voltage. The power supply circuit is sequentially connected with the voltage reduction circuit and the control chip, and then provides driving voltage for the control chip.

In this embodiment, as shown in fig. 1 and fig. 2, the control chip is an ATMEGA328P chip or an STM32 or a MEGA2560 or 51 single chip microcomputer. Pin 18 of an ATMEGA328P chip IC4 is sequentially connected with a capacitor C17, a resistor RN6A, a light-emitting diode GREEN16 and a voltage reduction circuit to obtain 5V voltage. The pin 21 of the chip IC4 is connected to the connection point of the resistor R32, the capacitor C17 and the resistor RN6A in sequence, and the connection point is connected to a ground loop. Pin 4 of chip IC4 is connected to ground via capacitor C11, while pin 4 is connected to pin 18. Pin 5 is directly connected to the ground return. Pin 16 of chip IC4 is connected to ground through capacitor C22.

In this embodiment, as shown in fig. 1, 2, and 8, the burning guiding circuit is connected to the RESET end of the control chip IC4, and the burning guiding circuit includes a switch S2 and a2 × 3pin J3 connected in parallel to the RESET end of the control chip. The programming guide device is guided by the programming guide circuit to program the guide program for the control chip, so that the programming guide program can be realized without supplying power to the development board, and the power supply aspect is provided by the programming device. When the terminal wire is used, the terminal wire on the burner is only required to be inserted into the PIN header of the 2X3PIN, and the burner can be burned in the corresponding direction. In addition, in the circuit diagram, the RESET pin RESET is particularly led out, and a key switch S2 is made for the RESET pin RESET, so as to test whether the boot program can be successfully burned or not, and also to test whether the boot program can be normally used or not when the user programs the development board at a later stage. Pin 5 of the 2x3pin row J3 connects to the RESET terminal of the chip IC 4. Pin 5 of pin J3 of 2x3 is simultaneously connected to switch S2. Pin 5 of the 2x3pin bank J3 is connected to a 5V power supply through a resistor R22. A diode U $13 is connected in parallel to drill R22. Pin 5 of pin J3 of 2x3 is connected to capacitor C18.

In this embodiment, as shown in fig. 2, the ATMEGA328P controls the connection of the crystal oscillators X1-16M to the

pins

7 and 8 of the chip IC 4. And the normal operation of the control chip is ensured by arranging the crystal oscillator. A protective resistor R18 is connected between

pins

7 and 8 of the ATMEGA328P control chip IC4, and two ends of the crystal oscillator are connected with a grounding loop through a capacitor C16 and a capacitor C12 respectively.

In this embodiment, as shown in fig. 1, fig. 2, and fig. 5, the program burning circuit includes a cp2104 type chip IC6, a connection resistor R3 is connected between pin 5 and pin 9 of the cp2104 type chip IC6, pin 5 is connected to pin 6, an electrolytic capacitor C21 is connected between pin 5 and pin 2, and pins 3 and 4 are connected to the USB interface. Through the USB interface, a user can conveniently program the development board, the secondary development function of the development board is added, and a serial port communication mode is adopted to form a USB-to-serial port mode. The mode can quickly establish the interaction between the development board and the software, and a user can directly plug the development board into a computer through a data line when using the development board, so that more operations are not needed in the aspect of hardware. A resistor R3 is connected between a pin 5 and a pin 9 of the chip IC6, the pin 5 is connected with a pin 6, and a capacitor C21 is connected between the pin 5 and a pin 2. Pin 16 of chip IC6 is connected to ground return via capacitor C22.

Pins

3 and 4 of the chip IC6 are respectively connected with the D + and D-of the USB port, the VBUS pin of the USB port is connected with the 5V power supply through F1, and the GND end of the USB interface is connected with the 5V power supply through a capacitor C1.

In this embodiment, as shown in fig. 1 and fig. 2, the 485 communication circuit employs a max1345 type chip IC7, and the dial switch S1 is connected between the

pins

6 and 7 of the max1345 type chip IC7 in sequence. The communication modes used among various industrial devices are 485 communication and TTL communication basically, so that a 485 communication circuit is particularly added for providing more communication modes, two development boards can be communicated with each other, and devices connected on the development boards can be communicated. A toggle switch is provided on the chip IC7 to enable or disable the 485 bus termination resistor. Pin 1 and pin 4 of the chip IC7 are connected to pin 30 and pin 31 of the chip IC4, respectively. Pin 2 and pin 3 of chip IC7 are connected. Pin 3 of chip IC7 is connected to a voltage of 5V through resistor R7. Pin 8 is connected to a 5V power supply and to ground through capacitor C4. The dial switch S1 and the resistor R8 are connected between the pin 6 and the pin 7 in sequence. Pin 7 is connected to ground via resistor R6, and pin 6 is connected to a 5V power supply via resistor R4.

In this embodiment, as shown in fig. 1, fig. 2, and fig. 5, the power amplifying circuit includes a transistor U $9, a transistor U $4, and a MOS transistor Q1, a base of the transistor U $9 is connected to the control chip output pin D3, emitters of the transistor U $9 and the transistor U $4 are connected to the step-down circuit, a base of the transistor U $4 is connected to a collector of the transistor U $9, a diode D1 is connected between a collector and an emitter of the transistor U $4, a collector of the transistor U $4 is connected to a gate of the MOS transistor Q1, a diode D5 for protecting the MOS transistor Q1 is disposed between a drain and a source of the MOS transistor Q1, and a diode D4 is disposed on a drain of the MOS transistor Q1; an output cathode port X2-1 and an output anode port X2-2 are respectively arranged on the anode and the cathode of the diode D4, and the anode port X2-2 is directly connected with a power circuit. D3 is the PWM pin from the chip, then after passing through the resistor RN9D, the LED lamp will display the signal state, which shows whether there is a signal or not, and what the frequency of the signal is. Then two transistors U $4 and U $9 are connected, and two-stage transistors are used for pushing the MOS transistor Q1 of the following stage to transmit a driving signal. D4 and D5 are two diodes, D4 prevents VINX2-2 from being directly connected with X2-1 (cathode) to play an isolation role, and D5 is a protection MOS tube. The signal D3 is used to select whether the negative pole is connected, and what the frequency of the negative pole is, the frequency is that the negative pole is connected to the circuit at intervals of one second to drive a next-connected device, and may be three seconds. The external power source is directly connected to VIN and is always conducted. The MOS tube needs 5V voltage when being opened and closed, so that 5V output from the voltage reduction circuit is led to one branch to supply 5V voltage to the MOS tube through two paths of 1K resistors, a triode and a diode D1, and the MOS tube is opened. Since D3, etc. of the extracted signal are all pins capable of adjusting the frequency of the signal output, in order to reach the required frequency of the signal, a transistor drive is adopted, and compared with a relay, the transistor can drive the signal with the frequency of the belt, but the relay does not. The relay is 5V and 1A, the transistor is 5V and 2A, and the transistor can pass larger current. The external power source is used for providing enough current, and the power can be increased by increasing the current under the condition of consistent voltage. The relay can be connected with alternating current and direct current, and the transistor is direct current.

In this embodiment, as shown in fig. 1, fig. 2, and fig. 4, an optical coupling isolation circuit is connected between the input port and the control chip. And an optical coupling isolation circuit is connected between each input port and the control chip. In the application, six power amplifying circuits are designed, six signal input ports are correspondingly equipped, and one signal input port can control one output or multiple outputs through programming. And an optical coupling isolation circuit is added to each signal input port for avoiding the influence of high voltage on low voltage.

In this embodiment, as shown in fig. 1, fig. 2, and fig. 4, the chip type adopted by the optical coupler isolation circuit is PS 2501. An optical coupling isolation circuit is added at each signal input port, and the optical coupling isolation circuit ensures that the two isolated parts of circuits are not electrically and directly connected, so that the interference caused by the electrical connection is mainly prevented, and particularly the interference between a low-voltage (5V) control circuit and an external high-voltage (24V) circuit is prevented. A pin 1 of each optocoupler chip is correspondingly connected with an input port, and a light emitting diode and a resistor are connected between the pin 1 and the input port. When the corresponding input port has an input signal, the light emitting diode on the corresponding circuit is lighted, so that the function of indication can be achieved. And pins 2 of all the optical coupling chips are commonly connected with a second grounding loop. Pins 4 of all the optical coupling chips are connected with 5V voltage in common. All the pins 3 of the optical coupling chips are connected with resistors and then are connected with a ground circuit together.

In this embodiment, as shown in fig. 1 and 6, the voltage reduction circuit adopts a voltage reduction chip IC5 with model XL 1509. XL1509 is a 150KHz fixed rate pulse width modulated (buck type) DC/DC converter. The load has 2A load driving capability, high efficiency, low ripple, excellent linearity, good load regulation capability and minimum external elements. The adjustable output is simple to use, and a frequency compensation and fixed frequency oscillator are built in. The pulse width modulation control circuit can linearly adjust the duty cycle from 0 to 100%. The XL1509 circuit breaker has an enabling function and a built-in overcurrent and short-circuit protection function, and when overcurrent and short-circuit protection occurs, the working frequency of XL1509 is reduced from 150KHz to 50 KHz. The built-in frequency compensation module minimizes XL1509 external components.

Pins

5, 6, 7 and 8 of an XL1509 chip IC5 are sequentially connected, an electrolytic capacitor C20 is connected between

pins

1 and 5, the anode of a power supply is connected with the anode of the electrolytic capacitor C20 through a diode D3, and the cathode of the power supply is connected with the cathode of the electrolytic capacitor C20. The filtering action of the electrolytic capacitor C20 filters out noise in the power supply. A resistor R12 is connected between chip pin 8 and pin 4. A diode D2 is connected between the chip pin 2 and the electrolytic capacitor C20, two ends of the diode D2 are connected to the electrolytic capacitor C19, and two ends of the electrolytic capacitor C19 are respectively connected with the capacitor C28 and the capacitor C29 in parallel. The voltage of 5V is output through the anode of the electrolytic capacitor C19.

In short, the above description is only a preferred embodiment of the present invention, and all the equivalent changes and modifications made in accordance with the claims of the present invention should be covered by the scope of the present invention.

Claims

1. A multi-path high-power equipment control system is characterized in that: comprises the steps of (a) preparing a mixture of a plurality of raw materials,

the 485 communication circuit is connected with the control chip and is used for communicating with various devices;

the control chip is also connected with a plurality of input ports.

2. The multi-channel high power equipment control system according to claim 1, wherein: the control chip adopts an ATMEGA328P chip or an STM32 or MEGA2560 or 51 single chip microcomputer.

3. The multi-channel high power equipment control system according to claim 2, wherein: the bootstrap program burning circuit is connected with the RESET end of the control chip and comprises a switch S2 and a 2x3pin J3 which are connected with the RESET end of the control chip in parallel.

4. A multi-channel power plant control system according to claim 2 or 3, characterized in that: the ATMEGA328P controls the connection of crystal oscillators X1-16M on the 7 and 8 pins of the chip.

5. A multi-channel power plant control system according to claim 2 or 3, characterized in that: the program burning circuit comprises a cp2104 type chip, a connecting resistor R3 is connected between a pin 5 and a pin 9 of the cp2104 type chip, the pin 5 is connected with a pin 6, an electrolytic capacitor C21 is connected between the pin 5 and a pin 2, and the pins 3 and 4 are connected with a USB interface.

6. A multi-channel power plant control system according to claim 2 or 3, characterized in that: the 485 communication circuit adopts a max1345 type chip, and a dial switch S1 is sequentially connected between pins 6 and 7 of the max1345 type chip.

7. A multi-channel power plant control system according to claim 1, 2 or 3, characterized in that: the power amplification circuit comprises a triode U $9, a triode U $4 and an MOS tube Q1, wherein the base level of the triode U $9 is connected with an output pin D3 of a control chip, the emitting electrodes of the triode U $9 and the triode U $4 are connected with a voltage reduction circuit, meanwhile, the base level of the triode U $4 is connected with the collector electrode of the triode U $9, a diode D1 is connected between the collector electrode and the emitting electrode of the triode U $4, the collector electrode of the triode U $4 is connected with the grid electrode of an MOS tube Q1, a diode D5 for protecting the MOS tube Q1 is arranged between the drain electrode and the source electrode of the MOS tube Q1, and a diode D4 is arranged on the drain electrode of the MOS tube Q; an output cathode port X2-1 and an output anode port X2-2 are respectively arranged on the anode and the cathode of the diode D4, and the anode port X2-2 is directly connected with a power circuit.

8. A multi-channel power plant control system according to claim 1, 2 or 3, characterized in that: and an optical coupling isolation circuit is connected between the input port and the control chip.

9. The multi-channel high power equipment control system according to claim 8, wherein: the chip model of the optical coupling isolation circuit is PS 2501.

10. A multi-channel power plant control system according to claim 1, 2 or 3, characterized in that: the voltage reduction circuit adopts a voltage reduction chip with the model of XL 1509.