CN210041414U

CN210041414U - Photocell and storage battery stable double-power supply and monitoring device

Info

Publication number: CN210041414U
Application number: CN201920987658.4U
Authority: CN
Inventors: 王楚蓥; 王兰兰; 曾桂根
Original assignee: Nanjing Post and Telecommunication University
Current assignee: Nanjing Post and Telecommunication University; Nanjing University of Posts and Telecommunications
Priority date: 2019-06-24
Filing date: 2019-06-24
Publication date: 2020-02-07
Anticipated expiration: 2029-06-24

Abstract

The utility model discloses a photocell, stable two power supplies of battery and monitoring devices, include: Cortex-M4 chip, storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit, load, solar panel, maximum power tracker and current detection circuit, the load is connected to Cortex-M4 chip, and storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit and load connect gradually, connect detection circuitry and connect Cortex-M4 chip, and solar panel, maximum power tracker and current detection circuit connect gradually, and detection circuitry connects integrated circuit and Cortex-M4 chip respectively. The storage battery of the battery car and the solar cell are combined for double power supply, so that the problem of stable power supply in outdoor movement is solved; the two power supplies respectively pass through the detection circuits suitable for the two power supplies, and the control chip can adjust the load according to the detection result, so that the power consumption is saved; both power supplies are spontaneously regulated by an integrated circuit based on high performance schottky diodes to supply the load with the current higher voltage.

Description

Photocell and storage battery stable double-power supply and monitoring device

Technical Field

The utility model belongs to the technical field of the power supply, concretely relates to photocell, stable two power supplies of battery and monitoring devices.

Background

With the development of science and technology and the popularization of electronic products, mobile power supply becomes a big problem, and solar energy is the first choice to generate electricity. The common solar power supply system is directly powered by a solar battery or stores energy and supplies power through a lead storage battery. However, the power supply device has large volume and short service life, cannot continuously supply power in continuous rainy days, and has great limitation in long-term use outdoors.

The retrieved patent at present is "a power supply circuit with solar energy and two power supply interfaces of commercial power", be about for alternating current or solar energy power supply after the steady voltage of voltage stabilizing chip, but the power supply of the same way supplies power for chargeable lithium cell, and the power of the same way is output, but chargeable lithium cell is for stand-by power supply, has solved current consumer and has adopted the problem that alternating current installation is troublesome and with high costs, still has not solved outdoor removal power supply problem.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome not enough among the prior art, provide a photocell, the stable two power supplies of battery and monitoring devices, include: Cortex-M4 chip, storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit, load, solar panel, maximum power tracker and current detection circuit, the load is connected to Cortex-M4 chip, and storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit and load connect gradually, connect detection circuitry and connect Cortex-M4 chip, and solar panel, maximum power tracker and current detection circuit connect gradually, and detection circuitry connects integrated circuit and Cortex-M4 chip respectively.

Further, the DCDC voltage reduction circuit includes a signal positive input terminal, a signal negative input terminal, a diode D1, a resistor R1, a resistor R2, a resistor R3, a UC3845 3, a chip U3 of the EL817 chip U3, a transformer U3, a MOS transistor Q3, a capacitor C3 and a capacitor C3, the capacitor C3 and the resistor R3 are respectively connected to the UC 383672 chip U3, the capacitor C3 is connected to the resistor R3 through the resistor R3, the other terminal of the resistor R3 and the resistor R3, the other terminal of the resistor R3 is connected to the UC3, the resistor C3, the UC3, the resistor C3 and the resistor R3 are respectively connected to the UC3, the resistor R3, the drain of the resistor R3 and the resistor R3 are connected to the resistor R, a resistor R4 is connected to a capacitor C6, a drain of the MOS transistor Q1 is connected to a source of the MOS transistor Q2, cathodes of the capacitors C3 are respectively connected to chips U1 of C7 and UC3845B, an anode of the capacitor C3 is connected to a source of the MOS transistor Q1 through a resistor R3, a source of the MOS transistor Q1 is connected to an anode of a capacitor C2, a cathode of the capacitor C2 is respectively connected to a resistor R11 and a resistor R8, the resistor R8 is respectively connected to an emitter of the transistor Q8 and a cathode of the capacitor C8, the resistor R8 is connected to a cathode of the capacitor C8 through a resistor R8, the resistor R8 is connected to an anode of the capacitor C8 through a transformer U8, a cathode of the capacitor C8 is connected to a signal negative input terminal, a base of the transistor Q8 is connected to a cathode of the capacitor C8, an anode of the capacitor UC 8 is respectively connected to a collector of the transistor Q8 and a terminal of the capacitor U383672 through the resistor R8, the resistor UC 8, the resistor R8 is connected to one end of the capacitor U8, the chip 8, the resistor U8, the resistor UC 8 and, the other end of the capacitor C8 is connected with a resistor R1, one end of the capacitor C8 is connected with the UC3845B chip U1, the other end of the capacitor C4 is connected with the MOS tube Q2, the grid and the drain of the MOS tube Q2 are both connected with a signal negative input end, the source of the MOS tube Q2 is connected with a signal positive input end through a transformer U3, the source of the MOS tube Q1 is connected with a signal positive input end, a transformer U3 is connected with the signal positive input end, the negative electrode of a diode D1 is connected with the positive electrode of the capacitor C3, the positive electrode of the diode D1 is connected with a.

Further, a maximum power tracking circuit is arranged in the maximum power tracker, and the maximum power tracking circuit comprises: a pin bank P1, a pin bank P2, a capacitor C2, a resistor R2, a diode D2, a zener diode D2, an inductor L2, and an LT3652 chip U2, the capacitor C2 and the capacitor C2 are connected in parallel to the pin bank P2, the ground is connected to the negative terminal of the capacitor C2, the resistor R2 is connected to the positive terminal of the capacitor C2, the resistor R2 is connected to the negative terminal of the resistor R2, the resistor R2 is connected to the ground, the negative terminal of the resistor R2 is connected to the resistor LT 2, the resistor R2 is connected to the negative terminal of the LT 2, the resistor R2 and the resistor R2 are connected to the LT3652, the resistor R2 is connected to the negative terminal of the LT 2, the resistor R is connected with the LT3652 chip U, the cathode of the diode D is connected with the resistor R, the anode of the diode D is connected with the LT3652 chip U, the resistor R is connected with the resistor R, the resistor R is grounded through the capacitor C, the LT3652 chip U is grounded through the capacitor C and the resistor R respectively, the cathode of the voltage stabilizing diode D is connected with the LT3652 chip U, the anode of the voltage stabilizing diode D is grounded, the resistor R is connected with the cathode of the voltage stabilizing diode D through the inductor L, the resistor R is connected with the LT3652 chip U, one end of the capacitor C is connected with the cathode of the voltage stabilizing diode D, the cathode of the voltage stabilizing diode D is connected with the LT3652 chip U, the anode of the voltage stabilizing diode D is grounded through the capacitor C.

Further, the connection detection circuit includes: resistance R19, resistance R20, the positive output terminal of 3V voltage and the negative output terminal of 3V voltage, DCDC step-down circuit is connected to resistance R19 one end, and the positive output terminal of 3V voltage is connected to the other end, and 3V voltage negative output terminal is connected through resistance R20 to resistance R19.

Further, the integrated circuit includes: diode D7, diode D8 and 12V voltage positive output end, the anodal DCDC step-down circuit signal positive input end of connecting of diode D7, 12V voltage positive output end is connected to the negative pole, diode D8 anodal connection maximum power tracking circuit positive input end, 12V voltage positive output end is connected to the negative pole.

Further, the current detection circuit includes: the chip comprises an IN282 chip U4, a resistor R21 and a signal output end, wherein the resistor R21 is connected to the IN282 chip U4, one end of the IN282 chip U4 is grounded, and the other end of the IN282 chip U4 is connected with the signal output end.

The utility model discloses the beneficial effect who possesses:

1. the storage battery of the battery car and the solar cell are combined for double power supply, so that the problem of stable power supply in outdoor movement is solved;

2. the two power supplies respectively pass through the detection circuits suitable for the two power supplies, and the control chip can adjust the load according to the detection result, so that the power consumption is saved;

3. both power supplies are spontaneously regulated by an integrated circuit based on high performance schottky diodes to supply the load with the current higher voltage.

Drawings

FIG. 1 is a schematic view of a preferred embodiment of the present invention;

FIG. 2 is a schematic diagram of the DCDC step-down circuit of the present invention;

fig. 3 is a circuit diagram of the maximum power tracking of the present invention;

FIG. 4 is a circuit diagram of the connection detection circuit of the present invention;

FIG. 5 is an integrated circuit diagram of the present invention;

fig. 6 is a current detecting circuit of the present invention.

Detailed Description

The present invention will be further described with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.

As shown in fig. 1, a photovoltaic cell and battery stabilization dual power supply and monitoring device includes: Cortex-M4 chip, storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit, load, solar panel, maximum power tracker and current detection circuit, the load is connected to Cortex-M4 chip, and storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit and load connect gradually, connect detection circuitry and connect Cortex-M4 chip, and solar panel, maximum power tracker and current detection circuit connect gradually, and detection circuitry connects integrated circuit and Cortex-M4 chip respectively.

As shown in fig. 2, the DCDC voltage-reducing circuit includes a signal positive input terminal, a signal negative input terminal, a diode D1, a resistor R1, a resistor R2, a resistor R3, a UC3845 3, a chip U3 of the EL817 chip U3, a transformer U3, a MOS transistor Q3, a capacitor C3 and a capacitor C3, the capacitor C3 and the resistor R3 are respectively connected to a UC 7 pin and a UC 6 pin of the UC 383672 chip U3 of the UC 383672, the capacitor C3 is connected to the resistor R3 through the resistor R3, the other terminal of the resistor R3 and the resistor R3 are respectively connected to the resistor R3, the other terminal of the resistor R3, the resistor R3 and the other terminal of the resistor R3 are connected to the resistor R3, a resistor R4 is connected with a capacitor C6, the drain of the MOS transistor Q1 is connected with the source of the MOS transistor Q2, the cathode of the capacitor C3 is respectively connected with the 5 feet of the chips U1 of capacitors C7 and UC3845B, the anode of the capacitor C3 is connected with the source of the MOS transistor Q1 through a resistor R3, the source of the MOS transistor Q1 is connected with the anode of a capacitor C2, the cathode of the capacitor C2 is respectively connected with a resistor R11 and a resistor R8, the resistor R8 is respectively connected with the emitter of the triode Q3 and the cathode of the capacitor C5, the resistor R11 is connected with the cathode of the capacitor C11 through a resistor R11, the resistor R11 is connected with the anode of the capacitor C11 through a transformer U11, the cathode of the capacitor C11 is connected with the signal negative input terminal, the base of the triode Q11 is connected with the cathode of the UC of the capacitor C11, the anode of the capacitor C11 is respectively connected with the collector of the transistor Q11 and the two ends of the resistor U3872, the resistor R11 and the resistor U11 are respectively connected with the two ends of the chip U3872 and the resistor R11 of the chip U11, one end of a capacitor C9 is connected with a resistor R6, the other end of the capacitor C9 is connected with a resistor R1, one end of a capacitor C8 is connected with pin 4 of a UC3845B chip U1, the other end of the capacitor C4 is connected with a capacitor C4, the gate and the drain of an MOS tube Q2 are both connected with a signal negative input end, the source of the MOS tube Q2 is connected with a signal positive input end through a transformer U3, the source of the MOS tube Q1 is connected with a signal positive input end, a transformer U3 is connected with the signal positive input end, the cathode of a diode D1 is connected with the anode of a capacitor C3, the anode of a diode D1 is connected with.

As shown in fig. 3, the maximum power tracking circuit in the maximum power tracker includes: pin bank P1, pin bank P2, capacitor C11, capacitor C12, resistor R12, diode D12, zener diode D12, inductor L12, and LT3652 chip U12, capacitor C12 and capacitor C12 are connected in parallel to pin 3 of pin bank P12,

pins

1 and 2 of pin bank P12 are connected to ground, the cathode of capacitor C12 is connected to ground, resistor R12 is connected to the anode of capacitor C12, resistor R12 is connected to the cathode of capacitor C12, resistor R12 is connected to ground, the anode of resistor R12 and the resistor R12 are connected to the ground, the anode of capacitor LT 12 and the resistor R12, the resistor R12 is connected to the resistor R12, the anode of resistor R12, the resistor R12 and the resistor R12, the resistor R12 are connected to the resistor LT3652, the resistor R12 is connected to the resistor R12, the other terminal, the cathode of the zener diode D4 is connected with the 1 pin of the LT3652 chip U4, the resistor R4 is connected with the 2 pin of the LT3652 chip U4, the cathode of the diode D4 is connected with the resistor R4, the anode of the diode D4 is connected with the 5 pin of the LT3652 chip U4, the cathode of the diode D4 is connected with the resistor R4, the anode of the diode D4 is connected with the pin of the LT3652 chip U4, the resistor R4 is connected with the resistor R4, the resistor R4 is grounded through a capacitor C4, the

pins

6 and 7 of the LT3652 chip U4 are respectively grounded through a capacitor C4 and a resistor R4, the cathode of the zener diode D4 is connected with the pin 12 of the LT3652 chip U4, the anode of the diode is grounded, the resistor R4 is connected with the cathode of the zener diode D4 through an inductor L4, the resistor R4 is connected with the pin 9 pin of the LT3652 chip U4, one end of the capacitor C4 is connected with the cathode of the zener diode D4, the anode of the LT 4, the pin of the LT 4 is connected with the pin of the LT3652 chip P pin, the pin of the, the positive pole of the capacitor C18 is connected with pin 1 of the pin header P2, and the negative pole is connected with the capacitor C15.

As shown in fig. 4, the connection detection circuit includes: resistance R19, resistance R20, the positive output terminal of 3V voltage and the negative output terminal of 3V voltage, DCDC step-down circuit is connected to resistance R19 one end, and the positive output terminal of 3V voltage is connected to the other end, and 3V voltage negative output terminal is connected through resistance R20 to resistance R19.

As shown in fig. 5, the integrated circuit includes: diode D7, diode D8 and 12V voltage positive output end, the anodal DCDC step-down circuit signal positive input end of connecting of diode D7, 12V voltage positive output end is connected to the negative pole, diode D8 anodal connection maximum power tracking circuit positive input end, 12V voltage positive output end is connected to the negative pole. Diodes D7 and D8 are high performance Schottky diodes

As shown in fig. 6, the current detection circuit includes: the chip comprises an IN282 chip U4, a resistor R21 and a signal output end, wherein one end of the resistor R21 is connected with a pin 1 of the IN282 chip U4, the other end of the resistor R21 is connected with a pin 8 of the pin 1 of the IN282 chip U4,

pins

2, 3 and 4 of the IN282 chip U4 are connected with the ground, and a pin 5 of the IN282 chip U4 is connected with the signal output end.

The utility model discloses a photocell, two power supplies of battery stabilization and monitoring devices to DC-DC step-down circuit that UC38458 chip is given first place to LT3652HV chip is the maximum power tracking circuit who gives first place to, the sampling circuit who gives first place to the IN282 chip, with ARM Cortex-M4 chip detection feedback control circuit and with isolation and the voltage stabilizing circuit of dual supply integration. Wherein the DC-DC voltage reduction circuit reduces the voltage (60V) of the storage battery to a voltage value (12V) suitable for the load operation; the Maximum Power Point Tracking (MPPT) circuit can adjust the resistance of the MPPT circuit according to the current voltage of the photocell, so that the output power of the photocell reaches the current maximum value; a current detection circuit mainly comprising an IN282 chip converts the current output by the collected photocell into voltage to be input into the single chip microcomputer to judge whether the solar energy supplies power or not; the connection detection circuit detects whether the storage battery supplies power for the load; the detection feedback control circuit collects voltage signals of the sampling circuit and the current detection circuit, judges the respective working states of the double batteries and properly adjusts the load power consumption; the isolation and voltage stabilizing circuit integrated by the double power supplies enables the photocell and the storage battery to pass through two high-performance Schottky diodes respectively, the voltage value of the photocell is set to be slightly higher than the voltage value supplied by a load, the photocell supplies power to the load when the sunlight is sufficient, the storage battery supplies power to the load when the sunlight is insufficient, partial power is supplied to the load simultaneously when the sunlight is critical, and double-power-supply non-delay switching is achieved through self-adaptation of the circuit.

The stm32 singlechip is still connected to this device, and solar panel will receive the light energy conversion and be voltage, adjusts self resistance through maximum power tracker, outputs current solar panel's maximum voltage, and together with the battery through DC-DC step-down storage battery car, supply power output stable supply voltage in turn according to the condition through two high performance schottky diode integrations separately. And a current detection circuit is arranged at the solar power supply position to judge the working state of the stm32 single chip microcomputer, and a connection detection circuit is arranged at the storage battery power supply position to judge the working state of the stm32 single chip microcomputer. In combination with these two determinations, the single-chip microcomputer controls the output power of the load by adjusting the SPWM wave duty cycle to vary the current supplied to the load to optimize power consumption.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be considered as the protection scope of the present invention.

Claims

1. The utility model provides a photocell, stable pair of power supply of battery and monitoring devices which characterized in that includes: Cortex-M4 chip, storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit, load, solar panel, maximum power tracker and current detection circuit, the load is connected to Cortex-M4 chip, and storage battery, DCDC step-down circuit, connection detection circuitry, integrated circuit and load connect gradually, connect detection circuitry and connect Cortex-M4 chip, and solar panel, maximum power tracker and current detection circuit connect gradually, and detection circuitry connects integrated circuit and Cortex-M4 chip respectively.

2. The device as claimed in claim 1, wherein the DCDC voltage reduction circuit includes a signal positive input terminal, a signal negative input terminal, a diode D1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R8, a resistor R9, a resistor R10, a UC3845 10 chip U10, an EL817 chip U10, a transformer U10, a MOS transistor Q10, a triode Q10, a capacitor C10, a UC 10, a resistor R10, a resistor C10, a capacitor C10, a resistor R10, a capacitor C10, a resistor R10, the other end of the resistor R is connected with the drain electrode of the MOS tube Q through the resistor R, the resistor R is connected with a capacitor C, the drain electrode of the MOS tube Q is connected with the source electrode of the MOS tube Q, the cathode of the capacitor C is respectively connected with the capacitor C and the UC3845 chip U, the anode of the capacitor C is connected with the source electrode of the MOS tube Q through the resistor R, the source electrode of the MOS tube Q is connected with the anode of the capacitor C, the cathode of the capacitor C is respectively connected with the resistor R and the resistor R, the resistor R is respectively connected with the emitting electrode of the triode Q and the cathode of the capacitor C, the resistor R is connected with the cathode of the capacitor C through the resistor R, the resistor R is connected with the anode of the capacitor C through a transformer U, the cathode of the capacitor C is connected with the signal negative input end, the base electrode of the triode Q is connected with the cathode of the capacitor C, the anode of the capacitor C is respectively connected with the collector electrode of the triode Q and the EL817 chip, one end of a capacitor C9 is connected with a resistor R6, the other end is connected with a resistor R1, one end of a capacitor C8 is connected with a UC3845B chip U1, the other end is connected with a capacitor C4, the gate and the drain of an MOS tube Q2 are both connected with a signal negative input end, the source of the MOS tube Q2 is connected with a signal positive input end through a transformer U3, the source of the MOS tube Q1 is connected with a signal positive input end, a transformer U3 is connected with a signal positive input end, the cathode of a diode D1 is connected with the anode of a capacitor C3, the anode of a diode D1 is connected with a resistor R10, and a resistor R9.

3. The device as claimed in claim 2, wherein a maximum power tracking circuit is provided in the maximum power tracker, comprising: a pin bank P1, a pin bank P2, a capacitor C2, a resistor R2, a diode D2, a zener diode D2, an inductor L2, and an LT3652 chip U2, the capacitor C2 and the capacitor C2 are connected in parallel to the pin bank P2, the ground is connected to the negative terminal of the capacitor C2, the resistor R2 is connected to the positive terminal of the capacitor C2, the resistor R2 is connected to the negative terminal of the resistor R2, the resistor R2 is connected to the ground, the negative terminal of the resistor R2 is connected to the resistor LT 2, the resistor R2 is connected to the negative terminal of the LT 2, the resistor R2 and the resistor R2 are connected to the LT3652, the resistor R2 is connected to the negative terminal of the LT 2, the resistor R is connected with the LT3652 chip U, the cathode of the diode D is connected with the resistor R, the anode of the diode D is connected with the LT3652 chip U, the resistor R is connected with the resistor R, the resistor R is grounded through the capacitor C, the LT3652 chip U is grounded through the capacitor C and the resistor R respectively, the cathode of the voltage stabilizing diode D is connected with the LT3652 chip U, the anode of the voltage stabilizing diode D is grounded, the resistor R is connected with the cathode of the voltage stabilizing diode D through the inductor L, the resistor R is connected with the LT3652 chip U, one end of the capacitor C is connected with the cathode of the voltage stabilizing diode D, the cathode of the voltage stabilizing diode D is connected with the LT3652 chip U, the anode of the voltage stabilizing diode D is grounded through the capacitor C.

4. A photovoltaic, battery-stabilized dual power supply and monitoring device as claimed in claim 3, wherein said connection detection circuit comprises: resistance R19, resistance R20, the positive output terminal of 3V voltage and the negative output terminal of 3V voltage, DCDC step-down circuit is connected to resistance R19 one end, and the positive output terminal of 3V voltage is connected to the other end, and 3V voltage negative output terminal is connected through resistance R20 to resistance R19.

5. The photovoltaic, battery-stabilized dual power supply and monitoring device according to claim 4, wherein said integrated circuit comprises: diode D7, diode D8 and 12V voltage positive output end, the anodal DCDC step-down circuit signal positive input end of connecting of diode D7, 12V voltage positive output end is connected to the negative pole, diode D8 anodal connection maximum power tracking circuit positive input end, 12V voltage positive output end is connected to the negative pole.

6. The photovoltaic cell, battery stabilization dual power supply and monitoring device as claimed in claim 5, wherein said current detection circuit comprises: the chip comprises an IN282 chip U4, a resistor R21 and a signal output end, wherein the resistor R21 is connected to the IN282 chip U4, one end of the IN282 chip U4 is grounded, and the other end of the IN282 chip U4 is connected with the signal output end.