CN209964073U - Network port deconcentrator and LED display system - Google Patents
Network port deconcentrator and LED display system Download PDFInfo
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- CN209964073U CN209964073U CN201921221339.9U CN201921221339U CN209964073U CN 209964073 U CN209964073 U CN 209964073U CN 201921221339 U CN201921221339 U CN 201921221339U CN 209964073 U CN209964073 U CN 209964073U
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Abstract
The embodiment of the utility model discloses net gape deconcentrator and LED display system. The network port deconcentrator comprises: a programmable logic device; the main network port is electrically connected with the programmable logic device; the slave net port is electrically connected with the programmable logic device; the plurality of load network ports are electrically connected with the programmable logic device; and the microcontroller is electrically connected with the programmable logic device. The embodiment of the utility model provides a can solve the present problem that send card output net gape is small in quantity.
Description
Technical Field
The utility model relates to a show technical field, especially relate to a net gape deconcentrator and a LED display system.
Background
The existing sending card has limited number of output network ports, and each output network port carries about 65 ten thousand pixel points; under the application scenes that the number of LED display box groups of the bamboo slip screen, the creative screen and the LED display screens which cannot be transversely wired is large, but the number of pixel points of a single LED display box group is small, the defect that the number of output network ports of the sending card is small is shown. For example, when a bamboo screen has twenty LED display box groups, each LED display box group needs to be connected to an output network port of a sending card, and the output network port of the sending card is not enough, so that the output network port needs to be increased by increasing the number of the sending cards, but this way greatly increases the hardware cost of the system.
SUMMERY OF THE UTILITY MODEL
Therefore, the embodiment of the utility model provides a net gape deconcentrator and a LED display system to solve the present problem that send card output net gape is small in quantity.
On the one hand, the embodiment of the utility model provides a pair of net gape deconcentrator, include: a programmable logic device; the main network port is electrically connected with the programmable logic device; the slave net port is electrically connected with the programmable logic device; the plurality of load network ports are electrically connected with the programmable logic device; and the microcontroller is electrically connected with the programmable logic device.
In this embodiment, the programmable logic device is connected with the master network port, the slave network port, and the plurality of on-load network ports, and the purpose of increasing the number of output network ports is achieved by expanding the plurality of on-load network ports.
In an embodiment of the present invention, the network port deconcentrator further comprises a memory electrically connecting the programmable logic device and the microcontroller.
In this embodiment, the memory is used to store data.
In an embodiment of the present invention, the network port deconcentrator further comprises: and the plurality of PHY chips are electrically connected among the main network port, the slave network port, the plurality of loaded network ports and the programmable logic device, and the main network port, the slave network port, the plurality of loaded network ports and the plurality of PHY chips are arranged in a one-to-one correspondence manner.
In an embodiment of the present invention, the network port deconcentrator further comprises: and the plurality of network transformers are electrically connected among the main network port, the slave network port, the plurality of on-load network ports and the plurality of PHY chips, the main network port and the slave network port share one network transformer, and every two on-load network ports share one network transformer.
In an embodiment of the present invention, the network port deconcentrator further comprises: and the crystal oscillators are electrically connected with the PHY chips.
In another aspect, an embodiment of the present invention provides a LED display system, including: the first network port deconcentrator is any one of the network port deconcentrators; a plurality of first receiving card sets, wherein each first receiving card set comprises one receiving card or a plurality of cascaded receiving cards, and each first receiving card set is electrically connected to one loaded network port of the first network port splitter; and the first LED display box body groups are respectively and electrically connected with the first receiving card groups, wherein each first LED display box body group comprises one or more LED display box bodies.
In this embodiment, one loaded network port of the network port splitter can be connected with one independent LED display box group, so that one network port splitter can be connected with a plurality of independent LED display box groups, the number of the connected independent LED display box groups is increased by expanding the loaded network port, and the LED display screen with a plurality of LED display box groups can be realized.
In an embodiment of the present invention, the LED display system further includes: the second network port splitter is any one of the network port splitters, wherein the main network port of the second network port splitter is electrically connected with the slave network port of the first network port splitter; a plurality of second receiving card sets, wherein each second receiving card set comprises one receiving card or a plurality of cascaded receiving cards, and each second receiving card set is electrically connected to one loaded network port of the second network port splitter; and the second LED display box body groups are respectively and electrically connected with the second receiving card groups, wherein each second LED display box body group comprises one or more LED display box bodies.
In this embodiment, by cascading the second network port splitter on the first network port splitter, the network port with load can be added through the second network port splitter on the basis of the first network port splitter, so that the network port with load can be further increased, and the number of the second network port splitters can be flexibly set according to the number of the LED display box groups to meet the requirements of the LED display screens with different numbers of the LED display box groups.
In an embodiment of the present invention, the LED display system further includes: and the sending card is provided with a first output network port, wherein the first output network port is electrically connected with the main network port of the first network port deconcentrator.
In this embodiment, the sending card is connected to the first network port splitter to output an image, so that the LED display box assembly displays the image.
In an embodiment of the present invention, the LED display system further includes: a third receiving card group, which comprises a receiving card or a plurality of cascaded receiving cards, and is electrically connected to the second output network port of the sending card; and the third LED display box body group is electrically connected with the third receiving card group, wherein the third LED display box body group comprises one or more LED display box bodies.
In an embodiment of the present invention, the transmitting card further includes: a video interface; the first output network port is electrically connected with the second programmable logic device through the PHY chip; a video decoder electrically connected between the video interface and the second programmable logic device; and the second microcontroller is electrically connected with the second programmable logic device.
To sum up, the above technical solution can have the following advantages or beneficial effects: the network ports for on-load output can be expanded, and the problem that the number of output network ports of the sending card is insufficient is solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a network port splitter according to a first embodiment of the present invention.
Fig. 2 is a schematic diagram of a specific structure of a network port splitter according to a first embodiment of the present invention.
Fig. 3 is a circuit schematic of the programmable logic device of fig. 2.
Fig. 4 is a circuit diagram of the master net port, the slave net port and the load net port in fig. 2.
Fig. 5 is a circuit schematic diagram of the microcontroller in fig. 2.
Fig. 6 is a circuit diagram of the PHY chip of fig. 2.
Fig. 7 is a circuit diagram of the network transformer of fig. 2.
FIG. 8 is a circuit diagram of the memory of FIG. 2.
Fig. 9 is a circuit diagram of the crystal oscillator of fig. 2.
Fig. 10 is a schematic structural diagram of an LED display system according to a second embodiment of the present invention.
Fig. 11 is a schematic structural diagram of another LED display system according to a second embodiment of the present invention.
Fig. 12 is a schematic structural diagram of another LED display system according to a second embodiment of the present invention.
Fig. 13 is a schematic diagram of an architecture of another LED display system according to a second embodiment of the present invention.
Fig. 14 is a schematic structural diagram of a transmitting card according to a second embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
[ first embodiment ] A method for manufacturing a semiconductor device
Referring to fig. 1, which is a first embodiment of the present invention, an internet access splitter 10 includes a programmable logic device 11, a microcontroller 12, a master internet access 14, a slave internet access 15, and a plurality of on-load internet accesses 16.
Referring to fig. 3, the programmable logic device 11 is, for example, an FPGA (field programmable Gate Array) chip, and the PFGA chip is, for example, an FPGA chip of EP4CE6F256 type.
The programmable logic device 11 is electrically connected with a main network port 14, a slave network port 15 and a plurality of load network ports 16; the master port 14 is, for example, an RJ45 port, and the slave port 15 is, for example, an RJ45 port. It is worth noting here that fig. 4 shows two net ports, one of which may be a master net port 14 and the other a slave net port 15. The plurality of loaded network ports 16 are, for example, RJ45 network ports; fig. 4 shows two network ports, which are, for example, in each case a load network port 16.
The programmable logic device 11 is for example also electrically connected to a Microcontroller 12, see fig. 5, the Microcontroller 12 being for example an MCU (Microcontroller Unit Microcontroller) chip, for example an MCU chip of the model STM8S003F 3.
Referring to fig. 2, in one embodiment, the network interface splitter 10 further includes a plurality of PHY chips 17, for example, wherein each of the on-board network interfaces 16 is connected to the programmable logic device 11 through one PHY chip 17, and the master network interface 14 and the slave network interface 15 are connected to the programmable logic device 11 through one PHY chip 17. Referring to fig. 6, the PHY chip 17 is, for example, an ethernet PHY (portable layer) chip, such as an ethernet PHY chip of type AR 8035.
Referring to fig. 2 again, in a specific embodiment, the network port splitter 10 further includes a plurality of network transformers 18, for example, each of the load network ports 16 is connected to a PHY chip 17 corresponding to the load network port 16 through a network transformer 18, the master network port 14 is connected to the PHY chip 17 corresponding to the master network port 14 through a network transformer 18, and the slave network port 15 is connected to the PHY chip 17 corresponding to the slave network port 15 through a network transformer 18; referring to fig. 7, the network transformer 18 is, for example, an ethernet network transformer chip, such as an ethernet network transformer chip having a model number HST-48002.
In a specific embodiment, a single network transformer 18 connects two PHY chips 17, for example, the master network port 14 and the slave network port 15 are connected to two PHY chips 17 corresponding to the master network port 14 and the slave network port 15 through the same network transformer 18, and each two on-load network ports 16 are connected to two PHY chips 17 corresponding to the two on-load network ports 16 through the same network transformer 18.
In a particular embodiment, the network interface splitter 10 further includes, for example, a memory 13, the memory 13 electrically connecting, for example, the programmable logic device 11 and the microcontroller 12; referring to fig. 8, the memory 13 is, for example, a flash memory, i.e., a flash memory (flash memory), such as a flash memory chip of model W25Q16 DVSSIG.
In one embodiment, the network interface splitter 10 further includes, for example, a plurality of crystal oscillators 19, and the crystal oscillators 19 are electrically connected to the plurality of PHY chips 17; for example, a crystal oscillator 19 electrically connects one PHY chip 17 or a plurality of such as two PHY chips 17; the provision of the plurality of crystal oscillators 19 is advantageous in reducing the wiring complexity of the circuit board. The frequency of the crystal oscillator 19 is, for example, 25MHz, and the circuit configuration of the crystal oscillator 19 is, for example, as shown in fig. 9.
The using process of the network port splitter 10 provided in this embodiment is, for example: taking the example that the network port deconcentrator 10 comprises a main network port 14, a slave network port 15 and eight loaded network ports 16, one output network port of the sending card is connected with the main network port 14 of the network port deconcentrator 10 through a network cable, the network port deconcentrator 10 receives image data sent by the sending card through the output network port through the main network port 11, and the network port deconcentrators 10 respectively send the image data through the eight loaded network ports 16, so that one output network port of the sending card is expanded into the eight output network ports.
The using process of the network port splitter 10 provided in this embodiment further includes, for example: on the basis of connecting a network port deconcentrator 10 to an output network port of the sending card, the network port deconcentrator 10 is further cascaded with a second network port deconcentrator, for example, also comprising a main network port 14, a slave network port 15 and eight loaded network ports 16, the main network port 14 of the second network port deconcentrator is connected with the slave network port 15 of the network port deconcentrator 10 through a network cable; the portal splitter 10 also transmits image data through a slave portal 15, and the master portal 14 of the second portal splitter receives the image data transmitted through the slave portal 15 by the portal splitter 10, and the second portal splitter transmits the image data through eight loaded portals, respectively. In the method, one output network port of a sending card is expanded into sixteen output network ports through two network port deconcentrators.
In the using process, a plurality of network port deconcentrators 10 can be cascaded on one output network port of the sending card according to the requirement, so that one output network port of the sending card is expanded into a proper number of output network ports, and the requirement of the sending card on the number of the expanded output network ports is met.
[ second embodiment ]
Referring to fig. 10, a LED display system according to a second embodiment of the present invention is shown; the LED display system 100 includes, for example, a first network interface splitter 10, a plurality of first receiving card sets 40, and a plurality of first LED display box sets 50.
Specifically, the first network port splitter 10 is, for example, the network port splitter described in the first embodiment, one on-board network port 16 of the first network port splitter 10 is connected to one first receiving card group 40 through, for example, a network cable, and one first receiving card group 40 is electrically connected to, for example, one LED display box group 50.
Specifically, the first receiving card group 40 has, for example, one receiving card or a plurality of cascaded receiving cards 41, for example, the plurality of receiving cards 41 are cascaded into the first receiving card group 40 through a network cable, the first LED display box group 50 has, for example, one or more LED display box bodies 51, and one receiving card 41 in the first receiving card group 40 is connected to, for example, one LED display box body 51 of the first LED display box group 50.
In a specific embodiment, the first network port splitter 10 has eight loaded network ports 16, each loaded network port 16 is connected to one first receiving card group 40, and each first receiving card group 40 is connected to one first LED display box group 50, thereby realizing that the first network port splitter 10 is connected to eight mutually independent first LED display box groups 50 through eight loaded network ports 16 in an expanded manner.
Referring to fig. 11, in one particular embodiment, the LED display system 100 further includes, for example, a second network interface splitter 30, a plurality of second receiving card sets 60, and a plurality of second LED display box sets 70.
Specifically, the second port splitter 30 is, for example, the port splitter described in the first embodiment, and the master port 34 of the second port splitter 30 is connected to the slave port 15 of the first port splitter 10 by, for example, a network cable. The second receiving card group 60 includes, for example, one receiving card or a plurality of cascaded receiving cards, for example, the plurality of receiving cards are cascaded into the second receiving card group 60 through a network cable, and one loaded network port 36 of the second network port splitter 30 is connected to one second receiving card group 60 through a network cable; the second LED display box group 70 includes, for example, one LED display box or a plurality of LED display boxes, wherein one second LED display box group 70 is connected to one second receiving card group 60, and one LED display box of the second LED display box group 70 is connected to one receiving card of the second receiving card group 60.
In one embodiment, the first port splitter 10 has the same or different number of on-load ports 16 as, for example, the second port splitter 30 has on-load ports 36. For example, the first port splitter 10 has eight on-load ports 16, and the second port splitter 30 has four on-load ports 36; alternatively, the first port splitter 10 has eight loaded ports 16, and the second port splitter 30 has eight loaded ports 36.
In a specific embodiment, part of the loaded network ports 36 of the second network port splitter 30 are respectively connected with a second receiving card set 60, and one second receiving card set 60 is connected with a second LED display box set 70; the first network port splitter 10 has, for example, eight network ports 16 with loads, and each network port 16 with loads is connected to one first receiving card group 40 through a network cable, and the second network port splitter 30 has, for example, eight network ports 36 with loads, wherein four network ports 36 with loads are respectively connected to one second receiving card group 60, and each second receiving card group 60 is connected to one second LED display box group 70.
The number of loaded net openings can be further increased on the basis of the first net opening deconcentrator 10 by adding the second net opening deconcentrator 30, so that the number of connectable independent LED display box groups is further increased; for example, a plurality of second portal splitters 30 may be cascaded to the slave portal of the first portal splitter 10 as needed.
In one embodiment, the slave port 35 of a second port splitter 30 is connected to the master port 34 of another second port splitter 30 by a network cable, thus enabling two second port splitters 30 to be cascaded under the first port splitter 10, for example in this way more second port splitters 30 can be cascaded under the first port splitter 10.
Referring to fig. 12, in one embodiment, the LED display system 100 further comprises a transmitting card 20, the transmitting card 20 having, for example, a first output port 22, the first output port 22 being connected to the main port 14 of the first port splitter 10, for example, by a network cable.
In one embodiment, the transmitting card 20 has a plurality of first output ports 22, for example, and each first output port 22 is connected to the main port 14 of a corresponding one of the first port splitters 10 through a network cable, for example.
Referring to fig. 13, in one embodiment, the receiving card 20 further has, for example, a second output network port 24, the second output network port 24 is connected to a third receiving card set 80, for example, through a network cable, and the third receiving card set 80 is electrically connected to a third LED display box set 90; the third receiving card set 80 has, for example, one receiving card or a plurality of cascaded receiving cards, the third LED display box set 90 has, for example, one or a plurality of LED display boxes, and one receiving card of the third receiving card set 80 is electrically connected to one LED display box of the third LED display box set 90.
In one embodiment, the receiving card 20 has, for example, a plurality of second output ports 24.
In one embodiment, the sending card 20 has, for example, two first output network ports 22 and two second output network ports 24, each first output network port 22 is connected to the main network port 14 of one first network port splitter 10 through a network cable, each second output network port 24 is connected to one third receiving card group 80 through a network cable, and each receiving card group 80 is electrically connected to one third LED display box group 90.
Referring to fig. 14, the transmitting card 20 further includes, for example, a second programmable logic device 21, a PHY chip 23, a video decoder 26, a video interface 25, and a second microcontroller 27.
Specifically, the second programmable logic device 21 is electrically connected to the first output network port 22 through, for example, the PHY chip 23; the second programmable logic unit 21 is electrically connected to the second output network port 24, for example, through the PHY chip 23; the second programmable logic device 21 is for example also electrically connected to a second microcontroller 27; the second programmable logic device 21 is for example also electrically connected to a video decoder 26, the video decoder 26 for example being electrically connected to the video interface 25, i.e. the video decoder 26 is electrically connected between the video interface 25 and the second programmable logic device 21. The video Interface 25 may be various digital video interfaces such as HDMI (High definition multimedia Interface), DVI, etc., or various analog video interfaces such as VGA, etc.
In a specific embodiment, the second programmable logic device 21 is, for example, an FPGA chip, the first output port 22 and the second output port 24 are, for example, RJ45 ports, the PHY chip 23 is, for example, an ethernet PHY chip, and the second microcontroller 27 is, for example, an MCU chip, which will not be described in detail herein.
In the several embodiments provided in the present invention, it should be understood that the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may also be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (10)
1. A portal splitter, comprising:
a programmable logic device;
the main network port is electrically connected with the programmable logic device;
the slave net port is electrically connected with the programmable logic device;
the plurality of load network ports are electrically connected with the programmable logic device; and
and the microcontroller is electrically connected with the programmable logic device.
2. The port splitter of claim 1, further comprising:
and the memory is electrically connected with the programmable logic device and the microcontroller.
3. The port splitter of claim 1, further comprising:
and the plurality of PHY chips are electrically connected among the main network port, the slave network port, the plurality of loaded network ports and the programmable logic device, and the main network port, the slave network port, the plurality of loaded network ports and the plurality of PHY chips are arranged in a one-to-one correspondence manner.
4. The port splitter of claim 3, further comprising:
and the plurality of network transformers are electrically connected among the main network port, the slave network port, the plurality of on-load network ports and the plurality of PHY chips, the main network port and the slave network port share one network transformer, and every two on-load network ports share one network transformer.
5. The portal splitter of claim 3 or 4, further comprising:
and the crystal oscillators are electrically connected with the PHY chips.
6. An LED display system, comprising:
a first port splitter according to any one of claims 1 to 5;
a plurality of first receiving card sets, wherein each first receiving card set comprises one receiving card or a plurality of cascaded receiving cards, and each first receiving card set is electrically connected to one loaded network port of the first network port splitter; and
and the plurality of first LED display box body groups are respectively and electrically connected with the plurality of first receiving card groups, wherein each first LED display box body group comprises one or more LED display box bodies.
7. The LED display system of claim 6, further comprising:
a second network port splitter according to any one of claims 1 to 5, wherein the master network port of the second network port splitter is electrically connected to the slave network port of the first network port splitter;
a plurality of second receiving card sets, wherein each second receiving card set comprises one receiving card or a plurality of cascaded receiving cards, and each second receiving card set is electrically connected to one loaded network port of the second network port splitter; and
and the second LED display box body groups are respectively and electrically connected with the second receiving card groups, wherein each second LED display box body group comprises one or more LED display box bodies.
8. The LED display system of claim 6, further comprising:
and the sending card is provided with a first output network port, wherein the first output network port is electrically connected with the main network port of the first network port deconcentrator.
9. The LED display system of claim 8, further comprising:
a third receiving card group, which comprises a receiving card or a plurality of cascaded receiving cards, and is electrically connected to the second output network port of the sending card; and
and the third LED display box body group is electrically connected with the third receiving card group, wherein the third LED display box body group comprises one or more LED display box bodies.
10. The LED display system of claim 8, wherein the transmitter card further comprises:
a video interface;
the first output network port is electrically connected with the second programmable logic device through the PHY chip;
a video decoder electrically connected between the video interface and the second programmable logic device; and
and the second microcontroller is electrically connected with the second programmable logic device.
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| CN201921221339.9U CN209964073U (en) | 2019-07-30 | 2019-07-30 | Network port deconcentrator and LED display system |
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| CN114999373A (en) * | 2022-05-31 | 2022-09-02 | 西安诺瓦星云科技股份有限公司 | Method, device, electronic equipment and medium for determining configuration scheme of display screen |
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| CN114999373A (en) * | 2022-05-31 | 2022-09-02 | 西安诺瓦星云科技股份有限公司 | Method, device, electronic equipment and medium for determining configuration scheme of display screen |
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