CN209860887U - A/D sampling circuit of resistance-type sensor powered by alternating current - Google Patents
A/D sampling circuit of resistance-type sensor powered by alternating current Download PDFInfo
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Abstract
The utility model relates to a resistance-type sensor's of alternating current power supply AD sampling circuit, include: the circuit comprises an input port, a diode, a first resistor, a capacitor, a second resistor, an exclusive-OR gate, a first analog switch, a second analog switch, a divider resistor, a resistance sensor and a test point; one port of the divider resistor is connected with a first output port of the first analog switch; one port of the resistance-type sensor is connected with the divider resistor, and the other port of the resistance-type sensor is connected with the second output port of the second analog switch. The divider resistor and the resistance-type sensor are connected in series between the first output port and the second output port, and when the input port is in a working state, the conduction state of the second analog switch is different from that of the first analog switch, so that an alternating current power supply can be provided for the resistance-type sensor, the degradation of the performance of the resistance-type sensor caused by a direct current component is avoided, the service life and the stability of the resistance-type sensor are ensured, and the measurement precision is high.
Description
Technical Field
The utility model relates to an electronic circuit technical field specifically indicates a resistance-type sensor's of alternating current power supply AD sampling circuit.
Background
The resistance-type relative humidity sensor which works by utilizing the principle that the resistance values of sensitive materials such as high-molecular polymers, lithium chloride electrolyte and the like change along with the measured value cannot be powered by direct current or alternating current containing direct current components, otherwise, the performance of the sensor is deteriorated and even fails.
The resistance-type relative humidity sensor is manufactured according to the principle that moisture-sensitive materials such as metal oxide ceramics, high molecular polymers or lithium chloride electrolyte absorb moisture to change the conductive property. Due to the limitation that power can only be supplied by alternating current (usually, the power frequency f is 1kHz), how to realize a/D digital conversion with high precision is always a challenge.
The current mainstream circuit conversion technology is as follows:
1, using an alternating current bridge scheme, taking a resistance type relative humidity sensor as an arm access circuit of the alternating current bridge, and sending the arm access circuit to A/D digital conversion processing after amplification, rectification and filtering of an amplifier; the disadvantage of this approach is that it is not suitable for automated sampling tests;
2, connecting the resistance-type relative humidity sensor serving as a variable resistor into the R-C oscillator, and acquiring the relative humidity parameter of the environment by detecting the oscillation period of the output signal of the R-C oscillator by the controller; the disadvantage of this solution is that the frequency of the test power supply loaded onto the sensor is continuously variable and the output frequency as a result of the test is susceptible to parameters such as the oscillating capacitor, the oscillating circuit flip threshold, etc.
An improved circuit conversion technique is therefore desirable.
SUMMERY OF THE UTILITY MODEL
The utility model provides a technical problem for the AD sampling circuit who provides a resistance-type sensor of alternating current power supply can satisfy and accomplish the sampling to this sensor resistance value by the resistance-type relative humidity sensor under the condition of alternating current rectangular wave voltage power supply to obtain the test result of high accuracy.
In order to solve the above problem, the utility model provides a resistance sensor's of alternating current power supply AD sampling circuit, include: the circuit comprises an input port, a diode, a first resistor, a capacitor, a second resistor, an exclusive-OR gate, a first analog switch, a second analog switch, a divider resistor, a resistance sensor and a test point; the anode port of the diode is connected with the input port; a first port of the first resistor is connected with a negative electrode port of the diode; one port of the capacitor is connected with the second port of the first resistor, and the other port of the capacitor is grounded; one port of the second resistor is connected with the second port of the first resistor, and the other port of the second resistor is grounded; a first input port of the exclusive-or gate is connected with a second port of the first resistor, and a second input port of the exclusive-or gate is connected with the input port; the first analog switch is provided with a first input port, a first output port, a first power supply port and a first grounding port, and the first input port is connected with the output port of the exclusive-or gate; the second analog switch is provided with a second input port, a second output port, a second power supply port and a second grounding port, the second input port is connected with the input port, and when the level of the second input port is opposite to that of the first input port, the conduction states of the second analog switch and the first analog switch are different; the voltage dividing resistor is provided with a first voltage dividing port and a second voltage dividing port, and the first voltage dividing port is connected with the first output port; the resistance sensor is provided with a third voltage division port and a fourth voltage division port, the third voltage division port is connected with the second voltage division port, and the fourth voltage division port is connected with the second output port; the test point is connected with the third voltage division port.
Compared with the prior art, the utility model provides a technical scheme has following advantage:
the utility model provides an innovative AD sampling circuit with resistance-type sensor of alternating current power supply, through design input port, the diode, first resistance, electric capacity, the second resistance, the exclusive-OR gate, first analog switch, the second analog switch, divider resistance, special connection relation between resistance-type sensor and the test point, make the AD sampling circuit of design can provide alternating current power supply for resistance-type sensor, avoid the direct current component to cause the degradation to resistance-type sensor's performance, and the precision of the resistance-type sensor's that acquires resistance-type sensor is sampled to sampling circuit is high. And, the operating condition of input port can be known to the circuit module who comprises diode, first resistance, electric capacity, second resistance and electric capacity for when input port is in the dormant state, resistance-type sensor is in the outage state, that is to say, the utility model provides a sampling circuit design has the function of self-closing resistance-type sensor's alternating current drive power supply, is favorable to prolonging resistance-type sensor's working life.
In addition, the sampling circuit further comprises an operational amplifier. The operational amplifier forms a voltage follower circuit, so that the shunting action of the input impedance of the A/D conversion circuit connected in series on the test point is reduced to the minimum, the interference of the input impedance of the A/D conversion circuit on the test point is avoided, and the test sampling precision is improved.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a circuit diagram of an a/D sampling circuit of a resistive sensor powered by ac according to an embodiment of the present invention;
FIG. 2 is a voltage waveform diagram of each main port of the A/D sampling circuit of FIG. 1 during operation;
fig. 3 is an equivalent circuit diagram of the sampling resistor network in fig. 1 when the input port CK is in an operating state and the input port CK is at a low level;
fig. 4 is an equivalent circuit diagram of the sampling resistor network in fig. 1 when the input port CK is in an operating state and the input port CK is at a high level;
fig. 5 is a circuit diagram of an a/D sampling circuit of a resistive sensor powered by ac according to another embodiment of the present invention.
Detailed Description
It can be known from the background art that a brand-new a/D sampling circuit capable of providing an alternating current power supply for a resistance-type relative humidity sensor needs to be provided, and meanwhile, the requirements of high measurement precision, good stability and long service life are met.
In order to solve the above problem, an embodiment of the utility model provides an AD sampling circuit of resistance-type sensor with alternating current power supply not only can provide alternating current power supply for resistance-type sensor, avoids the resistance-type sensor performance degradation that direct current component caused, therefore AD sampling circuit stability is good, and can guarantee the sampling measurement accuracy.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that in the embodiments of the present invention, numerous technical details are set forth in order to provide a better understanding of the present application. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
Fig. 1 is a circuit diagram of an a/D sampling circuit of a resistance sensor powered by ac according to an embodiment of the present invention.
Referring to fig. 1, the a/D sampling circuit of the resistive sensor powered by ac power provided in this embodiment includes: the circuit comprises an input port CK, a diode CR1, a first resistor R1, a capacitor C1, a second resistor R2, an exclusive-OR gate U1, a first analog switch SW1, a second analog switch SW2, a voltage dividing resistor Rdiv, a resistance sensor Rsnr and a test point A; the anode port of the diode CR1 is connected to the input port CK; the first port d1 of the first resistor R1 is connected with the cathode port of the diode CR 1; one port of the capacitor C1 is connected to the second port d2 of the first resistor R1, and the other port is connected to GND; one port of the second resistor R2 is connected with the second port d2 of the first resistor R1, and the other port is grounded; the first input port 1 of the exclusive-or gate U1 is connected to the second port d2 of the first resistor R1, and the second input port 2 of the exclusive-or gate U2 is connected to the input port CK; the first analog switch SW1 has a first input port 16, a first output port 14, a first power port 11 and a first ground port 13, the first input port 16 is connected to the output terminal 4 of the exclusive or gate U1; the second analog switch SW2 has a second input port 26, a second output port 24, a second power port 21 and a second ground port 23, and when the second input port 26 is connected to the input port CK and the level of the second input port 26 is opposite to that of the first input port 16, the conducting states of the second analog switch SW2 and the first analog switch SW1 are different; the voltage dividing resistor Rdiv has a first voltage dividing port 7 and a second voltage dividing port 8, and the first voltage dividing port 7 is connected with the first output port 14; the resistive sensor Rsnr has a third voltage dividing port 9 and a fourth voltage dividing port 10, the third voltage dividing port 9 is connected with the second voltage dividing port 8, and the fourth voltage dividing port 10 is connected with the second output port 24; the test point a is connected to the third partial pressure port 9.
The a/D sampling circuit provided in the present embodiment will be described in detail below with reference to the drawings.
The diode CR1, the first resistor R1, the second resistor R2, and the capacitor C1 constitute a first module I, which is a state detection circuit of the input port CK. Specifically, the function of the first module I is to detect the operating state of the input port CK, so that the resistive sensor Rsnr is in a power-off state or in an ac power supply state.
Referring to fig. 2, fig. 2 is a voltage waveform diagram of each main port of the a/D sampling circuit of fig. 1 during operation, where CK is a voltage waveform diagram of the input port CK, C1.1 is a voltage waveform diagram of two ends of the capacitor C1, SW1.4 is a voltage waveform diagram of the first output port 14 of the first analog switch SW1, and SW2.4 is a voltage waveform diagram of the second output port 24 of the second analog switch SW2.
The diode CR1, the first resistor R1, the second resistor R2, and the capacitor C1 form a charging/discharging structure. The first resistor R1 has a first resistance R1, the second resistor R2 has a second resistance R2, the capacitor C1 has a capacitance C1, and R1 < R2, the influence of the second resistor R2 can be ignored during charging,constant of charge TONR1 × c 1; and since the diode CR1 has a unidirectional conduction characteristic, the discharge constant TOFFR2 xc 1, and TON＜＜TOFF。
When the input port CK is in the sleep state (sleeping), the level of the input port CK is low, and the capacitor C1 is continuously discharged through the second resistor R2, so that the voltage value V of the first input port 1 of the xor gate U1 isU1.1The value is approximately equal to 0V; the output port 4 of the xor gate U1 has the same level phase as the input port CK, and is low.
When the input port CK is in a working state (working), the input port CK is a rectangular wave voltage, the duty ratio is 50%, and taking the frequency f as 1kHz as an example, the following analysis will be performed according to two situations that the input port CK is at a high level and a low level:
when the input port CK is high, the capacitor C1 is charged through the first resistor R1, passes through TONThe terminal voltage V is charged to the capacitor C1 after the time length of r1 × C1C1>0.7VCC，VCCThe first input port 1 of the xor gate U1 is made high for the operating supply voltage value, and the output port 4 of the xor gate U1 has a low level. Therefore, the output port 4 of the exclusive or gate U1 is in opposite phase to the input port CK level.
When the input port CK is at a low level, the diode CR1 is in a reverse cut-off state, the first resistor R1 does not form a discharge loop to the capacitor C1, the capacitor C1 discharges only through the second resistor R2, and due to TOFFR2 xc 1 is large enough that V is still established after half an input period (500 μ S) of the input port CK after dischargeC1>0.7VCC(ii) a Thus, during the duration of the rectangular wave of the input port CK, VC1The first input port 1 of the xor gate U1 can be maintained to have a high level continuously, and therefore, the output port 4 of the xor gate U1 is in a phase opposite to the input port CK level.
When the input port CK returns to the sleep state again, the voltage of the input port CK is at a low level and passes through n TOFFR2 × c1 makes V after continuous dischargeC1<0.3VCCAt this time, the first input port 1 of the xor gate U1 has a low level.
For example, when r1 ═ 10k Ω, r2 ═ 1M Ω, and c1 ═ 10nF, according to the test, TON≈0.12mS， TOFF≈4mS。
As can be seen from the above analysis, when the input port CK is in the sleep state (sleeping), the input port CK is at a low level, the first input terminal 1 of the xor gate U1 is at a low level, and therefore the second input port 2 of the xor gate U1 and the output port 4 are at the same level phase. When the input port CK is in a working state (working), whether the input port CK is at a high level or a low level, the first input port 1 of the xor gate U1 can be maintained at the high level through a circuit formed by the diode CR1, the first resistor R1, the second resistor R2 and the capacitor C1, so that the output port 4 of the xor gate U1 is opposite in phase to the level of the second input port 2 of the xor gate U1.
When the input port CK is in the sleep state, the voltage value of the first output port 14 is the same as the voltage value of the second output port 24. Specifically, when the input port CK is in the sleep state, that is, the input port CK is at a low level, the first input port 1 of the xor gate U1 is at a low level, so that the output port 4 of the xor gate U1 and the second input port 2 are at the same level, and the first analog switch SW1 and the second analog switch SW2 are at the same conduction state, that is, the first output port 14 of the first analog switch SW1 is conducted with the first ground port 13, the second output port 24 of the second analog switch SW2 is conducted with the second ground port 23, and when the first ground port 13 and the second ground port 23 are both directly connected to the ground GND, the first output port 14 is at a level V14And a second output port 24 level V24Equal and V14＝V24＝VGNDTherefore, the potential difference between the two ends of the resistor voltage-dividing network formed by the voltage-dividing resistor Rdiv and the resistive sensor Rsnr is equal to 0V, so that the effect of turning off the power supply of the resistive sensor is achieved.
When the input port CK is in the working state, the output port 4 of the xor gate U1 is in the opposite phase of the level of the second input port 2 of the xor gate U1, that is, the first input port 16 of the first analog switch SW1 is in the opposite phase of the level of the second input port 26 of the second analog switch SW2, so that the first analog switch SW1 and the second analog switch SW2 are in different conducting states. The following description is made with reference to fig. 2, in terms of two cases of the input port CK being high and low:
when the input port CK is in a working state and the input port CK is at a low level, the output port 4 of the xor gate U1 is at a high level, the first output port 14 of the first analog switch SW1 is connected to the first power port 11, and when the first power port 11 is directly connected to the working power VCC, the level V of the first output port 14 is at a high level14＝+VCC(ii) a The second output port 24 of the second analog switch SW2 is conducted with the second ground port 23, and the level V of the second output port 2424＝VGND(ii) a Correspondingly, the potential difference between two ends of the resistance voltage division network formed by the voltage division resistor Rdiv and the resistance sensor Rsnr is equal to + VCC。
When the input port CK is at the high level and the input port CK is at the working state, the output port 4 of the xor gate U1 is at the low level, the first output port 14 of the first analog switch SW1 is connected to the first ground port 13, and the level V of the first output port 14 is therefore set to be the low level14＝VGND(ii) a When the second output port 24 of the second analog switch SW2 is conducted to the second power port 21 and the second power port 21 is directly connected to the working power VCC, the level V of the second output port 24 is low24＝+VCC(ii) a Correspondingly, the potential difference between the two ends of the resistance voltage division network formed by the voltage division resistor Rdiv and the resistance type sensor Rsnr is equal to-VCC。
Therefore, when the input port CK is in a working state, the potential difference between the two ends of the resistance voltage-dividing network changes between + VCC and-VCC, so that the effect of providing an alternating current power supply for the resistive sensor Rsnr is achieved, the frequency of the alternating current power supply for the resistive sensor Rsnr is consistent with the frequency of the control signal of the input port CK, and the phase difference between the frequency of the alternating current power supply for the resistive sensor Rsnr and the phase of the control signal of the input port CK is 180 °.
The first analog switch SW1 and the second analog switch SW2 form a second module II for generating an ac power supply of the resistive sensor Rsnr.
Specifically, as can be seen from the foregoing analysis, by the combination of the first analog switch SW1 and the second analog switch SW2 having different on states, two states of the ac power supply that turns off the resistive sensor Rsnr and the ac power supply that turns on the resistive sensor Rsnr can be formed; in addition, the frequency of the alternating current power supply of the resistance sensor Rsnr is the same as the frequency of the control signal of the input port CK, and the phase difference is 180 °.
In the present embodiment, the first analog switch SW1 and the second analog switch SW2 have the same electrical parameters of the analog switch devices, and specifically, the same type of analog switch devices may be used as the first analog switch SW1 and the second analog switch SW2. As shown in fig. 1, the analog switch device has a pass terminal S, an operating power supply terminal VCC, a ground terminal GND, a first selection terminal B1, a second selection terminal B2, and an output terminal a. The first analog switch SW1 has a first input port 16 connected to the gate terminal S, a first power port 11 connected to the second selection terminal B2, and a first ground port 13 connected to the first selection terminal B1; the second analog switch SW2 has a second input port 26 connected to the gate terminal S, a second power port 21 connected to the second selection terminal B2, and a second ground port 23 connected to the first selection terminal B1.
The first table is a truth table of the analog switching device, the output terminal a is conducted with the first selection terminal B1 when the strobe terminal S is at low level, and the output terminal a is conducted with the second selection terminal B2 when the strobe terminal S is at high level.
Watch 1
| Gating terminal S | Simulating switch device on state |
| Low level of electricity | Output terminal A-first selection terminal B1 conducting |
| High level | Output terminal A-second selection terminal B2 conducting |
The divider resistor Rdiv and the resistive sensor Rsnr form a third module III, and the third module III is a sampling resistor network. The divider resistor Rdiv can adopt a precision resistor with high precision and low temperature coefficient, and is favorable for always keeping good precision and stability under the whole working environment condition.
In this embodiment, the resistive sensor refers to a resistive relative humidity sensor. The variation range of the output resistance value of the high molecular polymer resistance type relative humidity sensor in the working parameter range is very large, for example, the variation range of the resistance value of the humidity sensor can reach 0.75-6000000 kOmega under the conditions that the temperature variation range is 5-45 ℃ and the relative humidity variation range is 10% -95%.
The A/D sampling circuit further comprises: a controller (not shown) connected to the input port CK through a control output line to supply a control signal to the input port CK; the controller has an a/D converter circuit (not shown) connected to the test point a via an analog input line, and collects the voltage of the test point a and converts the voltage into a sample value, which is a binary value readable by a user.
In the range of the operating parameters of the resistance type relative humidity sensor Rsnr related in this embodiment, an 18-bit binary or more a/D conversion circuit can ensure sufficient accuracy and resolution of the measurement result. It should be noted that, by integrating the component cost, the accuracy of the actual measurement result and the resolution requirement, the binary digit number of the a/D conversion circuit can be set reasonably.
The control output line of the controller mainly has the following three functions: first, the switch used as the driving voltage of the resistive sensor Rsnr is a switch for providing an ac power supply to two ends of the resistive sensor Rsnr, and when the input port CK is in a sleep state, the switch provides a low-level control signal, so that the end voltages at the two ends of the resistive sensor Rsnr are zero, thereby prolonging the service life of the resistive sensor Rsnr. Secondly, the resistance sensor Rsnr is used as a frequency control source of the driving voltage of the resistance sensor Rsnr. Thirdly, the sampling timing for synchronizing A/D, namely, the terminal voltage of the sensor resistor and the divider resistor is sampled in a time-sharing manner, and the sampling time is determined; since the input frequency of the input port CK is generated internally by the controller, the a/D sampling timing can also be controlled accurately.
In this embodiment, the a/D sampling circuit further includes: the positive phase input end of the operational amplifier U2 and the negative phase input end of the operational amplifier U2 are connected with the test point A, the negative phase input end of the operational amplifier U2 is connected with the output port 5 of the operational amplifier U2, the output port 5 is connected with the actual sampling point B, and the voltage of the actual sampling point B is the same as that of the test point A.
The operational amplifier U2 is a fourth block IV of the a/D sampling circuit, and constitutes a voltage follower circuit. The voltage at output port 5 of operational amplifier U2 is the same as the voltage at test point a. The operational amplifier U2 should have a very low "input bias current" or "input offset voltage" characteristic, so as to block the shunt effect of the a/D conversion circuit at the later stage on the output signal of the sampling resistor network.
Specifically, the A/D conversion circuit in the controller has a certain input impedance, and the operational amplifier U2 is arranged between the test point A and the A/D conversion circuit, so that the shunting effect of the input impedance of the A/D conversion circuit on the sampling resistor network can be reduced to the minimum, the shunting influence of the controller on the test point A is reduced, even blocked, and the shunting interference on the test point A is reduced.
In this embodiment, the analog input line of the controller is directly connected to the actual sampling point B to electrically connect to the test point a.
In the a/D sampling circuit designed in this embodiment, the diode CR1, the first resistor R1, the second resistor R2, the capacitor C1, the xor gate U1, the first analog switch SW1, and the second analog switch SW2 are used to form an ac power supply for supplying power to the resistive sensor Rsnr, so that the requirement that the power supply of the resistive relative humidity sensor Rsnr needs to be ac is satisfied.
At the same time, whenWhen the input frequency f of the input port CK is 1kHz and the duty ratio is 50% rectangular wave, the supply voltage V of the resistance type relative humidity sensor Rsnr isSNR＝VRdiv+VRsnrHas a zero DC component and an amplitude VP-P＝2VccThe resistance-type sensor Rsnr is supplied with alternating-current rectangular wave voltage; the ac rectangular wave voltage is applied across the resistive sensor Rsnr through the voltage dividing resistor Rdiv.
Note that, although the on-resistance R of the first analog switch SW1 is setDSON1And the on-resistance R of the second analog switch SW2DSON2Can affect the positive and negative amplitudes of the supply voltage applied to the resistive sensor Rsnr, but because of RDSON1＜＜rsnrAnd R isDSON2＜＜rsnr，rsnrIs the terminal voltage value of the resistance sensor Rsnr, so the on-resistance RDSON1And an on-resistance RDSON2The influence of (a) on the positive and negative amplitudes of the supply voltage is negligible.
In addition, the a/D sampling circuit of the present embodiment has a function of automatically turning off the ac driving voltage of the resistive sensor Rsnr, that is, when the resistive sensor Rsnr does not operate, the ac voltage of the resistive sensor Rsnr can be set to 0V, so as to prolong the service life of the resistive sensor Rsnr. Specifically, when the resistive sensor Rsnr does not operate, the input port CK is set to a low level, and thus, the first analog switch SW1 and the second analog switch SW2 are in the same conduction state, and the terminal voltage of the sampling resistor network is 0V, that is, the driving voltage across the resistive sensor Rsnr is zero.
In addition, the main factors affecting the measurement accuracy and stability in the a/D sampling circuit of this embodiment are: first, long-term stability and consistency of the resistive sensor parameters; secondly, the precision and stability of the Rdiv parameter of the voltage dividing resistor; third, the input bias current, input offset voltage, stability and uniformity of the operational amplifier U2 parameters; fourth, the conversion accuracy, resolution and stability of the a/D conversion circuit parameters in the controller.
According to the design requirements of different measurement accuracies, the selection and the control of the above influence factors can be realized, the component cost can be taken into consideration, and the requirement of the measurement accuracy can be met. The method specifically comprises the following aspects: firstly, a resistance-type sensor with high stability and good consistency is adopted, such as a resistance-type relative humidity sensor made of high molecular polymer or lithium chloride; secondly, a divider resistor Rdiv with high precision and high stability is adopted, and a precision resistor is adopted as the divider resistor Rdiv; thirdly, an operational amplifier U2 with extremely low input bias current and low input offset voltage is adopted as a voltage follower circuit; fourthly, according to different requirements of component cost and design precision, a suitable A/D conversion circuit is adopted.
From the above analysis, it is found that the measurement accuracy can be further improved by adjusting the resistance sensor Rsnr, the voltage dividing resistor Rdiv, the operational amplifier U2, and the controller parameter.
When the input port CK is a rectangular wave voltage, an ac rectangular wave voltage is correspondingly supplied to the resistive sensor Rsnr; in order to ensure that no direct current component exists in the resistance sensor Rsnr, the positive and negative amplitudes of the alternating rectangular wave voltage are required to be kept consistent, and the duty ratio is required to be 50%. Usually, the accuracy of a timer of a CPU in the controller is enough to ensure that the duty ratio of the rectangular wave voltage is kept at 50%, and the condition that the alternating current power supply for supplying power to the resistance type sensor comprises a direct current component due to the fact that the duty ratio deviates from 50% is avoided.
Correspondingly, the utility model also provides a method of sampling to the above-mentioned resistance-type sensor who adopts the alternating current power supply's AD sampling circuit. The method adopted in the present embodiment will be described in detail below with reference to the accompanying drawings.
With combined reference to fig. 1, the sampling method comprises: first, a control signal is supplied to an input port CK; when the input port CK is in a working state and the input port CK is at a low level, the voltage of the test point A is the terminal voltage of the resistance-type sensor Rsnr, the terminal voltage of the resistance-type sensor Rsnr is collected and subjected to A/D conversion to obtain a first sampling value Dsnr; when the input port CK is in a working state and the input port CK is at a high level, the voltage of the test point A is the divider resistorAcquiring the terminal voltage of the voltage dividing resistor Rdiv, and performing A/D conversion to obtain a second sampling value Ddiv; based on a first sampling value Dsnr, a second sampling value Ddiv and a resistance value r of the voltage dividing resistor RdivdivObtaining the resistance value r of the resistance sensor Rsnrsnr。
The sampling method will be described in detail below.
From the analysis in the foregoing embodiment, it can be seen that the xor gate U1 and the input port CK are jointly configured as a switch for sampling the supply voltage of the resistor network, and VSNR＝Vsnr+Vdiv，VSNRFor sampling the voltage supplied to the resistor network, i.e. the voltage across the divider resistor Rdiv and the resistive sensor Rsnr, VsnrTerminal voltage, V, of resistive sensor RsnrdivIs the terminal voltage of the voltage dividing resistor Rdiv.
Wherein, when the first input port 1 of the xor gate U1 is at low level, i.e. the input port CK is in a sleep state, VSNR0V; when the first input port 1 of the exclusive-or gate U1 is at a high level, i.e., the input port CK is in an active state, the first analog switch SW1 and the second analog switch SW2 are in opposite switch states, and V isSNR＝±VCCSpecifically, V when the input port CK is highSNR＝-VCCV when input port CK is at low levelSNR＝+VCC。
As will be described in detail below.
When the first input port 1 of the xor gate U1 is at a low level, the output port 4 of the xor gate U1 is at the same level as the second input port 2, that is, the first input port 16 of the first analog switch SW1 and the second input port 26 of the second analog switch SW2 are at the same voltage, the first analog switch SW1 and the second analog switch SW2 are at the same conduction state, the first output port 14 and the first ground port 13 are conducted, and the second output port 24 and the second ground port 23 are conducted, or the first output port 14 and the first power port 11 are conducted, and the second output port 24 and the second power port 21 are conducted. Thus, VSNR＝V14-V24＝0V。
When the first input port 1 of the xor gate U1 is at a high level, the output port 4 of the xor gate U1 is at a phase opposite to that of the second input port 2, i.e., the first input port 16 is at a phase opposite to that of the second input port 26, so that the first analog switch SW1 and the second analog switch SW2 are at opposite switch states.
Referring to fig. 3, fig. 3 is an equivalent circuit diagram of the sampling resistor network in fig. 1 when the input port CK is in an operating state and the input port CK is at a low level.
When the input port CK is at a low level, the first input port 16 is at a high level, and the first output port 14 is conducted with the first power port 11, so that the first output port 14 is connected to the operating power VCC; meanwhile, the second input port 26 is low, the second output port 24 is conducted with the second ground port 23, and thus the second output port 24 is connected to the ground GND. To obtain VSNR＝V14-V24＝VCC-0＝+VCCAt this time, the voltage value V of the test point A is outputATerminal voltage V corresponding to resistance type sensor Rsnrsnr. And obtaining the reading value of the first sampling value Dsnr after the A/D conversion of the n-bit.
The first sampling value Dsnr, and the resistance r of the voltage dividing resistor RdivdivResistance value r of resistance sensor RsnrsnrAnd n satisfies the following relationship:
referring to fig. 4, fig. 4 is an equivalent circuit diagram of the sampling resistor network in fig. 1 when the input port CK is in an operating state and the input port CK is at a high level.
When the input port CK is at a high level, the first input port 16 is at a low level, and the first output port 14 is connected to the first ground port 13, so that the first output port 14 is connected to the ground GND; meanwhile, the second input port 26 is at a high level, and the second output port 24 is conducted with the second power port 21, so that the second output port 24 is connected to the operating power VCC. To obtain VSNR＝V14-V24＝0-VCC＝-VCCTesting the voltage value V of the output test point AATerminal voltage V corresponding to voltage dividing resistor Rdivdiv. And obtaining the reading value of the second sampling numerical value Ddiv after the A/D conversion of the n-bit.
The second sampling value Ddiv and the resistance r of the voltage dividing resistor RdivdivResistance value r of resistance sensor RsnrsnrAnd n satisfies the following relationship:
based on the above equations (1) and (2), the following relationship can be obtained:
based on equation (3), it can be known that the resistive sensor RsnrResistance value r ofsnrThe following relationship is satisfied:
therefore, the resistance r is obtained according to the first sampling value Dsnr, the second sampling value Ddiv and the known voltage dividing resistance RdivdivThe resistance r of the resistance sensor Rsnr can be obtainedsnrAnd the resistance unit of the resistance sensor Rsnr is the same as the resistance unit of the voltage dividing resistor Rdiv.
Taking a resistance-type sensor as an example of a resistance-type relative humidity sensor, under the condition of alternating current power supply, the terminal resistance of the resistance-type sensor Rsnr is measured, and then the relative humidity value is determined according to the environmental temperature parameter. It should be noted that, in order to ensure the accuracy, the measurement range of the resistive relative humidity sensor is usually limited to 10% to 95%.
In this embodiment, the sampling time is arranged before the high/low logic level switching point of the input port CK, so that the influence of the transition process of circuit state switching on the sampling precision can be reduced.
Referring to fig. 2 in combination, before the input port CK is switched from the low level to the high level, the terminal voltage of the resistive sensor Rsnr is sampled to read a first sampling value Dsnr, and a sampling time of the first sampling value Dsnr is shown by an arrow r in fig. 2; before the input port CK is switched from the high level to the low level, the voltage across the voltage dividing resistor Rdiv is sampled to read a second sampling value Ddiv, and the sampling time of the second sampling value Ddiv is shown by an arrow v in fig. 2.
In addition, in this embodiment, a two-phase sampling method is adopted for sampling. Specifically, the power supply voltage of the resistive sensor Rsnr is an alternating-current rectangular wave voltage during the period that the input port CK is in the working state; sampling the terminal voltage of the resistance-type sensor Rsnr during the phase period of 0-180 degrees of the power supply voltage of the resistance-type sensor Rsnr to obtain a first sampling value Dsnr, and obtaining the formula (1); during the 180-360 degree phase of the Rsnr power supply voltage of the resistance sensor, the terminal voltage of the divider resistor Rdiv is sampled, a second sampling value Ddiv is obtained, and the formula (2) is obtained.
Because adverse effects such as direct current creep and drift of the output of the resistance sensor Rsnr, the operational amplifier U2 and the A/D conversion circuit in a single power supply period (1mS) are generally in the same direction, the sampling error caused by unstable factors can be partially offset by adopting a two-phase sampling method, and the sampling accuracy is further improved.
The sampling method provided by the embodiment can provide an alternating current power supply for the resistive sensor Rsnr, the accuracy of the measured resistance value of the resistive sensor Rsnr is high, and the service life and the working stability of the resistive sensor Rsnr can be improved while the sampling accuracy is ensured.
The utility model discloses another embodiment still provides an AD sampling circuit of resistance-type sensor with alternating current power supply, and the AD sampling circuit that this embodiment provided is similar basically with the AD sampling circuit that the preceding embodiment provided, considers operational amplifier's output voltage swing limit, and this embodiment has set up third resistance, fourth resistance and fifth resistance between working power supply and ground. The following detailed description will be made with reference to the accompanying drawings, which are for the purpose of describing the same or corresponding parts as those of the previous embodiment, and will not be repeated herein.
Fig. 5 is a circuit diagram of an a/D sampling circuit of a resistive sensor powered by ac according to another embodiment of the present invention.
The A/D sampling circuit includes: further comprising: the circuit comprises an input port CK, a diode CR1, a first resistor R1, a capacitor C1, a second resistor R2, an exclusive-OR gate U1, a first analog switch SW1, a second analog switch SW2, a voltage dividing resistor Rdiv, a resistance type sensor Rsnr, a test point A, an operational amplifier U2, an actual sampling point B and a controller V. Further comprising: third resistance R5, fourth resistance R6 and fifth resistance R7 of establishing ties in proper order between working power supply VCC and ground end GND, third resistance R5 with fourth resistance R6 junction is first reference node b1, fourth resistance R6 with fifth resistance R7 junction is second reference node b2, first reference node b1 with first power port 11 and second power port 21 is connected, second reference node b2 with first ground port 13 and second ground port 23 is connected.
Accordingly, the first power port 11 voltage, the second power port 21 voltage and the first reference node b1 voltage are the same, and the first ground port 13 voltage, the second ground port 23 voltage and the second reference node b2 voltage are the same.
The voltage value of the first reference node b1, the voltage value of the second reference node b2, and the voltage value of the operating power VCC satisfy the following relationship: vb1＝X％VCC，Vb2+Vb1＝VCCWherein X is more than or equal to 97.5 and less than or equal to 99.5, Vb1Is the voltage value of the first reference node, Vb2Is the voltage value of the second reference node, VCCIs the voltage value of the working power supply VCC.
In this embodiment, taking X as 99 as an example, when the input port CK is in the working state and at the low level, the first output port 14 of the first analog switch SW1 is conducted with the first power port 11, and the voltage value V of the first output port 14 is14＝0.99VCCThe second output port 24 of the second analog switch SW2 is conducted with the second ground port 23, and the voltage value V of the second output port 2424＝0.01VCC(ii) a When inputting the portWhen CK is at the high level in the working state, the first output port 14 of the first analog switch SW1 is connected to the first ground port 13, and the voltage value V of the first output port 1414＝0.01VCCThe second output port 24 of the second analog switch SW2 is conducted with the second power port 21, and the voltage value V of the second output port 2424＝0.99VCC。
The third resistor R5, the fourth resistor R6 and the fifth resistor R7 function as: the operational amplifier U2 has a voltage output swing from rail of 25mV, which is limited by the device technology of the operational amplifier U2MAXThe limit of (2); the three resistors can generate two reference voltages Vb1And Vb2Taking X as 99 as an example, Vb1≈99％Vcc，Vb2Approximately equal to 1% Vcc, so that the resistance-type sensor Rsnr can be matched with the divider resistor R at any valuedivWhen matched, the voltage of the output port 5 of the operational amplifier U2 can be kept at 1 percent VCC～99％VCCIn a range to satisfy the operational amplifier U2 at VCC25mV for voltage output swing limit when power is supplied by 3.3V single power supplyMAXThe limit of (2).
In other embodiments, X may be other suitable values, and the two reference voltages Vb1And Vb2But may also be implemented by other circuit technology means.
In this embodiment, the resistive sensor is a resistive relative humidity sensor, which is HIS-06-S. The performance indexes are as follows:
working voltage: sine wave or square wave, f is 1kHz, Vp-P is less than or equal to 5.5V, and P is less than or equal to 1mW (max); working temperature: 0-50 ℃; relative humidity of operation: 10% -95% RH; stability: RH/DEG C less than or equal to 0.5%; relative humidity detection consistency: RH is less than or equal to +/-3 percent; response speed: less than 15S; water resistance: soaking for 10 minutes, and after airing and recovering, the change of the relative humidity is less than 2 percent; soaking in water for 30 min, and air drying to recover the humidity change less than 5%.
In this embodiment, the xor gate U1 is SN74AHC1G 86; the first analog switch SW1 and the second analog switch SW2 adopt analog switch devices with the model number SN74LVC1G3157, the main electrical parameters were as follows: a power supply (supply voltage) is 1.65-5.5V; working temperature (operating temperature) is-40-85 ℃; rail-to-rail signal processing (rail-to-rail signal handling); on-state switch resistance Ron9 omega (under the condition that the power supply is 3V); when the gating end S is at low level, the output port A is conducted with the first selection end B1; when the gate a is high, the output port a is connected to the second selection port B2.
The operational amplifier U2 is an operational amplifier with extremely low input bias current and input offset voltage, and can provide a 1:1 voltage follower circuit with input bias current of only 1pA and input offset voltage of 1mV for a sampling resistor network (i.e., a voltage dividing resistor Rdiv and a resistive sensor Rsnr), thereby ensuring that the shunt influence of a subsequent a/D conversion circuit on the sampling resistor network reaches a very low level.
In this embodiment, the model of the operational amplifier U2 is OPA348DCK, and the main electrical parameters are as follows: the power supply is 2.1-5.5V; the working temperature is-40 to 125 ℃; rail-to-rail: input and output (rail-to-rail: input and output); input bias current (Input bias current) IB± 0.5 pA; input offset voltage Vos1 mV; voltage output swing from rail limit of 25mVMAX。
It should be noted that the types of the first analog switch SW1, the second analog switch SW2, the operational amplifier U2, the resistive sensor Rsnr, and the xor gate U1 are only used for illustration, and in other embodiments, devices with other suitable electrical parameters may be used as the resistive sensor, the xor gate, the operational amplifier, the first analog switch, and the second analog switch.
In this embodiment, the a/D sampling circuit may further include a plurality of bypass capacitors (bypass capacitors), and the bypass capacitors may filter high-frequency noise in the input signal. The bypass capacitor includes: a first bypass capacitor C3, a second bypass capacitor C4, a third bypass capacitor C5, and a fourth bypass capacitor C6.
One end of the first bypass capacitor C3 is connected with a working power supply VCC of the XOR gate U1, and the other end is grounded GND; one end of the second bypass capacitor C4 is connected with a working power supply VCC of the operational amplifier U2, and the other end is grounded GND; one end of the third bypass capacitor C5 is connected with the working power VCC of the first analog switch SW1, and the other end is grounded GND; one end of the fourth bypass capacitor C6 is connected to the operating power VCC of the second analog switch SW2, and the other end is grounded GND.
In this embodiment, the a/D sampling circuit may further include: one end of the output resistor R8 is connected with the output port 5 of the operational amplifier U2, and the other end of the output resistor R8 is connected with the actual sampling point B; and one end of an output capacitor C2 and one end of an output capacitor C2 are connected with the actual sampling point B, and the other end of the output capacitor C2 is grounded GND.
The capacitance value of the bypass capacitor can be 1 muF, and the resistance value of the output resistor R8 can be 47 omega; the capacitance value of the output capacitor C2 may be 10 nF.
The a/D sampling circuit provided in this embodiment can not only provide an ac power supply for the resistive sensor Rsnr, and avoid adverse effects of a dc component on stability and working life of the resistive sensor Rsnr, but also ensure that the voltage at the output port 5 of the operational amplifier U2 is still at 1% V by connecting three resistors (a third resistor R5, a fourth resistor R6, and a fifth resistor R7) in series between the working power VCC and the ground GND, so that the resistive sensor Rsnr cooperates with the voltage dividing resistor Rdiv at any valueCC～99％VCCIn a range to satisfy the operational amplifier U2 at VCC25mV for voltage output swing limit when power is supplied by 3.3V single power supplyMAXThe limit of (2).
Correspondingly, the embodiment also provides a method for sampling the A/D sampling circuit. For a detailed description of the steps of obtaining the first sampled value Dsnr and the second sampled value Ddiv, reference is made to the corresponding description of the previous embodiment. The functional relationship of the first sampled value Dsnr, the second sampled value dsiv, the resistance Rdiv of the voltage-dividing resistor Rdiv, and the resistance Rsnr of the resistive sensor Rsnr will be described as follows:
reading a first sampling value Dsnr, at which a voltage value V of the test point AsnrCorresponding to the Rsnr terminal voltage of the resistive sensor, i.e. VsnrThe analog terminal voltage when the A/D conversion circuit is corresponding to the Rsnr sampling of the resistance sensor; reading a second sample value Ddiv, at which time the voltage value V of the test point AdivCorresponding to the voltage across the divider resistor Rdiv, i.e. VdivThe A/D conversion circuit is corresponding to the analog terminal voltage when the voltage dividing resistor Rdiv is sampled.
Ddiv、Dsnr、Vsnr、VdivVoltage value V of working power supply VCCCCAnd the binary digit number n of the A/D conversion circuit satisfies the following relationship:
Vsnr、rsnr、rdivand VCCThe following relationship is satisfied:
Vdiv、rsnr、rdivand VCCThe following relationship is satisfied:
from the above equations (7) (8), it can be known that:
from equation (9) it can be known that:
from the above equations (5), (6) and (10), the resistance value r of the resistive sensor Rsnr can be obtainedsnrThe following functional relation is satisfied:
from this, the resistance value r of the resistance sensor Rsnr can be obtainedsnrAnd the resistance unit of the resistance sensor Rsnr is the same as the resistance unit of the voltage dividing resistor Rdiv.
In addition, V isb1＝X％VCCResistance r of the resistance sensor RsnrsnrThe following relationship is satisfied:
the sampling circuit provided by the embodiment can avoid the limitation of the output voltage swing limit of the operational amplifier U2 on the A/D sampling circuit, thereby being beneficial to further improving the sampling accuracy.
The embodiment of the utility model provides a sampling circuit has following profitable technological effect:
firstly, the sampling circuit is connected with the controller by using only two connecting wires, namely, a control output wire is connected with an input port, and an analog input wire is connected with an actual sampling point.
Secondly, the input port has the following functions: when the input port inputs a low level, the sampling circuit is in a dormant state: the alternating-current rectangular wave voltage applied to two ends of the sampling resistor network can be cut off; when rectangular wave voltage with frequency of 1kHz and duty ratio of 50% is input into the input port, the sampling circuit is in a working state: alternating current rectangular wave voltage with the same frequency and without direct current components can be applied to two ends of the sampling resistor network; thirdly, when the sampling circuit is in a working state and the input port is at a low level, the voltage at two ends of the resistance sensor can be sampled; when the sampling circuit is in a working state and the input port is at a high level, the voltage at two ends of the voltage dividing resistor can be sampled; the sampling time is arranged before the high/low logic level switching point of the input port, so that the adverse effect of the transition process of the state switching of the sampling circuit on the sampling precision can be reduced; since the square wave voltage at the input port is generated by the controller, the sampling time is also precisely controllable.
Thirdly, by adopting a two-phase sampling method, errors caused by drift, creep and the like of analog parameters of the operational amplifier and the A/D conversion circuit along with time can be weakened and partially offset.
Finally, the design of the reference node voltage is introduced, so that dead zones of the operational amplifier and the A/D conversion circuit near the minimum value and the maximum value of the input voltage can be avoided, and the linear range is expanded.
It will be understood by those skilled in the art that the foregoing embodiments are specific examples of the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in its practical application. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (7)
1. An a/D sampling circuit for an ac powered resistive sensor, comprising: input port, diode, first resistance, electric capacity, second resistance, exclusive-or gate, first analog switch, second analog switch, divider resistance, resistance-type sensor and test point, its characterized in that:
the anode port of the diode is connected with the input port;
a first port of the first resistor is connected with a negative electrode port of the diode;
one port of the capacitor is connected with the second port of the first resistor, and the other port of the capacitor is grounded;
one port of the second resistor is connected with the second port of the first resistor, and the other port of the second resistor is grounded;
a first input port of the exclusive-or gate is connected with a second port of the first resistor, and a second input port of the exclusive-or gate is connected with the input port;
the first analog switch is provided with a first input port, a first output port, a first power supply port and a first grounding port, and the first input port is connected with the output port of the exclusive-or gate;
the second analog switch is provided with a second input port, a second output port, a second power supply port and a second grounding port, the second input port is connected with the input port, and when the level of the second input port is opposite to that of the first input port, the conduction states of the second analog switch and the first analog switch are different;
the voltage dividing resistor is provided with a first voltage dividing port and a second voltage dividing port, and the first voltage dividing port is connected with the first output port;
the resistance sensor is provided with a third voltage division port and a fourth voltage division port, the third voltage division port is connected with the second voltage division port, the fourth voltage division port is connected with the second output port, and the test point is connected with the third voltage division port.
2. The a/D sampling circuit of an ac powered resistive sensor of claim 1, further comprising: the controller is connected with the input port through a control output line; the controller is provided with an A/D conversion circuit, the A/D conversion circuit is connected with the test point through an analog input line, and the voltage of the test point is collected and converted into a sampling numerical value.
3. The a/D sampling circuit of an ac powered resistive sensor of claim 2, further comprising: and the positive phase input end of the operational amplifier is connected with the test point, and the negative phase input end of the operational amplifier is connected with the output end of the operational amplifier and is connected with the analog quantity input line.
4. An a/D sampling circuit for an ac powered resistive sensor according to claim 1 or 3, further comprising: the circuit comprises a third resistor, a fourth resistor and a fifth resistor which are sequentially connected in series between a working power supply and a ground end, wherein the joint of the third resistor and the fourth resistor is a first reference node, the joint of the fourth resistor and the fifth resistor is a second reference node, the first reference node is connected with a first power supply port and a second power supply port, and the second reference node is connected with a first ground port and a second ground port.
5. The ac powered resistive sensor a/D sampling circuit of claim 1, wherein the first analog switch and the second analog switch employ analog switching devices having the same electrical parameters.
6. The a/D sampling circuit of an ac powered resistive sensor of claim 1 or 5, wherein the first output port voltage value is the same as the second output port voltage value when the input port is in a sleep state; when the input port is in a working state and the input port is at a high level, the first output port is conducted with the first ground port, and the second output port is conducted with the second power supply port; when the input port is in a working state and the input port is at a low level, the first output port is conducted with the first power supply port, and the second output port is conducted with the second ground port.
7. The a/D sampling circuit of an ac powered resistive sensor of claim 1, wherein the resistive sensor is a resistive relative humidity sensor.
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| CN109873643A (en) * | 2019-03-27 | 2019-06-11 | 上海航嘉电子科技股份有限公司 | The A/D sample circuit and the method for sampling of the resistance sensor of AC power supply |
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| CN109873643A (en) * | 2019-03-27 | 2019-06-11 | 上海航嘉电子科技股份有限公司 | The A/D sample circuit and the method for sampling of the resistance sensor of AC power supply |
| CN109873643B (en) * | 2019-03-27 | 2024-03-22 | 上海航嘉电子科技股份有限公司 | A/D sampling circuit and sampling method for alternating current power supply resistance type sensor |
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