CN209841222U - CMOS temperature sensor circuit - Google Patents
CMOS temperature sensor circuit Download PDFInfo
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- CN209841222U CN209841222U CN201822202472.1U CN201822202472U CN209841222U CN 209841222 U CN209841222 U CN 209841222U CN 201822202472 U CN201822202472 U CN 201822202472U CN 209841222 U CN209841222 U CN 209841222U
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Abstract
The utility model relates to a CMOS temperature sensor circuit, this circuit possess first MOS pipe, second MOS pipe, third MOS pipe, operational amplifier, first switch, second switch, third switch, fourth switch, fifth switch, comparator and counter. One port of the comparator controls the on-off of the first switch, the third switch and the fifth switch, and the other port of the comparator controls the on-off of the second switch, the fourth switch and the sixth switch; when the first switch, the third switch and the fifth switch are conducted, the circuit works in a charging mode, and when the second switch, the fourth switch and the sixth switch are conducted, the circuit works in a discharging mode. When the circuit works in a charging mode, the current flowing through the second resistor is in direct proportion to the absolute temperature; when the circuit operates in the discharge mode, the current flowing through the first resistor is inversely proportional to the absolute temperature. The utility model discloses put the multiplexing that has realized two kinds of electric current generating circuit based on fortune.
Description
Technical Field
The invention relates to the field of temperature sensors, in particular to a design scheme of a CMOS temperature sensor circuit.
Background
Temperature sensors are indispensable in the fields of medical equipment, consumer electronics, industrial control, and the like. Compared with the traditional temperature sensor, the integrated CMOS temperature sensor has smaller volume, lower power consumption, easy integration and can be directly connected with a digital system, can be used for occasions and systems such as environmental temperature monitoring, perishable food monitoring, implantable medical equipment, SOC temperature monitoring and the like, and has wider application prospect. In such an application, it is required that the power consumption of the temperature sensor used in the circuit is as low as possible, the occupied area is as small as possible, and meanwhile, the robustness is required to be strong to meet the development requirement of the current temperature sensor.
The temperature measurement method of the CMOS temperature sensor is based on the base-emitter voltage V of the BJTBEThe temperature characteristic of the temperature sensor is used for generating a voltage or a current which is in direct Proportion To Absolute Temperature (PTAT) and a voltage or a current which is in inverse proportion to absolute temperature (CTAT), so that a voltage or a current which is not related to temperature is obtained as a reference, and the voltage or the current which is in direct proportion to absolute temperature is converted and then quantized to finally obtain temperature information.
According to the temperature measurement principle of the CMOS temperature sensor, in the existing temperature sensing design scheme, two circuits including an operational amplifier are generally used to generate a voltage or a current Proportional To Absolute Temperature (PTAT) and a voltage or a current inversely proportional to absolute temperature (CTAT), respectively, as shown in fig. 1, and such a circuit design manner occupies a large area, thereby increasing the production cost and not using multi-point integration.
Another temperature sensor design scheme is shown in fig. 2, and switches are used to perform switching operation on a circuit to generate a voltage or a current Proportional To Absolute Temperature (PTAT) and a voltage or a current inversely proportional to absolute temperature (CTAT), respectively, so as to implement time division multiplexing of the circuit.
Disclosure of Invention
The invention provides a CMOS temperature sensor circuit design scheme for realizing multiplexing of two current generation circuits based on operational amplifier, which can solve the problem of current error caused by switch voltage drop while reducing the occupied area of the circuit.
A CMOS temperature sensor circuit according to the present invention includes:
the source electrodes of the first MOS tube, the second MOS tube and the third MOS tube are connected to VDD in common, the grid electrode of the first MOS tube is connected with the grid electrode of the second MOS tube, and the grid electrode of the second MOS tube is connected with the grid electrode of the third MOS tube;
a first port of the operational amplifier is respectively connected with a first bipolar transistor and a first MOS (metal oxide semiconductor) tube, a second port of the operational amplifier is respectively connected with a first switch and a second switch, a third port of the operational amplifier is connected with grids of the first MOS tube and the second MOS tube, and the other end of the first bipolar transistor is connected with GND (ground potential);
the fourth switch is connected with the first resistor in series, the third switch and the second resistor are connected with the second bipolar transistor in series, and the two series branches are connected between the drain electrode of the second MOS and the GND in parallel;
the grid electrode of the fourth MOS tube is connected with the grid electrode of the fifth MOS tube, the drain electrode of the fourth MOS tube is connected to the drain electrode of the third MOS tube through a sixth switch, the drain electrode of the fifth MOS tube is connected to the second port of the comparator, the source electrodes of the fourth MOS tube and the fifth MOS tube are connected with GND, and the drain electrode of the fourth MOS tube is connected with the grid electrode;
a first port of the comparator inputs a reference voltage, a second port of the comparator is respectively connected with a load capacitor, a drain electrode of a fifth MOS tube and one end of a fifth switch, the other end of the fifth switch is connected with the drain electrode of a third MOS tube, the other end of the load capacitor is connected with GND, a third port of the comparator is connected with the first switch, the third switch and the fifth switch, and a fourth port of the comparator is connected with the second switch, the fourth switch and the sixth switch; the fourth port of the comparator is also connected to the input end of the counter, and the fifth port of the comparator inputs a clock signal; the on-off states of the first switch, the third switch and the fifth switch are the same, the on-off states of the second switch, the fourth switch and the sixth switch are the same, and the on-off states of the first switch, the third switch, the fifth switch, the second switch, the fourth switch and the sixth switch are opposite. The circuit is enabled to operate in either a charging mode or a discharging mode.
The on-off of the first switch, the third switch and the fifth switch is controlled by a third port of the comparator, and the on-off of the second switch, the fourth switch and the sixth switch is controlled by a fourth port signal line of the comparator; when the first switch, the third switch and the fifth switch are conducted, the circuit works in a charging mode, and when the second switch, the fourth switch and the sixth switch are conducted, the circuit works in a discharging mode. When the circuit works in a charging mode, the current flowing through the second resistor is in direct proportion to the absolute temperature; when the circuit operates in the discharge mode, the current flowing through the first resistor is inversely proportional to the absolute temperature.
In some embodiments, the first, second and third MOS transistors in the CMOS temperature sensor circuit are P-type MOS transistors, and the fourth and fifth MOS transistors are N-type MOS transistors.
In some embodiments, the input tube of the operational amplifier in the CMOS temperature sensor circuit is a P-type MOS tube. The arrangement can ensure that the operational amplifier can also work normally when the branch circuit containing the bipolar transistor has small voltage.
In some embodiments, signals of a third port and a fourth port of a comparator in the MOS temperature sensor circuit are opposite, so that the on-off states of the first switch, the third switch, the fifth switch, the second switch, the fourth switch, and the sixth switch are opposite. In a specific implementation, the signals to the third port and the fourth port may be directly opposite, or the two signals to the third port and the fourth port may be the same, but one signal is opposite to the other signal through an additional not gate or an inverter, etc.
Preferably, the switch in the circuit is a transmission gate.
The resistance values of the first resistor and the second resistor in the circuit are selected to ensure that reference current is independent of absolute temperature in principle, the reference current is constant, and the reference current is the sum of currents flowing through load resistors in a charging mode and a discharging mode of the circuit.
Compared with the prior art, the invention has the beneficial effects that: on one hand, the MOS temperature sensor circuit realizes the multiplexing of two current generation circuits based on operational amplifier, reduces the complexity of the circuit, reduces the power consumption, saves the chip area and saves the manufacturing cost; on the other hand, the operational amplifier in the MOS temperature sensor circuit is directly connected with the front-end detection resistor through the switch, so that the problem of voltage drop fluctuation caused by process deviation on the switch is solved, and the temperature detection is more accurate.
Drawings
Fig. 1 is prior art.
Fig. 2 is prior art.
Fig. 3 is a circuit diagram of the present invention.
Detailed Description
A CMOS temperature sensor circuit according to the present invention, as shown in fig. 3, includes: the source electrodes of the first MOS transistor M1, the second MOS transistor M2 and the third MOS transistor M3 are connected to VDD in common, the gate electrode of the first MOS transistor M1, the second MOS transistor M2 and the third MOS transistor M3 are connected to the gate electrode of the second MOS transistor M2, and the gate electrode of the second MOS transistor M2 is connected to the gate electrode of the third MOS transistor M3; the first port of the operational amplifier OTA is respectively connected with a first bipolar transistor BJT1 and a first MOS tube M1, the second port of the operational amplifier OTA is respectively connected with a first switch SW1 and a second switch SW2, the third port of the operational amplifier OTA is connected with the grids of the first MOS tube M1 and the second MOS tube M2, and the other end of the first bipolar transistor BJT1 is connected with GND; the fourth switch SW4 is connected in series with the first resistor R1, the third switch SW3 and the second resistor R2 are connected in series with the second bipolar transistor BJT2, and the two series branches (namely, one series branch is a branch formed by connecting the fourth switch SW4 and the first resistor R1 in series; the other series branch is a branch formed by connecting the third switch SW3, the second resistor R2 and the second bipolar transistor BJT2 in series) are connected in parallel between the drain of the second MOS transistor M2 and GND; the gate of the fourth MOS transistor M4 is connected to the gate of the fifth MOS transistor M5, the drain of the fourth MOS transistor M4 is connected to the drain of the third MOS transistor M3 through a sixth switch SW6, the drain of the fifth MOS transistor M5 is connected to the second port of the comparator CMP1, the sources of the fourth MOS transistor M4 and the fifth MOS transistor M5 are connected to GND, and the drain of the fourth MOS transistor M4 is connected to the gate; a reference voltage (Verf) is input to a first port of the comparator CMP1, a second port of the comparator CMP1 is respectively connected to the drain of the load capacitor C1, the drain of the fifth MOS transistor M5, and the fifth switch SW5, the other end of the fifth switch SW5 is connected to the drain of the third MOS transistor M3, and the other end of the load capacitor C1 is connected to GND, a third port signal line of the comparator CMP1 is connected to the first switch SW1, the third switch SW3, and the fifth switch SW5, a fourth port signal line of the comparator CMP1 is connected to the second switch SW2, the fourth switch SW4, and the sixth switch SW6, a fourth port of the comparator CMP1 is further connected to an input terminal of a counter (counter), and a fifth port of the comparator CMP1 is a clock input terminal.
In this embodiment, the first MOS transistor M1, the second MOS transistor M2, and the third MOS transistor M3 in the CMOS temperature sensor circuit are P-type MOS transistors, and the fourth MOS transistor M4 and the fifth MOS transistor M5 are N-type MOS transistors.
In this embodiment, an input transistor of an operational amplifier in the CMOS temperature sensor circuit is a P-type MOS transistor, so as to ensure that the operational amplifier can normally operate when a branch circuit containing a bipolar transistor has a small voltage.
In this embodiment, the value of the input reference voltage of the comparator needs to ensure that the fluctuation range of the voltage of the second port of the comparator is within the common mode input voltage range allowed by the comparator.
In this embodiment, signals of a third port signal line and a fourth port signal line of a comparator CMP1 in the MOS temperature sensor circuit are opposite, and are respectively used for controlling on/off of the first switch, the third switch, the fifth switch, the second switch, the fourth switch, and the sixth switch; when the first switch, the third switch and the fifth switch are conducted, the circuit works in a charging mode, and when the second switch, the fourth switch and the sixth switch are conducted, the circuit works in a discharging mode.
In the present embodiment, when the circuit operates in the charging mode, the current flowing through the second resistor R2 is proportional to the absolute temperature; when the circuit is operated in the discharge mode, the current flowing through the first resistor R1 is inversely proportional to the absolute temperature.
For bipolar junction transistors (BJT, also called triode), the base and emitter voltages are satisfied Where k is the Boltzmann constant, T is the thermodynamic temperature, q is the amount of electron charge, ICIs the collector region current of the bipolar transistor, ISIs a reverse saturation current. If the collector currents I of the two bipolar transistors areCIn contrast, let the collector current I of one of the bipolar transistorsC1I, collector current I of another bipolar transistorC2Can satisfy pITo obtain V between two bipolar transistorsBEThe difference between them.
When the sensor circuit operates in the charging mode, under the action of the operational amplifier, the voltage of the first bipolar transistor BJT1 connected to the operational amplifier is the same as the voltage of the second resistor R2 connected to the first switch SW1, and a current I flowing through the load resistor (the second resistor R2)PTAT＝ΔVBE/R2The current is proportional to the absolute temperature, the current is subjected to the mirror image action of the third MOS transistor M3, the circuit charges the load capacitor C1, the charging voltage of the second port of the comparator CMP1 is further influenced, the voltage of the second port of the comparator CMP1 is compared with the reference voltage Vref of the first port, when the charging voltage is greater than the reference voltage, the signals of the third port and the fourth port of the comparator CMP1 are inverted, the sensor circuit works in the discharging mode, a path is formed between the second port of the operational amplifier OTA and the first resistor R1, and similarly, the current I flowing through the load resistor (the first resistor R1) isCTAT＝VBE/R1The current is inversely proportional to the absolute temperature, the current is mirrored through the third MOS transistor M3, the circuit discharges the load capacitor C1, and further affects the charging voltage of the second port of the comparator CMP1, the comparator CMP1 compares the voltage of the second port with the reference voltage of the first port, when the charging voltage is less than the reference voltage Vref, the signals of the third port and the fourth port of the comparator CMP1 are inverted, and the sensor circuit operates in the charging mode, and thus the sensor circuit operates in a cycle mode.
In this embodiment, the first electrodeThe resistance values of the resistor R1 and the second resistor R2 are selected to ensure that the reference current is independent of the absolute temperature, and the reference current is a constant sum of the currents flowing through the load resistor in the charging mode and the discharging mode of the circuit, namely (I)PTAT+ICTAT) The value of (c) is constant.
In the working process of the sensor circuit, a counter in the circuit counts a high-level clock signal or a low-level clock signal output by the comparator CMP1, the ratio of high-level time or low-level time to the designated time can be obtained within the designated time, and the value is in direct proportion or inverse proportion to the absolute temperature, so that the accurate detection of the temperature is realized. In practical application, the longer the specified time is, the more accurate the test result is under the same other environments. Taking the example of counting the high level clock by the counter, the total charging time is t1Total discharge time t2The clock period of the comparator is tclkN is the total count clock number, M is the high level clock number of the output, thenWherein IPTAT+ICTATThe constant value is constant, so that the ratio of the high level time to the designated time can be obtained and the temperature can be converted.
According to the scheme, the bipolar transistor is used as a front-end circuit for temperature detection, the operational amplifier OTA is directly connected with a resistor (R1 or R2) for front-end detection through the first switch SW1 or the second switch SW2, circuit multiplexing is achieved through the structure, the input impedance of the operational amplifier OTA is approximate to infinity, the influence of voltage drop fluctuation caused by process deviation of a switch in the circuit on detection precision is eliminated, and the purposes of reducing the area of a chip, reducing power consumption and improving detection precision are achieved.
Finally, it should be noted that the above-mentioned list is only a specific embodiment of the present invention. It is obvious that the present invention is not limited to the above embodiments, but many variations are possible. All modifications which can be derived or suggested by a person skilled in the art from the disclosure of the present embodiments are to be considered within the scope of the present invention.
Claims (5)
1. A CMOS temperature sensor circuit, comprising:
the source electrodes of the first MOS tube, the second MOS tube and the third MOS tube are connected to VDD in common, the grid electrode of the first MOS tube is connected with the grid electrode of the second MOS tube, and the grid electrode of the second MOS tube is connected with the grid electrode of the third MOS tube;
a first port of the operational amplifier is respectively connected with a first bipolar transistor and a first MOS (metal oxide semiconductor) tube, a second port of the operational amplifier is respectively connected with a first switch and a second switch, a third port of the operational amplifier is connected with grids of the first MOS tube and the second MOS tube, and the other end of the first bipolar transistor is connected with GND (ground potential);
a fourth switch is connected with the first resistor in series, the third switch and the second resistor are connected with the second bipolar transistor in series, and a series branch of the fourth switch and the first electron and a series branch of the third switch, the second resistor and the second bipolar transistor are connected between the drain of the second MOS tube and GND in parallel;
the grid electrode of the fourth MOS tube is connected with the grid electrode of the fifth MOS tube, the drain electrode of the fourth MOS tube is connected to the drain electrode of the third MOS tube through a sixth switch, the drain electrode of the fifth MOS tube is connected to the second port of the comparator, the source electrodes of the fourth MOS tube and the fifth MOS tube are connected with GND, and the drain electrode of the fourth MOS tube is connected with the grid electrode;
a first port of the comparator inputs a reference voltage, a second port of the comparator is respectively connected with a load capacitor, a drain electrode of a fifth MOS tube and one end of a fifth switch, the other end of the fifth switch is connected with the drain electrode of a third MOS tube, the other end of the load capacitor is connected with GND, a third port of the comparator is connected with the first switch, the third switch and the fifth switch, and a fourth port of the comparator is connected with the second switch, the fourth switch and the sixth switch; the fourth port of the comparator is also connected to the input end of the counter, and the fifth port of the comparator inputs a clock signal; the on-off states of the first switch, the third switch and the fifth switch are the same, the on-off states of the second switch, the fourth switch and the sixth switch are the same, and the on-off states of the first switch, the third switch, the fifth switch, the second switch, the fourth switch and the sixth switch are opposite.
2. The CMOS temperature sensor circuit of claim 1, wherein the first, second and third MOS transistors are P-type MOS transistors, and the fourth and fifth MOS transistors are N-type MOS transistors.
3. The CMOS temperature sensor circuit of claim 1, wherein said operational amplifier input transistor is a P-type MOS transistor.
4. The CMOS temperature sensor circuit of claim 1, wherein the signal at the third port and the signal at the fourth port of the comparator are opposite.
5. The CMOS temperature sensor circuit of claim 1, wherein the switches in the circuit are transmission gates.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822202472.1U CN209841222U (en) | 2018-12-26 | 2018-12-26 | CMOS temperature sensor circuit |
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| CN201822202472.1U CN209841222U (en) | 2018-12-26 | 2018-12-26 | CMOS temperature sensor circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113741612A (en) * | 2021-09-17 | 2021-12-03 | 成都微光集电科技有限公司 | Temperature sensor |
| CN114279595A (en) * | 2021-12-28 | 2022-04-05 | 中国科学院半导体研究所 | Temperature sensing circuit, CMOS temperature sensor based on temperature sensing circuit and calibration method thereof |
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2018
- 2018-12-26 CN CN201822202472.1U patent/CN209841222U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113741612A (en) * | 2021-09-17 | 2021-12-03 | 成都微光集电科技有限公司 | Temperature sensor |
| CN114279595A (en) * | 2021-12-28 | 2022-04-05 | 中国科学院半导体研究所 | Temperature sensing circuit, CMOS temperature sensor based on temperature sensing circuit and calibration method thereof |
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Address after: Room A407, Neusoft venture building, 99 Huaxing Road, Xihu District, Hangzhou City, Zhejiang Province, 310012 Patentee after: Hangzhou Guangli Microelectronics Co.,Ltd. Address before: Room A407, Neusoft venture building, 99 Huaxing Road, Xihu District, Hangzhou City, Zhejiang Province, 310012 Patentee before: Semitronix Corp. |