CN209805846U - Multi-interface MVB network fault diagnosis device based on FPGA - Google Patents

Multi-interface MVB network fault diagnosis device based on FPGA Download PDF

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Publication number
CN209805846U
CN209805846U CN201920326534.1U CN201920326534U CN209805846U CN 209805846 U CN209805846 U CN 209805846U CN 201920326534 U CN201920326534 U CN 201920326534U CN 209805846 U CN209805846 U CN 209805846U
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module
interface
fpga
network fault
mvb network
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CN201920326534.1U
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Chinese (zh)
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胡黄水
杨兴旺
赵航
王宏志
吕洪武
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Changchun University of Technology
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Changchun University of Technology
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Abstract

The utility model relates to a many interfaces MVB network fault diagnostor based on FPGA, this diagnostor adopt the modularized design, specifically include: the device comprises a main control module, an FPGA module, an MVB module, a serial interface module, a USB interface module, an Ethernet interface module and a display interface module. The MVB module, the serial interface module, the USB interface module and the Ethernet interface module are respectively connected with the FPGA module, the FPGA module and the display module are respectively connected with the main control module, and fault diagnosis of the MVB network and display and transmission of diagnosis results are achieved under the cooperative control of the main control module and the FPGA module. The problem of application limitation caused by single interface of the MVB network fault diagnosis equipment is solved, the applicability of the MVB network fault diagnosis equipment is improved, and a technical scheme is provided for wide application of the MVB network fault diagnosis equipment.

Description

Multi-interface MVB network fault diagnosis device based on FPGA
Technical Field
the utility model relates to a multifunctional Vehicle Bus MVB (multifunctional Vehicle Bus Controller, MVB) network fault diagnostor design method, especially an MVB network fault diagnostor that has many interfaces based on FPGA realizes the diagnosis to MVB network fault and provides the interface of being connected with other equipment.
Background
The MVB network control system is easy to have various faults when working under severe environmental conditions such as high temperature, serious electromagnetic interference and the like for a long time. Once a fault occurs, the control system cannot work normally, the operation safety of the train is seriously affected, and even huge economic and personnel losses are brought.
The existing MVB network fault diagnosis system mostly adopts foreign integrated network control systems such as four-door, Ponbadi and the like, and has mature technology, high reliability, high price and confidential technology. Most of domestic systems have the problems of single interface, weak man-machine interaction capability and the like, so that the application is limited, namely different fault diagnosers are needed for equipment corresponding to different interfaces, and the universality is poor.
Disclosure of Invention
The utility model discloses to current fault diagnosis ware single problem of interface provides a many interfaces MVB network fault diagnosis ware based on FPGA, makes MVB network fault diagnosis ware have the interface ability of serial ports, USB, ethernet and local demonstration, improves MVB network fault diagnosis ware's suitability, realizes effectively being connected with other equipment.
The utility model provides a many interfaces MVB network fault diagnostor based on FPGA, include: the device comprises a main control module, an FPGA module, an MVB module, a serial interface module, a USB interface module, an Ethernet interface module and a display interface module. The MVB module and the FPGA module are connected to access the MVB network, fault diagnosis of the MVB network is achieved under the control of the main control module, then the diagnosis result is displayed through the display interface, and the diagnosis result is transmitted to other equipment through the serial interface module, the USB interface module and the Ethernet interface module under the cooperative control of the main control module and the FPGA module.
The main control module is a control module of a multi-interface MVB network fault diagnoser, and a main chip of the main control module is STM32F103ZET 6. The system comprises a main control module, an FPGA module, a serial interface module, a USB interface module and an Ethernet interface module, wherein the SPI bus of the main control module is communicated with the FPGA module, receives data of the MVB module and sends a diagnosis result to the display interface module and one of the serial interface module, the USB interface module and the Ethernet interface module.
the FPGA module is an auxiliary control module of the multi-interface MVB network fault diagnosis device, and the main chip of the FPGA module is FPGA EP4CE6F17C 8. And MVB network data acquisition and fault diagnosis result transmission are carried out through the SPI buses of the FPGA module and the main control module. The diagnosis result can be automatically transmitted by selecting one of the serial interface module, the USB interface module and the Ethernet interface module, or can be transmitted by manually selecting one of the serial interface module, the USB interface module and the Ethernet interface module through a dial switch. In addition, the FPGA module comprises a crystal oscillator and a reset circuit, and provides a clock and a reset signal for the FPGA module. And the FPGA module drives the LED state display circuit to respectively provide power indication, work indication, serial port connection indication, USB connection indication and Ethernet connection indication.
The MVB module is an MVB network access module of the multi-interface MVB network fault diagnoser and adopts a D013MVB controller of Du root of Switzerland. The module multi-interface MVB network fault diagnotor can be accessed into the MVB network to realize communication with other equipment in the MVB network. In order to simplify the connection between the module and the FPGA module, the MODE2 and the MODE1 pins of the module are configured to be at "high" and "low levels, that is, logic" 1 "and" 0 ", so as to implement that the interface between the module and the FPGA module is SPI, that is, to implement that MVB network data is transmitted to the FPGA module through the SPI. In addition, in order to achieve electrical medium range transmission (i.e., transmission distance no greater than 200 meters) of the module, the MODE0 pin of the module should be configured to a "high" level, i.e., logic "1". Moreover, in order to enable the module to recover normal operation under the condition of power-on/power-off or other low voltage, a RESET signal is provided for the module/RESET pin through the FPGA module.
The serial interface module is a serial port access module of the self-adaptive multi-interface MVB network fault diagnostor, and a main chip of the serial interface module is MAX3232 CAE. The module multi-interface MVB network fault diagnotor can be connected with an RS-232 interface to realize the communication between the MVB network and other serial port equipment. The module is connected to the FPGA module through the T1IN and R1OUT pins, and the T1IN pin is pulled up to maintain the input pin in a stable state.
The USB interface module is a USB access module of a multi-interface MVB network fault diagnoser, and a main chip of the USB interface module is MAX 3420E. The module multi-interface MVB network fault diagnostor can be connected with a USB interface to realize communication between the MVB network fault diagnostor and other U-port equipment. The module is connected with the FPGA module through an SPI interface and is connected with the FPGA module through an interruption INT pin to inform a USB of an event. In addition, in order to enable the module to recover normal operation under the power-on/power-off or other abnormal conditions, a reset signal is provided to the module/RES pin through the FPGA module.
The Ethernet interface module is an Ethernet access module of the multi-interface MVB network fault diagnosis device, and a main chip of the Ethernet interface module is DP 83846A. Through the module, the multi-interface MVB network fault diagnostor can be accessed to the Internet, and communication between the MVB network fault diagnostor and other equipment in the Internet is realized.
The display interface module is a display module of a multi-interface MVB network fault diagnoser, and the main chip of the display interface module is RSCG128 12864B. The module multi-interface MVB network fault diagnotor can display the MVB network fault, and the module is connected with the main control module through an I2C bus to carry out information communication.
it is visible by the above description the utility model relates to a many interfaces MVB network fault diagnostor based on FPGA has the MVB interface, serial interface, the USB interface, ethernet interface and demonstration interface, under the cooperative control of host system and FPGA module, realize the fault diagnosis to the MVB network, and show the interface display with the diagnostic result, and accessible serial interface, USB interface and ethernet interface transmit, thereby make many interfaces MVB network fault diagnostor have the serial ports, the interface ability of USB and ethernet, improve many interfaces MVB network fault diagnostor's suitability, realize the general connection with other equipment.
Drawings
fig. 1 is a schematic view of the overall structure of the present invention;
Fig. 2 is a schematic diagram of the circuit principle of the main control module of the present invention;
FIG. 3 is a schematic diagram of the FPGA module circuit of the present invention;
FIG. 4 is a schematic circuit diagram of the MVB module of the present invention;
Fig. 5 is a schematic circuit diagram of the serial interface module according to the present invention;
fig. 6 is a schematic circuit diagram of the USB interface module according to the present invention;
Fig. 7 is a schematic circuit diagram of an ethernet interface module according to the present invention;
Fig. 8 is a schematic circuit diagram of the display interface module according to the present invention;
Fig. 9 is a schematic view of the cooperative control flow of the present invention.
Detailed Description
Referring to fig. 1, the present invention will be described in further detail with reference to the accompanying drawings, wherein an FPGA-based multi-interface MVB network fault diagnosis apparatus includes a main control module, an FPGA module, an MVB module, a serial interface module, a USB interface module, an ethernet interface module, and a display interface module. The MVB module, the serial interface module, the USB interface module and the Ethernet interface module are respectively connected with the FPGA module, the FPGA module and the display module are respectively connected with the main control module, and fault diagnosis of the MVB network and display and transmission of diagnosis results are achieved under the logic control of the main control module and the FPGA module. The transmission interface of the fault diagnosis structure can automatically select one of a serial interface, a USB interface and an Ethernet interface, and can also manually select one of the serial interface, the USB interface and the Ethernet interface in the form of a dial switch, so that the multi-interface MVB network fault diagnosis device has the capabilities of the serial interface, the USB interface and the Ethernet interface, the applicability of the multi-interface MVB network fault diagnosis device is improved, and the multi-interface MVB network fault diagnosis device is effectively connected with other equipment.
The main control module is a control module of a multi-interface MVB network fault diagnosis device, a main chip of the main control module is STM32F103ZET6, and the circuit principle is as shown in FIG. 2. The SPI bus of the main control module is communicated with the FPGA module, the MVB module data is received, the diagnosis result is transmitted to the FPGA, and the FPGA interacts with commands. Specifically, a pin PA4 of a main control module STM32F103ZET6 is connected with a pin G2 of an FPGA module EP4CE6F17C8, a pin PA5 of the STM32F103ZET6 is connected with a pin H2 of the FPGA module EP4CE6F17C8, a pin PA6 of the STM32F103ZET6 is connected with a pin G1 of the FPGA module EP4CE6F17C8, and a pin PA7 of the STM32F103ZET6 is connected with a pin D2 of the FPGA module EP4CE6F17C 8. The main control module analyzes and calculates the received MVB network data to obtain a fault diagnosis result, and sends the result to the display interface module through the I2C interface for displaying. Specifically, a pin PB10 of the main control module STM32F103ZET6 is connected with a pin 4 of the display interface module RSCG12864B, and a pin PB11 of the main control module STM32F103ZET6 is connected with a pin 5 of the display interface module RSCG128 12864B.
The FPGA module is an auxiliary control module of the multi-interface MVB network fault diagnosis device, the main chip of the FPGA module is FPGA EP4CE6F17C8, and the circuit principle is as shown in FIG. 3. U1 is EP4CE6F17C8, A denotes a part of U1. And MVB network data acquisition, fault diagnosis result transmission and command interaction are carried out through the SPI buses of the FPGA module and the main control module. The diagnosis result can be automatically transmitted by selecting one of the serial interface module, the USB interface module and the Ethernet interface module, or can be transmitted by manually selecting one of the serial interface module, the USB interface module and the Ethernet interface module through a dial switch. In a default state, the dial switch S1 is in an OFF state, and pins 5, 6, 7, and 8 of the dial switch S1 are connected to pull-up resistors R11, R10, R9, R8, and F2, D1, F3, and B1 of FPGA U1 EP4CE6F17C8, respectively, at this time, pins F2, D1, F3, and B1 of U1 are in a logic "1" state, which indicates that the dial switch is not toggled, and the multi-interface MVB network fault diagnosis device is not connected to any interface. When the group 1 switch of the S1 is toggled to be in an ON state, the pin 1 of the S1 is connected to the pin 8, and at this time, the pin B1 of the U1 is in a logic "0" state, which indicates that the multi-interface MVB network fault diagnosis device is connected to the serial interface. Similarly, when the group 2 switch of S1 is toggled to be in the ON state, pin 2 of S1 is connected to pin 7, and at this time, pin F3 of U1 is in the logic "0" state, which indicates that the multi-interface MVB network fault diagnosis device is connected to the USB interface. When the group 3 switch of the S1 is toggled to be in an ON state, the pin 3 of the S1 is connected to the pin 6, and at this time, the pin D1 of the U1 is in a logic "0" state, which indicates that the multi-interface MVB network fault diagnosis device is connected to the ethernet interface. When the 4 th group of switches of the S1 is toggled to be in an ON state, the pin 4 of the S1 is connected to the pin 5, and at this time, the pin F2 of the U1 is in a logic "0" state and is used for the multi-interface MVB network failure diagnosis extension interface. But only one group of switches can be simultaneously switched, and if a plurality of groups of switches are simultaneously switched, the serial number is small. In addition, the FPGA module comprises a crystal oscillator and a reset circuit, and provides a clock and a reset signal for the FPGA module. In the figure, U2 is a reset chip STM6822, and a reset pin 1 of U2 is connected with a D4 pin of an FPGA U1 EP4CE6F17C8 through a pull-up resistor R2 to provide a reset input signal for an FPGA module. Pin 4 of U2 is connected to pin F5 of FPGA U1 EP4CE6F17C8 to implement the watchdog function. X1 and P1 are clock circuits, wherein X1 is a crystal oscillator, pin 3 of the crystal oscillator is connected with pin E1 of FPGA U1 EP4CE6F17C8 to provide an internal clock for the FPGA module, and in order to stabilize the provided clock, a power supply pin 4 of X1 is connected with an L1 and a C1 filter circuit. In addition, in order to enrich the clock source of the FPGA module, an external clock input terminal P1 is provided, connected with pin M2 of FPGA U1 EP4CE6F17C 8. That is, other clocks can be accessed from the outside of the multi-interface MVB network fault diagnosis device through the P1 terminal and provided for the FPGA module. In order to indicate the dial-up position, namely the connection state of the multi-interface MVB network fault diagnosis device, the dial-up position is realized by adopting a light emitting diode. One ends of the light emitting diodes D1, D2, D3 and D4 are respectively connected with pins E5, C2, G5 and F1 of an FPGA U1 EP4CE6F17C8, one ends of the light emitting diodes are respectively connected with current limiting resistors R3, R4, R5 and R6, and the other ends of the current limiting resistors R3, R4, R5 and R6 are connected with a power supply VCC3P 3. The light emitting diodes D1, D2, D3 and D4 correspond to the positions 1, 2, 3 and 4 of the dial-up switch respectively, namely indicate that the conversion interface is a serial port, a USB interface, an Ethernet interface and an expansion interface respectively. In the default state, the pins E5, C2, G5, and F1 of U1 output logic "1" to turn off the leds D1, D2, D3, and D4. When a certain position of the dial switch is in an ON state, the corresponding light emitting diode is in a bright state, and the type of the connecting interface where the multi-interface MVB network fault diagnosis device is located at the moment is indicated.
The MVB module is an MVB network access module of a multi-interface MVB network fault diagnosis device, a duren D013MVB controller is adopted, a circuit principle of the MVB module is schematically shown in fig. 4, U1 is EP4CE6F17C8, G represents a part of U1, and U3 is an MVB controller D013. The module multi-interface MVB network fault diagnotor can be accessed into the MVB network to realize communication with other equipment in the MVB network. In order to simplify the connection between the module and the FPGA module, the MODE2 and the MODE1 pins of the module are configured to be at "high" and "low levels, that is, logic" 1 "and" 0 ", so as to implement that the interface between the module and the FPGA module is SPI, that is, to implement that MVB network data is transmitted to the FPGA module through the SPI. I.e., pin 28 of U3 is connected to pull-up resistor R12, implementing a logic "1" function. Pin 27 of U3 is connected to ground GND, implementing a logic "0" function. Pins 3, 4, 5, 6 of U3 are connected to pins K2, L2, L3, N1 of FPGA U1, respectively. In addition, in order to achieve electrical medium range transmission (i.e., transmission distance no greater than 200 meters) of the module, the MODE0 pin of the module should be configured to a "high" level, i.e., logic "1". That is, pin 26 of U3 is connected to pull-up resistor R12, implementing a logic "1" function. Moreover, in order to enable the module to recover normal operation under the condition of power-on/power-off or other low voltage, a RESET signal is provided for the module/RESET pin through the FPGA module. I.e., pin 21 of U3 is connected to pin L4 of U1. In order to indicate the FPGA module when the state of the module changes, an interrupt signal is sent to the FPGA module, i.e., the pin 25 of the U3 is connected to the pin P2 of the U1 and to the pull-up resistor R13.
The serial interface module is a serial port access module of a multi-interface MVB network fault diagnoser, a main chip of the serial interface module is MAX3232CAE of Maxim company, a circuit principle is schematically shown in FIG. 5, U1 is EP4CE6F17C8, G represents a part of U1, and U4 is MAX3232 CAE. The module self-adaptive MVBC interface converter can be connected with an RS-232 interface to realize the communication between the multi-interface MVB network fault diagnostor and other serial port equipment. Pin 11 of the module U4 is connected to pin J1 of U1G, pin 12 of U4 is connected to pin K6 of U1G, and in order to keep the input pin in a stable state, pin 11 of U4 is pulled up through resistor R14. In order to facilitate connection with other serial devices, the module provides a DB9 interface, and the pin 14 and the pin 13 of the U1 are respectively connected with the pins 2 and 3 of the DB9, so that communication with other serial devices is realized. The module also has 4 charge pump capacitors C2, C3, C4 and C5, wherein C2 is connected to pins 1 and 3 of U4, C3 is connected to pins 4 and 5 of U4, one end of C4 is connected to pin 2 of U4, one end is grounded, one end of C5 is connected to pin 16 of U4, and one end is connected to power supply VCC3P 3.
the USB interface module is a USB access module of a multi-interface MVB network fault diagnosis device, a main chip of the USB access module is MAX3420E of Maxim corporation, a circuit principle is schematically shown in fig. 6, U1 is EP4CE6F17C8, G represents a part of U1, and U5 is MAX 3420E. The multi-interface MVB network fault diagnostor can be communicated with other U-port equipment through the USB interface. The module is connected with the FPGA module through an SPI interface, namely pins 11, 12, 13 and 14 of U5 are respectively connected with pins L1, K1, L6 and J6 of U1, and the event of USB occurrence is informed by interrupting the connection of an INT pin and the FPGA module, namely pin 17 of U5 is connected with pin J2 of U1. In addition, in order to enable the module to recover to normal operation under the condition of power-on/power-off or other abnormal conditions, a reset signal is provided to the module/RES pin through the FPGA module, namely the pin N2 of the U1 is connected with the pin 10 of the U5. And a vibrating circuit consisting of a crystal oscillator X2 and capacitors C6 and C7 is provided to supply a clock to MAX 3420E. To facilitate connection of the module to other USB devices, a standard USB type B receptacle, USB _ B, is provided, where pin 2 of USB _ B is connected to pin 21 of U5 and pin 3 of USB _ B is connected to pin 20 of U5. The reference voltage pins 3 and 4 are connected to the power source VCC3P3 and one end of the filter capacitor C8.
The ethernet interface module is an ethernet access module of a multi-interface MVB network fault diagnosis device, a main chip of the ethernet access module is DP83846A, a circuit principle is schematically shown in fig. 7, U1 is EP4CE6F17C8, I represents a part of U1, and U6 is DP 3846A. Through the module, the multi-interface MVB network fault diagnostor can be accessed to the Internet, and communication between the multi-interface MVB network fault diagnostor and other equipment in the Internet is realized. U6 is connected with U1 through media independent interface MII, total 16 pins. The 8 data transceiver signal lines TXD0, TXD1, TXD2, TXD3, RXD0, RXD1, RXD2 and RXD3 are pins 54, 55, 58, 41, 40, 39 and 38 of U6, and are respectively connected with pins T9, L9, N9, T10, N11, T15, P14 and M11 of U1. The transmission and reception error indication signal lines TX _ ER, RX _ ER are pins 50, 46 of U6, which are connected to pins T12, L11 of U1, respectively. The pins 52 and 44 of the transmission and reception enable signal lines TX _ EN and RX _ DV U6 are connected to T11 and N12 of U1, respectively. The pins 51 and 45 of the transmission and reception reference clock signal lines TX _ CLK and RX _ CLK, U6, are connected to L10 and R14 of U1, respectively. The collision detection and carrier sense signal lines COL, CRS are pins 60, 61 of U6, which are connected to T13, P11 of U1, respectively. The competition X2 and C7, C6 form an oscillation circuit to provide a clock for U1 DP83846A, and the pins of X2 are connected with pins 67, 66 and C7, C6 of U6, respectively. In addition, in order to enable the module to recover to normal operation under the power-on/power-off or other abnormal conditions, a RESET signal is provided to the module/RESET pin through the FPGA module, namely, the pin T14 of the U1 is connected with the pin 62 of the U6. In order to indicate the working state of U1 DP83846A, a current limiting resistor R20 is connected through D8, R20 is connected with a pin 33 of U6 to indicate a full-duplex state, a current limiting resistor R19 is connected through D7, R19 is connected with a pin 32 of U6 to indicate a collision state, a current limiting resistor R18 is connected through D6, R18 is connected with a pin 30 of U6 to indicate a transmission state, a current limiting resistor R17 is connected through D5, and R17 is connected with a pin 29 of U6 to indicate a receiving state. To facilitate connection to other network devices, the module provides an RJ45 interface, pins 16, 17, 11, 10 of U6 and pins 1, 2, 7, 8 of RJ45 are connected, and pins 16, 17 are pulled up through resistors R15, R16 to enable communication with other network port devices. In order to suppress power supply noise and interference, the pins 4 and 7 of the U6 are connected to the power supply VCC3P3 through the bead L1, and the pin 12 of the U6 is connected to the power supply VCC3P3 through the bead L2.
The display interface module is a display module of a multi-interface MVB network fault diagnosis device, the main chip of the display interface module is RSCG128 12864B, and the circuit principle is shown in FIG. 8. The module multi-interface MVB network fault diagnotor can display the MVB network fault, and the module is connected with the main control module through an I2C bus to carry out information communication. Specifically, pin 4 of the display interface module RSCG12864B is connected to pin PB10 of the main control module STM32F103ZET6, and pin 5 of the display interface module RSCG12864B is connected to pin PB10 of the main control module STM32F103ZET 6.
The utility model discloses a many interfaces MVB network fault diagnostor based on FPGA, including host system, FPGA module, MVB module, serial interface module, USB interface module, ethernet interface module and display interface module. Under the cooperative control of the main control module and the FPGA module, the fault diagnosis of the MVB network and the display and transmission of the diagnosis result are realized, and the logic control flow is schematically shown in fig. 9. The multi-interface MVB network fault diagnosis device enters a starting state after power-on reset, the main control module is communicated with the FPGA through the SPI to judge whether the dial switch is fully OFF, and if so, the main control module automatically configures the interface form of the multi-interface MVB network fault diagnosis device. Otherwise, judging whether the first group of switches are ON, if so, connecting the multi-interface MVB network fault diagnosis device with the serial interface, otherwise, judging whether the second group of switches are ON, if so, connecting the multi-interface MVB network fault diagnosis device with the USB interface, otherwise, judging whether the third group of switches are ON, and if so, connecting the multi-interface MVB network fault diagnosis device with the Ethernet interface. And then the main control receives the data of the MVB module, analyzes and diagnoses the data, and sends the result to one of the display interface module and the serial interface module, the USB interface module and the Ethernet interface module to realize the display and transmission of the diagnosis result.

Claims (8)

1. The utility model provides a many interfaces MVB network fault diagnostor based on FPGA which characterized in that: the system adopts a modular design and comprises a main control module, an FPGA module, an MVB module, a serial interface module, a USB interface module, an Ethernet interface module and a display interface module; the main control module is connected with the FPGA module through an SPI bus; the MVB module and the USB interface module are connected with the FPGA module through an SPI interface; the serial interface module is connected with the FPGA module through a T1IN pin and an R1OUT pin; the Ethernet interface module is connected with the FPGA module through a medium independent interface MII; the display module is connected with the main control module through an I2C bus.
2. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the main control module adopts an STM32F103ZET6 chip and is respectively connected with the FPGA module and the display interface module through on-chip resource SPI and I2C buses, so that command interaction with the FPGA module, MVB network data receiving, analysis and diagnosis result output are realized.
3. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the FPGA module adopts an EP4CE6F17C8 chip, and is connected with a main control module through on-chip IO, an MVB module, a serial interface module, a USB interface module and an Ethernet interface module, in order to manually configure the interface mode, a dial switch circuit is connected, in addition, the FPGA module comprises a crystal oscillator and a reset circuit, a clock and a reset signal are provided for the FPGA module, in addition, the FPGA module drives an LED state display circuit, power supply indication is provided respectively, work indication is provided, serial connection indication, USB connection indication and Ethernet connection indication are provided.
4. the FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the MVB module adopts a D013MVB controller of Du's Switzerland to realize the communication between the multi-interface MVB network fault diagnostor and the MVB network.
5. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the serial interface module adopts a MAX3232CAE chip to realize the communication between the multi-interface MVB network fault diagnostor and the serial RS232 equipment.
6. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the USB interface module adopts a MAX3420E chip to realize the communication between the multi-interface MVB network fault diagnostor and the USB equipment.
7. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: the Ethernet interface module adopts a DP83846A chip to realize the communication between the multi-interface MVB network fault diagnosis device and the Ethernet equipment.
8. The FPGA-based multi-interface MVB network fault diagnoser of claim 1, wherein: and the display interface module adopts a DP83846A chip to realize the fault information display of the multi-interface MVB network fault diagnostor.
CN201920326534.1U 2019-03-15 2019-03-15 Multi-interface MVB network fault diagnosis device based on FPGA Expired - Fee Related CN209805846U (en)

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