CN209765505U

CN209765505U - Sensor data reading device

Info

Publication number: CN209765505U
Application number: CN201920580834.2U
Authority: CN
Inventors: 徐航
Original assignee: Hangzhou Dianzi University
Current assignee: Hangzhou Dianzi University
Priority date: 2019-04-25
Filing date: 2019-04-25
Publication date: 2019-12-10
Anticipated expiration: 2029-04-25

Abstract

The utility model discloses a sensor data reading device. Data export and system parameter configuration of most electronic systems with strong specialization are usually realized by means of matched upper computer software. The utility model discloses a power supply circuit, multiplexing circuit, TF card read circuit and master control circuit. The TF card reading circuit comprises a card reader chip and a USB socket. The multiplexing circuit includes a multiplexing chip. The utility model discloses a set up multiplexing circuit, can realize that the TF card is connected with the switching of main control chip, host computer, and then simplified the configuration flow of reading flow and sensor of sensor data. The utility model discloses well multiplexing chip's data selection end is connected on TF card reading circuit. Therefore, when the TF card reading circuit is powered on, the TF card is automatically connected with the upper computer, and the process of connecting the TF card with the upper computer is simplified.

Description

Sensor data reading device

Technical Field

The utility model belongs to the technical field of data storage, concretely relates to sensor data reading device.

Background

the storage of data and the configuration of system parameters are important components of various types of embedded electronic systems. Data export and system parameter configuration of most electronic systems with strong specialization are usually realized by means of matched upper computer software. The development of the matched special upper computer software needs to consume certain energy and financial resources, and the non-universality of the upper computer can cause inconvenience for users to use. Therefore, it is important to develop a data storage and parameter configuration circuit with good versatility, strong operability and convenient use when designing an electronic system.

Disclosure of Invention

An object of the utility model is to provide a sensor data reading device.

The utility model discloses a power supply circuit, multiplexing circuit, TF card read circuit and master control circuit. The power supply circuit supplies power for the multiplexing circuit, the TF card circuit and the main control circuit.

the TF card reading circuit comprises a card reader chip and a USB socket. The model of the card reader chip is GLK 823. The 16 pins of the card reader chip are connected with one end of a resistor R10. The other end of the resistor R10 is connected with the D + communication pin of the USB socket. The 15 pin of the card reader chip is connected with one end of a resistor R11. The other end of the resistor R11 is connected with a D-communication pin of the USB socket. The 10 pins of the card reader chip are connected with the power supply pins of the USB socket. The 2 pin of the card reader chip is a first data end of the TF card reading circuit, the 3 pin is a second data end of the TF card reading circuit, the 4 pin is a clock end of the TF card reading circuit, the 5 pin is a command end of the TF card reading circuit, the 6 pin is a third data end of the TF card reading circuit, and the 7 pin is a fourth data end of the TF card reading circuit. And the 8 pins of the card reader chip are the auxiliary power supply input ends of the TF card reading circuit.

The multiplexing circuit comprises a multiplexing chip. The model of the multiplexing chip is TS3A 27518E-Q1. The pins 16 and 20 of the multiplexing chip are respectively connected with one ends of the resistor R5 and the resistor R6. The other ends of the resistor R5 and the resistor R6 are connected with the 3.3V output end of the power circuit. The 5 pins of the multiplexing chip are connected with the cathodes of the diode D3 and the diode D4; the anode of the diode D3 is connected with the 3.3V output end of the power circuit. The anode of the diode D4 is connected with the auxiliary power supply input end of the TF card reading circuit. The data selection of the multiplexing chip is terminated at one end of the resistor R3 and the resistor R7. The pin 17 of the multiplexing chip is connected with one end of a resistor R8. The other end of the resistor R3 is connected with a power supply pin of the USB socket. The other ends of the resistor R7 and the resistor R8 are grounded. Pins 8, 10, 12, 14, 15 and 13 of the multiplexing chip are respectively connected with a first data terminal, a second data terminal, a clock terminal, a command terminal, a third data terminal and a fourth data terminal of the TF card reading circuit. Pins 20, 18 and 16 of the multiplexing chip are respectively connected with an SPI master-output slave-input communication end, an SPI bus clock end and an SPI master-input slave-output communication end of the master control circuit. Pins 1, 3, 4, 6, 7 and 9 of the multiplexing chip are respectively a first common end, a second common end, a third common end, a fourth common end, a fifth common end and a sixth common end of the multiplexing circuit. And 5 pins of the multiplexing chip are used as a TF card power supply terminal of the multiplexing circuit.

The TF card circuit comprises a TF card holder. And a pin 1 of the TF card holder is connected with a first common end of the multiplexing circuit, a pin 2 is connected with a second common end of the multiplexing circuit, a pin 3 is connected with a third common end of the multiplexing circuit, a pin 5 is connected with a fourth common end of the multiplexing circuit, a pin 7 is connected with a fifth common end of the multiplexing circuit, and a pin 8 is connected with a sixth common end of the multiplexing circuit.

furthermore, the 10 pin of the card reader chip is connected to one end of the capacitor C7, the 12 pin is connected to the cathode of the light emitting diode D1, and the 9 and 13 pins are connected to the anode of the light emitting diode D1. The 8-pin of the card reader chip is connected with one end of the capacitor C5. The pins 1 and 14 of the card reader chip, the ground pin of the USB socket, the other ends of the capacitor C5 and the capacitor C7 are all grounded.

Further, one end of the data selection termination resistor R4 of the multiplexing chip is connected with the data selection terminal. The other end of the resistor R4 is connected with the auxiliary power supply input end of the TF card reading circuit.

furthermore, the 4-pin of the TF card holder is connected to one end of the capacitor C4 and the TF card power supply end of the multiplexing circuit. The pin 6 of the TF card holder and the other end of the capacitor C4 are both grounded.

Further, the power supply circuit comprises a switching power supply chip. The model number of the switching power supply chip is TPS 7333Q. The 3 and 4 pins of the switch power supply chip are connected with one end of a capacitor C1 and one end of a capacitor C2 and connected with external 5V voltage. The pins 1 and 2 of the switching power supply chip, the other ends of the capacitor C1 and the capacitor C2 are all grounded. The pins 5, 6 and 7 of the switch power supply chip are all connected with one end of a resistor R1 and a capacitor C3, and the pin 8 is connected with the other end of the resistor R1. The other end of the capacitor C3 is connected with one end of a resistor R2. The other end of the resistor R2 is connected to ground. Pins 5, 6 and 7 of the switching power supply chip are used as the 3.3V output end of the power supply circuit.

Further, the utility model discloses still include RTC clock circuit. The RTC clock circuit comprises a clock chip and a button cell. The model of the clock chip is DS 3231. The 3 pin of the clock chip is connected with one end of a resistor R14. The 2-pin of the clock chip is connected with the other end of the capacitor C9, the other end of the resistor R14 and the 3.3V output end of the power circuit. The other terminal of the capacitor C9 is connected to ground. The 15 pin of the clock chip is connected with one end of a resistor R12, and the 16 pin is connected with one end of a resistor R13. The other ends of the resistor R12 and the resistor R13 are connected with the 3.3V output end of the power circuit. The 14 pins of the clock chip are connected with one end of the capacitor C10 and the anode of the button cell. The other end of the capacitor C10 and the negative electrode of the button cell B1 are both grounded. Pins 5, 6, 7, 8, 9, 10, 11, 12, and 13 of the clock chip are all grounded. The 15 pins and 16 pins of the clock chip are the I2C data terminal and the I2C clock terminal of the RTC clock circuit, respectively, and are connected to the I2C data terminal and the I2C clock terminal of the main control circuit, respectively.

Furthermore, the main control circuit comprises a main control chip. The main control chip adopts a single chip microcomputer with the model number of STM32F103VET 6. The 6 pins of the main control chip are connected with one end of the capacitor C11. The other end of the capacitor C11 is connected with the 3.3V output end 3.3V of the power circuit. The 12 pins of the main control chip are connected to the crystal oscillator X1 and one end of the capacitor C12. The pin 13 of the main control chip is connected with the other end of the crystal oscillator X1 and one end of the capacitor C13. The other ends of the capacitor C12 and the capacitor C13 are grounded. Pins 50, 75, 100, 28, 11, 21 and 22 of the main control chip are connected with the 3.3V output end of the power circuit, and pins 20, 49, 74, 99, 10 and 19 are all grounded. A pin 30 of the main control chip is an SPI bus clock end of the main control circuit, a pin 31 is an SPI main input and output communication end of the main control circuit, and a pin 32 is an SPI main output and output communication end of the main control circuit. The 4 pins of the main control chip are the I2C clock end of the main control circuit, the 31 pin is the SPI master in and out communication end of the main control circuit, and the 2 pin is the I2C data end of the main control circuit.

The utility model has the advantages that:

1. the utility model discloses a set up multiplexing circuit, can realize that the TF card is connected with the switching of main control chip, host computer, and then simplified the configuration flow of reading flow and sensor of sensor data.

2. The utility model discloses well multiplexing chip's data selection end is connected on TF card reading circuit. Therefore, when the TF card reading circuit is powered on, the TF card is automatically connected with the upper computer, and the process of connecting the TF card with the upper computer is simplified.

3. The utility model discloses a TF card circuit receives power supply circuit and TF card to read the common power supply of circuit, and then makes under the circumstances that power supply circuit closed, and the host computer is not influenced to reading of TF card data.

Drawings

FIG. 1 is a block diagram of the system of the present invention;

FIG. 2 is a schematic circuit diagram of a power supply circuit according to the present invention;

FIG. 3 is a schematic circuit diagram of the TF card reading circuit of the present invention;

Fig. 4 is a circuit schematic diagram of the main control circuit of the present invention;

FIG. 5 is a schematic circuit diagram of a RTC clock circuit of the present invention;

Fig. 6 is a schematic circuit diagram of the multiplexing circuit of the present invention;

Fig. 7 is a schematic circuit diagram of the TF card circuit of the present invention.

Detailed Description

The present invention will be further explained with reference to the accompanying drawings.

As shown in figure 1, the sensor data reading device comprises a power supply circuit I, a multiplexing circuit II, a TF card circuit III, a TF card reading circuit IV, an RTC clock circuit V and a main control circuit VI. The power supply circuit I supplies power for the multiplexing circuit II, the TF card circuit III, the RTC clock circuit V and the main control circuit VI. And the TF card circuit III is provided with a TF card. And the TF card circuit III is connected with the multiplexing circuit II. And the multiplexing circuit II realizes the connection switching between the TF card circuit III and the TF card reading circuit IV and the main control circuit VI through a multiplexing chip. The RTC clock circuit V provides a clock signal for the main control circuit VI.

As shown in fig. 2, the power supply circuit includes a switching power supply chip U1. The model number of the switching power supply chip U1 is TPS 7333Q. The 3 and 4 pins of the switching power supply chip U1 are connected with one end of the capacitor C1 and one end of the capacitor C2, and are connected with the external 5V voltage. The pins 1 and 2 of the switching power supply chip U1, the other ends of the capacitor C1 and the capacitor C2 are all grounded. The pins 5, 6 and 7 of the switching power supply chip U1 are all connected with one end of a resistor R1 and a capacitor C3, and the pin 8 is connected with the other end of a resistor R1. The other end of the capacitor C3 is connected with one end of a resistor R2. The other end of the resistor R2 is connected to ground. Pins 5, 6 and 7 of the switching power supply chip U1 are used as the 3.3V output terminal 3.3V of the power supply circuit.

As shown in fig. 3, the TF card reading circuit includes a card reader chip U4 and a USB socket P1. The card reader chip U4 is of the type GLK 823. The 16 pins of the card reader chip U4 are connected to one end of a resistor R10. The other end of the resistor R10 is connected with the D + communication pin (2 pin) of the USB socket P1. The 15 pin of the card reader chip U4 is connected with one end of a resistor R11. The other end of the resistor R11 is connected with the D-communication pin (3 pin) of the USB socket P1. The 10 pins of the card reader chip U4 are connected to the VUSB (pin 1) of the USB socket P1 and one end of the capacitor C7, the 12 pins are connected to the cathode of the light emitting diode D1, and the 9 and 13 pins are connected to the anode of the light emitting diode D1. The 8-pin of the card reader chip U4 is connected with one end of the capacitor C5. The pins 1 and 14 of the card reader chip U4, the ground pin (pin 5) of the USB socket P1, the other ends of the capacitor C5 and the capacitor C7 are all grounded.

A2 pin of the card reader chip U4 is a first data end SD-D1 of the TF card reading circuit, a 3 pin is a second data end SD-D0 of the TF card reading circuit, a 4 pin is a clock end SD-CLK of the TF card reading circuit, a 5 pin is a command end SD-CMD of the TF card reading circuit, a 6 pin is a third data end SD-D3 of the TF card reading circuit, and a 7 pin is a fourth data end SD-D2 of the TF card reading circuit. The pin 8 of the card reader chip U4 is an auxiliary power supply input end PMOS of the TF card reading circuit.

As shown in fig. 4, the master control circuit includes a master control chip U6. The main control chip U6 adopts a single chip microcomputer with the model number of STM32F103VET 6. The pin 6 of the main control chip U6 is connected to one end of the capacitor C11. The other end of the capacitor C11 is connected with the 3.3V output end 3.3V of the power circuit. The 12 pins of the main control chip U6 are connected to the crystal oscillator X1 and one end of the capacitor C12. The 13 pins of the main control chip U6 are connected to the other end of the crystal oscillator X1 and one end of the capacitor C13. The other ends of the capacitor C12 and the capacitor C13 are grounded. Pins 50, 75, 100, 28, 11, 21 and 22 of the main control chip U6 are connected with the 3.3V output end 3.3V of the power circuit, and pins 20, 49, 74, 99, 10 and 19 are all grounded. The first I/O port (pin 30) of the main control chip U6 is the SPI bus clock terminal SPI _ CLK of the main control circuit, the second I/O port (pin 31) is the SPI master in/out communication terminal SPI _ MISO of the main control circuit, and the third I/O port (pin 32) is the SPI master out/in communication terminal SPI _ MOSI of the main control circuit.

As shown in FIG. 5, the RTC clock circuit comprises a clock chip U5 and a button battery B1. The clock chip U5 is model DS 3231. The 3 pin of the clock chip U5 is connected with one end of a resistor R14. The 2-pin of the clock chip U5 is connected with the capacitor C9, the other end of the resistor R14 and the 3.3V output end 3.3V of the power circuit. The other terminal of the capacitor C9 is connected to ground. The 15 pins of the clock chip U5 are connected to one end of a resistor R12, and the 16 pins are connected to one end of a resistor R13. The other end of the resistor R12 and the other end of the resistor R13 are connected with the 3.3V output end 3.3V of the power circuit. The 14 pins of the clock chip U5 are connected with one end of the capacitor C10 and the positive electrode of the button battery B1. The other end of the capacitor C10 and the negative electrode of the button cell B1 are both grounded. Pins 5, 6, 7, 8, 9, 10, 11, 12, and 13 of clock chip U5 are all grounded. The 15 pins and the 16 pins of the clock chip U5 are the I2C data terminal SDA and the I2C clock terminal SCL of the RTC clock circuit, respectively, and are connected to the I2C data terminal (2 pins of the main control chip U6) and the I2C clock terminal (4 pins of the main control chip U6) of the main control circuit, respectively. The remaining pins of clock chip U5 are all floating.

As shown in fig. 6, the multiplexing circuit includes a multiplexing chip U2. The multiplexing chip U2 is TS3A 27518E-Q1. The pins 16 and 20 of the multiplexing chip U2 are connected to one ends of the resistor R5 and the resistor R6, respectively. The other ends of the resistor R5 and the resistor R6 are connected with the 3.3V output end 3.3V of the power circuit. The 5 pins of the multiplexing chip U2 are connected with the cathodes of the diode D3 and the diode D4; the anode of the diode D3 is connected with the 3.3V output end 3.3V of the power circuit. The anode of the diode D4 is connected with the auxiliary power supply input end PMOS of the TF card reading circuit. The data selection terminals (11 and 21 pins) of the multiplexing chip U2 are all connected to one end of the resistors R3, R4 and R7. The pin 17 of the multiplexing chip U2 is connected with one end of a resistor R8. The other end of the resistor R3 is connected to the power supply pin VUSB of the USB socket P1. The other end of the resistor R4 is connected with the auxiliary power supply input end PMOS of the TF card reading circuit. The other ends of the resistor R7 and the resistor R8 are grounded. The 8, 10, 12, 14, 15 and 13 pins of the multiplexing chip U2 are respectively connected with a first data terminal SD-D1, a second data terminal SD-D0, a clock terminal SD-CLK, a command terminal SD-CMD, a third data terminal SD-D3 and a fourth data terminal SD-D2 of the TF card reading circuit. Pins 20, 18 and 16 of the multiplexing chip U2 are respectively connected with an SPI master-output-slave communication end SPI _ MOSI, an SPI bus clock end SPI _ CLK and an SPI master-input-slave communication end SPI _ MISO of the master control circuit. Pins 1, 3, 4, 6, 7 and 9 of the multiplexing chip U2 are respectively a first common terminal COM1, a second common terminal COM2, a third common terminal COM3, a fourth common terminal COM4, a fifth common terminal COM5 and a sixth common terminal COM6 of the multiplexing circuit. The 5 pins of the multiplexing chip U2 are used as a TF card power supply terminal VSD of the multiplexing circuit. Pins 11 and 21 of multiplexing chip U2 are the data select terminals of multiplexing chip U2.

As shown in fig. 7, TF card circuit iii includes TF card socket U3. The 4 pins of the TF card holder U3 are connected with one end of the capacitor C4 and the TF card power supply end VSD of the multiplexing circuit. Pin 6 of TF socket U3 and the other end of capacitor C4 are both grounded. Pin 1 of the TF cassette U3 is connected to the first common terminal COM1 of the multiplexing circuit, pin 2 is connected to the second common terminal COM2 of the multiplexing circuit, pin 3 is connected to the third common terminal COM3 of the multiplexing circuit, pin 5 is connected to the fourth common terminal COM4 of the multiplexing circuit, pin 7 is connected to the fifth common terminal COM5 of the multiplexing circuit, and pin 8 is connected to the sixth common terminal COM6 of the multiplexing circuit.

When the data selection pins (11 and 21 pins) of the multiplexing chip U2 are set to low level, pins 1, 3, 4, 6, 7 and 9 of the multiplexing chip U2 are respectively connected with pins 23, 22, 20, 18, 16 and 19, and at this time, the TF card circuit iii is connected to the main control chip U6, so that the main control chip U6 can read the information in the TF card.

When the data selection pins (11 and 21 pins) of the multiplexing chip U2 are set to high level, pins 1, 3, 4, 6, 7 and 9 of the multiplexing chip U2 are respectively connected with pins 8, 10, 12, 14, 15 and 13, and at the moment, the TF card circuit III is connected to the card reader chip U4, so that an external device can read information in the TF card through the card reader chip U4.

The working principle of the utility model is as follows:

in the data storage state, the USB socket P1 in the TF card reading circuit is not connected to the upper computer through a USB data line. At this time, the data select terminal (pins 11 and 21) of the multiplexing chip U2 is at low level, so that the TF card circuit iii is connected to the main control circuit. The multiplexing chip U2 is powered by 3.3V output end 3.3V of the power circuit (5-pin input), and the target sensor connected with the main control chip U6 transmits the signal detected by the target sensor to the main control chip U6 in the main control circuit. The master control chip U6 adds the received signal with the time stamp read from the clock chip U6 and transmits the result to the TF card on the TF card circuit III for storage.

When an upper computer (PC end) needs to read data in the TF card circuit III, a worker connects a USB socket P1 in the TF card reading circuit with a USB data line for the upper computer, and at the moment, the TF card reading circuit starts to work under the voltage output by the upper computer; the data selection end (11 and 21 pins) of the multiplexing chip U2 is connected to the voltage output by the upper computer and is set to be at a high level, so that the TF card circuit III is connected with the TF card reading circuit; the multiplexing chip U2 is powered by the auxiliary power supply input end PMOS (5 pin input) of the TF card reading circuit. And the upper computer reads the data in the TF card through a card reader module U4 in the TF card reading circuit.

Claims

1. A sensor data reading device comprises a power supply circuit, a multiplexing circuit, a TF card reading circuit and a main control circuit; the method is characterized in that: the power supply circuit supplies power for the multiplexing circuit, the TF card reading circuit, the RTC clock circuit and the master control circuit;

The TF card reading circuit comprises a card reader chip and a USB socket; the model of the card reader chip is GLK 823; the 16 pins of the card reader chip are connected with one end of a resistor R10; the other end of the resistor R10 is connected with a D + communication pin of the USB socket; a pin 15 of the card reader chip is connected with one end of a resistor R11; the other end of the resistor R11 is connected with a D-communication pin of the USB socket; the 10 pins of the card reader chip are connected with the power supply pins of the USB socket; the 2 pin of the card reader chip is a first data end of the TF card reading circuit, the 3 pin is a second data end of the TF card reading circuit, the 4 pin is a clock end of the TF card reading circuit, the 5 pin is a command end of the TF card reading circuit, the 6 pin is a third data end of the TF card reading circuit, and the 7 pin is a fourth data end of the TF card reading circuit; the 8 pins of the card reader chip are the auxiliary power supply input end of the TF card reading circuit;

The multiplexing circuit comprises a multiplexing chip; the model of the multiplexing chip is TS3A 27518E-Q1; pins 16 and 20 of the multiplexing chip are respectively connected with one ends of a resistor R5 and a resistor R6; the other ends of the resistor R5 and the resistor R6 are connected with the 3.3V output end of the power circuit; the 5 pins of the multiplexing chip are connected with the cathodes of the diode D3 and the diode D4; the anode of the diode D3 is connected with the 3.3V output end of the power circuit; the anode of the diode D4 is connected with the auxiliary power supply input end of the TF card reading circuit; one end of a data selection termination resistor R3 and a resistor R7 of the multiplexing chip; the pin 17 of the multiplexing chip is connected with one end of a resistor R8; the other end of the resistor R3 is connected with a power supply pin of the USB socket; the other ends of the resistor R7 and the resistor R8 are grounded; pins 8, 10, 12, 14, 15 and 13 of the multiplexing chip are respectively connected with a first data end, a second data end, a clock end, a command end, a third data end and a fourth data end of the TF card reading circuit; pins 20, 18 and 16 of the multiplexing chip are respectively connected with an SPI master output and slave input communication end, an SPI bus clock end and an SPI master input and slave output communication end of the master control circuit; pins 1, 3, 4, 6, 7 and 9 of the multiplexing chip are respectively a first common end, a second common end, a third common end, a fourth common end, a fifth common end and a sixth common end of the multiplexing circuit; the 5 pins of the multiplexing chip are used as the TF card power supply end of the multiplexing circuit;

The TF card circuit comprises a TF card seat; and a pin 1 of the TF card holder is connected with a first common end of the multiplexing circuit, a pin 2 is connected with a second common end of the multiplexing circuit, a pin 3 is connected with a third common end of the multiplexing circuit, a pin 5 is connected with a fourth common end of the multiplexing circuit, a pin 7 is connected with a fifth common end of the multiplexing circuit, and a pin 8 is connected with a sixth common end of the multiplexing circuit.

2. A sensor data reading apparatus according to claim 1, wherein: one end of a 10 pin of the card reader chip is connected with the capacitor C7, a 12 pin is connected with the cathode of the light emitting diode D1, and pins 9 and 13 are connected with the anode of the light emitting diode D1; the 8-pin of the card reader chip is connected with one end of the capacitor C5; the pins 1 and 14 of the card reader chip, the ground pin of the USB socket, the other ends of the capacitor C5 and the capacitor C7 are all grounded.

3. A sensor data reading apparatus according to claim 1, wherein: one end of a data selection termination resistor R4 of the multiplexing chip; the other end of the resistor R4 is connected with the auxiliary power supply input end of the TF card reading circuit.

4. A sensor data reading apparatus according to claim 1, wherein: the 4 pins of the TF card holder are connected with one end of a capacitor C4 and a TF card power supply end of the multiplexing circuit; the pin 6 of the TF card holder and the other end of the capacitor C4 are both grounded.

5. A sensor data reading apparatus according to claim 1, wherein: the power supply circuit comprises a switching power supply chip; the model of the switching power supply chip is TPS 7333Q; pins 3 and 4 of the switching power supply chip are connected with one ends of a capacitor C1 and a capacitor C2 and connected with external 5V voltage in parallel; the other ends of the pins 1 and 2 of the switching power supply chip, the capacitor C1 and the capacitor C2 are grounded; pins 5, 6 and 7 of the switching power supply chip are connected with one end of a resistor R1 and a capacitor C3, and pin 8 is connected with the other end of a resistor R1; the other end of the capacitor C3 is connected with one end of a resistor R2; the other end of the resistor R2 is grounded; pins 5, 6 and 7 of the switching power supply chip are used as the 3.3V output end of the power supply circuit.

6. A sensor data reading apparatus according to claim 1, wherein: the RTC clock circuit is also included; the RTC clock circuit comprises a clock chip and a button battery; the model of the clock chip is DS 3231; the 3 pin of the clock chip is connected with one end of a resistor R14; the 2 pin of the clock chip is connected with the other end of the capacitor C9 and the resistor R14 and the 3.3V output end of the power circuit; the other end of the capacitor C9 is grounded; the pin 15 of the clock chip is connected with one end of a resistor R12, and the pin 16 is connected with one end of a resistor R13; the other ends of the resistor R12 and the resistor R13 are connected with the 3.3V output end of the power circuit; the 14 pins of the clock chip are connected with one end of a capacitor C10 and the anode of the button cell; the other end of the capacitor C10 and the negative electrode of the button cell B1 are both grounded; pins 5, 6, 7, 8, 9, 10, 11, 12 and 13 of the clock chip are all grounded; the 15 pins and 16 pins of the clock chip are the I2C data terminal and the I2C clock terminal of the RTC clock circuit, respectively, and are connected to the I2C data terminal and the I2C clock terminal of the main control circuit, respectively.

7. a sensor data reading apparatus according to claim 1, wherein: the main control circuit comprises a main control chip; the main control chip adopts a single chip microcomputer with the model number of STM32F103VET 6; the pin 6 of the main control chip is connected with one end of the capacitor C11; the other end of the capacitor C11 is connected with the 3.3V output end 3.3V of the power circuit; a pin 12 of the main control chip is connected with one end of the crystal oscillator X1 and one end of the capacitor C12; a pin 13 of the main control chip is connected with the other end of the crystal oscillator X1 and one end of the capacitor C13; the other ends of the capacitor C12 and the capacitor C13 are grounded; pins 50, 75, 100, 28, 11, 21 and 22 of the main control chip are connected with the 3.3V output end of the power circuit, and pins 20, 49, 74, 99, 10 and 19 are all grounded; pin 30 of the main control chip is an SPI bus clock end of the main control circuit, pin 31 is an SPI master input and output communication end of the main control circuit, and pin 32 is an SPI master output and output communication end of the main control circuit; the 4 pins of the main control chip are the I2C clock end of the main control circuit, the 31 pin is the SPI master in and out communication end of the main control circuit, and the 2 pin is the I2C data end of the main control circuit.