CN209514377U - A kind of multifunctional vehicle bus module - Google Patents
A kind of multifunctional vehicle bus module Download PDFInfo
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- CN209514377U CN209514377U CN201920615362.XU CN201920615362U CN209514377U CN 209514377 U CN209514377 U CN 209514377U CN 201920615362 U CN201920615362 U CN 201920615362U CN 209514377 U CN209514377 U CN 209514377U
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Abstract
The utility model discloses a kind of multifunctional vehicle bus modules.The module includes: that module back has CPCI connector, connects external power supply and parallel bus；On-site programmable gate array FPGA is connected with CPCI connector；Digital signal processor DSP is connected with the FPGA, and module front panel is one male one female DB9 connector, is connected with the FPGA, and module size is the standard module of 3U or 6U.
Description
Technical field
The utility model relates to electronics electric control fields, more particularly, to a kind of multifunctional vehicle bus module.
Background technique
Train Communication Network (Train Communication Network, TCN) is between railroad train vehicle and vehicle
The data communication network of internal programmable equipment interconnection transmission control, detection and diagnostic message.It is more with the fast development of railway
Function vehicle bus (Multifunction Vehicle Bus, the MVB) important set of agreement as Train Communication Network (TCN)
At part, it is mainly used for the serial data communications busses between the interconnection equipment for having interoperability and interchangeability to require, it will
Standard device in same vehicle or different vehicle is connected to train communication.Its constant transmissions rate is 1.5Mbit/s.
Currently, MVB has become the key technology of high-speed power train control system, can be used for train status detection, fault diagnosis with
And the operation such as mobile unit exploitation and debugging.
MVB is based on applied to the dedicated bus communicated between the train control on board equipment such as subway train and large train
The network communication of each equipment room on IEC61375-1 protocol realization train.Current multifunctional vehicle bus module substantially uses
The special chip MVBC of Siemens or Pang Badi are realized, expensive.
In the related art, use site programmable gate array (Field-Programmable Gate Array,
FPGA) and ARM (Advanced RISC Machine) goes to realize the physical layer coding of MVB and IEC61375 agreement.
During realizing the application, inventor has found the prior art, and at least there are the following problems:
ARM updates fastly, and the product life cycle of the equipment on train and the maintenance time limit are usually more than 15 years, uses
The period of the update of ARM mismatches with the service life in train；
Train generallys use the non-standard multifunctional vehicle bus module realized with the interfaces such as PC104 or serial ports at present,
And multifunctional vehicle bus module can not directly be communicated with master cpu plate by bottom plate parallel bus, therefore can not be facilitated
It is installed on the 3U machine cage or 6U machine cage of mobile unit, wherein U indicates the unit of server external dimensions in server field, is
The abbreviation of Unit.
Utility model content
The utility model embodiment provides a kind of multifunctional vehicle bus module, and it is total to provide a kind of reduction multifunctional vehicle
The structure basis of the development cost of wire module.
The application provides a kind of multifunctional vehicle bus module, comprising:
Compact Peripheral Component Interconnect CPCI connector connects external power supply and parallel bus；
On-site programmable gate array FPGA is connected with CPCI connector；
Digital signal processor DSP is connected with the FPGA.
In one exemplary embodiment, the multifunctional vehicle bus module further includes memory, and the memory is logical
Parallel bus is crossed to be connected with the FPGA.
In one exemplary embodiment, the memory includes two dual port random access memory DPRAM.
In one exemplary embodiment, the multifunctional vehicle bus module is 3U or 6U standard module, the FPGA
It is connected by parallel bus with the CPCI connector, the CPCI connector is connected by parallel bus with master cpu plate.
In one exemplary embodiment, the CPCI connector is located on the bottom plate of multifunctional vehicle bus module.
In one exemplary embodiment, the multifunctional vehicle bus module further includes multifunctional vehicle bus (MVB)
Interface, abbreviation MVB interface, the MVB interface are located on the front panel of multifunctional vehicle bus module.
In one exemplary embodiment, the MVB interface includes the first MVB interface and the 2nd MVB interface；
First MVB interface is the male connector of DB9 categorical data interface connector；
2nd MVB interface is the female of DB9 categorical data interface connector.
In one exemplary embodiment, the multifunctional vehicle bus module further includes serial ports transmission chip, the string
Port transmission chip includes:
First RS485 chip is connected with the MVB interface of the DB9 type of the male connector and the FPGA；
2nd RS485 chip is connected with the MVB interface of the DB9 type of the female and the FPGA.
In one exemplary embodiment, the FPGA is for realizing the coding and decoding function to data in physical layer
Module.
In one exemplary embodiment, the DSP is for realizing link layer and its with the mould of the protocol function on upper layer
Block.
The multifunctional vehicle bus module of the utility model embodiment, providing a kind of reduces multifunctional vehicle bus module
The structure basis of development cost, can since sdlc chip is more than decades using the function that DSP substitution ARM is realized
The needs for meeting train service life effectively reduce the development cost of multifunctional vehicle bus module MVB entirety.
Other features and advantages of the utility model will illustrate in the following description, also, partly from specification
In become apparent, or understood and implementing the utility model.The purpose of this utility model and other advantages can pass through
Specifically noted structure is achieved and obtained in the specification, claims and drawings.
Detailed description of the invention
Attached drawing is used to provide to further understand technical solutions of the utility model, and constitutes part of specification,
It is used to explain the technical solution of the utility model together with embodiments herein, not constitute to technical solutions of the utility model
Limitation.
Fig. 1 is the schematic diagram of multifunctional vehicle bus module provided by the embodiments of the present application；
Fig. 2 is the schematic diagram of coding mode as defined in IEC61375-1 agreement provided by the embodiments of the present application；
Fig. 3 is the schematic diagram of DSP module provided by the embodiments of the present application；
Fig. 4 is another schematic diagram of multifunctional vehicle bus module provided by the embodiments of the present application.
Specific embodiment
For the purpose of this utility model, technical solution and advantage is more clearly understood, below in conjunction with attached drawing to this
The embodiment of utility model is described in detail.It should be noted that in the absence of conflict, embodiment in the application and
Feature in embodiment can mutual any combination.
Fig. 1 is the schematic diagram of multifunctional vehicle bus module provided by the embodiments of the present application.Module shown in Fig. 1, comprising:
Compact Peripheral Component Interconnect (Compact Peripheral Component Interconnect, CPCI) is even
Device is connect, external power supply and parallel bus are connected；
On-site programmable gate array FPGA is connected with CPCI connector；
Digital signal processor DSP is connected with the FPGA.
Module provided by the embodiments of the present application provides a kind of structure of development cost for reducing multifunctional vehicle bus module
Basis, the function of being realized using DSP substitution ARM can satisfy train and use week since sdlc chip is more than decades
The needs of phase.
In one exemplary embodiment, the FPGA is for realizing the coding and decoding function to data in physical layer
Module.
In the present example embodiment, FPGA realizes that function mainly encodes and parse data in physical layer, and will parsing
Data are sent to link layer module analysis protocol.MVB protocol communication rate is fixed as 1.5Mbps, frame format be divided into prime frame and
From two kinds of frame, coding-decoding operation is carried out using Manchester's code mode.Fig. 2 is IEC61375-1 provided by the embodiments of the present application
The schematic diagram of coding mode as defined in agreement.In one exemplary embodiment, the DSP be for realizing link layer and its with
The module of the protocol function on upper layer.
In this exemplary embodiment, dsp software mainly realizes the function of link layer and the above agreement.By function division
For 6 modules, it is respectively: configuration management module, parallel bus management module, MVB process data protocol module, MVB message count
According to protocol module, process data link layer interface module and message data link layer interface module.
Fig. 3 is the schematic diagram of DSP module provided by the embodiments of the present application.It is as shown in Figure 3:
Configuration management module, for configuration management MVB operation needed for various resources, mainly include DSP, parallel bus and
The configuration and management of MVB bus.
Parallel bus management module realizes the communication with master cpu for handling the order and data on parallel bus.
MVB process data protocol module realizes sending and receiving for process data for handling MVB protocol procedures data.
MVB message data protocol module realizes sending and receiving for message data for handling MVB protocol message data.
Process data link layer interface module realizes that process data is total in MVB for providing process data link layer interface
Link-layer sends and receivees.
Message data link layer interface module realizes that message data is total in MVB for providing message data link layer interface
Link-layer sends and receivees.
In the structure basis that Fig. 1 is provided, imports after realizing above-mentioned function, may be implemented multi-functional on FPGA and DSP
The normal work of vehicle bus module, the function of wherein realizing needed for FPGA and DSP can use code in the prior art into
Row is realized.
Fig. 4 is another schematic diagram of multifunctional vehicle bus module provided by the embodiments of the present application.
In one exemplary embodiment, the multifunctional vehicle bus module further includes memory, and the memory is logical
Parallel bus is crossed to be connected with the FPGA.
In the present example embodiment, it realizes that memory is connected with FPGA by parallel bus, may be implemented multi-functional
FPGA carries out the purpose of reading and writing data using memory in vehicle bus module.
In one exemplary embodiment, the memory includes two dual port random access memory (Dual Port
Random-Access Memory, DPRAM).
In the present example embodiment, it by the Data Transmission Feature of dual port RAM, realizes logical with the parallel bus of CPU board
Letter.
In one exemplary embodiment, the multifunctional vehicle bus module is 3U or 6U standard module, the FPGA
It is connected by parallel bus with the CPCI connector, the CPCI connector is connected by parallel bus with master cpu plate.
It in the present example embodiment, can by setting multifunctional vehicle bus module to the standard module of 3U or 6U
To meet the 3U machine cage or 6U machine cage that are easily installed in mobile unit, meanwhile, by the transmission characteristic of parallel bus, realize FPGA
With the purpose of the data communication of external master cpu plate, wherein when FPGA sends data to master cpu plate, FPGA is from storage
Data are read in device, and the data are sent on external master cpu plate by CPCI connector；In FPGA from master control
When CPU board receives data, data on master cpu plate are received by CPCI connector, received data are saved to depositing
Reservoir.It by above-mentioned data interaction, can complete to be communicated with master cpu mainboard, realize that the data in module between unit pass
It is defeated.
In one exemplary embodiment, the CPCI connector is located on the bottom plate of multifunctional vehicle bus module.
In the present example embodiment, by the way that CPCI connector to be placed on, it is total to can be convenient multifunctional vehicle
The deployment and installation of component in wire module.
In one exemplary embodiment, the multifunctional vehicle bus module further includes MVB interface, is located at before MVB
On plate.
In the present example embodiment, by the way that MVB interface to be deployed on MVB front panel, it can be convenient multifunctional vehicle
The connection of bus module and external equipment
In one exemplary embodiment, the MVB interface includes the first MVB interface and the 2nd MVB interface；
First MVB interface is the male connector of DB9 categorical data interface connector；
2nd MVB interface is the female of DB9 categorical data interface connector.
In the present example embodiment, by DB9 categorical data interface connector, realize that the type of MVB interface is serial ports,
So as to be connected with the serial ports of equipment on train, the purpose for being installed on the machine cage of mobile unit is realized.
In one exemplary embodiment, the multifunctional vehicle bus module further includes serial ports transmission chip, the string
Port transmission chip includes:
First RS485 chip is connected with the MVB interface of the DB9 type of male connector and the FPGA；
2nd RS485 chip is connected with the MVB interface of the DB9 type of female and the FPGA.
In the present example embodiment, MVB interface and the FPGA composition of the DB9 type of the first RS485 chip and male connector
The MVB interface and FPGA of the DB9 type of one data transmission channel, the 2nd RS485 chip and female form another data
Transmission channel.
Module provided by the embodiments of the present application substitutes ARM using DSP, and DSP is widely used in industrial circle, chip life
Period more than decades, realizes the matching with train service life；In addition, module interface using bottom plate parallel bus mode,
Module size is designed as the standard module of 3U or 6U, can be easily installed in the existing mobile unit machine cage of vehicle, while supporting to lead
Control CPU module is accessed by bottom plate parallel bus, and real-time is good.
As shown in figure 4, the application provides the multifunctional vehicle bus of standard 3U and 6U realized using FPGA and DSP a kind of
Module is powered by bottom plate CPCI connector；Meanwhile bottom plate CPCI connector supports parallel bus, supports multifunctional vehicle total
It is communicated between wire module and master cpu plate by the parallel bus of bottom plate.Wherein, FPGA is realized as defined in IEC61375-1 agreement
The functions such as physical layer Manchester's code and decoding, DSP realize the protocol function of link layer or more, and wherein front panel is two
The MVB interface of DB9 is one male one female.In addition, the multifunctional vehicle bus module further includes two panels DPRAM, it is connected with FPGA,
For being communicated by parallel bus with the realization of master cpu plate, it is based on above structure, can be convenient multifunctional vehicle bus module peace
Inside vehicle-mounted automatic protection equipment ATP (Automatic Train Protection, ATP) equipment enclosure.
Multifunctional vehicle bus module provided by the embodiments of the present application replaces ARM to realize corresponding function, protects using DSP
The period for demonstrate,proving the update of multifunctional vehicle bus module matches with the service life in train；By the way that module size is designed
3U or 6U is installed on the 3U machine cage or 6U machine cage of mobile unit, realizes multifunctional vehicle bus module and master using parallel bus
Control CPU board is communicated.
In description in the present invention, it should be noted that term " on ", "lower", " side ", " other side ", " one
The orientation or positional relationship of the instructions such as end ", " other end ", " side ", " opposite ", " quadrangle ", " periphery ", " " mouth " word structure " is base
In orientation or positional relationship shown in the drawings, be merely for convenience of describing the present invention and simplifying the description, rather than indicate or
It implies that signified structure has specific orientation, is constructed and operated in a specific orientation, therefore should not be understood as practical new to this
The limitation of type.
In the description of the utility model embodiment unless specifically defined or limited otherwise, term " connection ", " directly
Connection ", " being indirectly connected with ", " being fixedly connected ", " installation ", " assembly " shall be understood in a broad sense, for example, it may be fixedly connected,
It can be and be detachably connected, or be integrally connected；Term " installation ", " connection ", " being fixedly connected " can be directly connected, can also
Indirectly connected through an intermediary, can be the connection inside two elements.For the ordinary skill in the art,
The concrete meaning of above-mentioned term in the present invention can be understood with concrete condition.
Although embodiment disclosed by the utility model is as above, the content only the utility model for ease of understanding
And the embodiment used, it is not intended to limit the utility model.Technical staff in any the utility model fields,
Under the premise of not departing from spirit and scope disclosed by the utility model, it can be carried out in the form and details of implementation any
Modification and variation, but the scope of patent protection of the utility model, the appended claims that must still be subject to are defined.
Claims (10)
1. a kind of multifunctional vehicle bus module characterized by comprising
Compact Peripheral Component Interconnect CPCI connector connects external power supply and parallel bus；
On-site programmable gate array FPGA is connected with CPCI connector；
Digital signal processor DSP is connected with the FPGA.
2. module according to claim 1, which is characterized in that the multifunctional vehicle bus module further includes memory,
The memory is connected by parallel bus with the FPGA.
3. module according to claim 2, which is characterized in that the memory includes two dual port random access memories
DPRAM。
4. module according to claim 1, which is characterized in that
The multifunctional vehicle bus module is 3U or 6U standard module, and the FPGA is connect by parallel bus with the CPCI
Device is connected, and the CPCI connector is connected by parallel bus with master cpu plate.
5. module according to any one of claims 1 to 4, which is characterized in that the CPCI connector is located at multifunctional vehicle
On the bottom plate of bus module.
6. module according to claim 5, which is characterized in that the multifunctional vehicle bus module further includes MVB interface,
The MVB interface is located on the front panel of multifunctional vehicle bus module.
7. module according to claim 6, it is characterised in that:
The MVB interface includes the first MVB interface and the 2nd MVB interface；
First MVB interface is the male connector of DB9 categorical data interface connector；
2nd MVB interface is the female of DB9 categorical data interface connector.
8. module according to claim 7, it is characterised in that:
The multifunctional vehicle bus module further includes serial ports transmission chip, and the serial ports transmission chip includes:
First RS485 chip is connected with the MVB interface of the DB9 type of the male connector and the FPGA；
2nd RS485 chip is connected with the MVB interface of the DB9 type of the female and the FPGA.
9. module according to claim 1, which is characterized in that the FPGA is for realizing the volume to data in physical layer
The module of code and decoding function.
10. module according to claim 1, which is characterized in that the DSP is for realizing link layer and its with upper layer
The module of protocol function.
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| CN201920615362.XU CN209514377U (en) | 2019-04-30 | 2019-04-30 | A kind of multifunctional vehicle bus module |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113810257A (en) * | 2021-11-19 | 2021-12-17 | 成都申威科技有限责任公司 | MVB communication control device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113810257A (en) * | 2021-11-19 | 2021-12-17 | 成都申威科技有限责任公司 | MVB communication control device |
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