CN209462408U - A kind of general processing platform - Google Patents
A kind of general processing platform Download PDFInfo
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- CN209462408U CN209462408U CN201822134870.4U CN201822134870U CN209462408U CN 209462408 U CN209462408 U CN 209462408U CN 201822134870 U CN201822134870 U CN 201822134870U CN 209462408 U CN209462408 U CN 209462408U
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Abstract
The utility model discloses a kind of general processing platforms, belong to electronic technology field, including motherboard, GPS daughter board, core daughter board and AD-FMCOMMS3-EBZ modulation /demodulation daughter board, solves the technical issues of general audio-video processing hardware platform, the utility model provides a kind of general audio-video processing hardware platform to specialize in personnel or military aspect, to adapt to a variety of input-output equipment and a variety of audio/video processing methods, most of interface modes of the compatible current mainstream of the input and output of audio, video data information, and various interfaces are all the bidirectional interfaces that existing input has output again, input and output can be combined with two different interface devices of unrestricted choice, plurality of devices can also be applied simultaneously, it is suitble to various exploitation needs, especially also add less radio-frequency modulation /demodulation interface, and frequency range and band It is wide all very big, it is able to satisfy most of application, currently a popular software radio is suitble to develop.
Description
Technical field
The utility model belongs to electronic technology field, in particular to a kind of general processing platform.
Background technique
Audio-video processing platform is a kind of special as core devices and equipped with input/output interface circuit using certain cpu chip
Door is for handling the hardware circuit board platform device of audio and video data information.CPU can be to audio, view by load software
The data informations such as frequency and picture carry out such as encoding and decoding, compression, decompression, format conversion processing, and audio-video and pictorial information are logical
The input of certain input interface is crossed, is sent out again by certain output interface after processing.Such as: input interface can be SDI interface,
After connecing high-definition camera, real-time audio and video data is inputted by camera and send HDMI interface to export to display after CPU is handled
Device shows real-time pictures, and digital camera, inputting video data, after CPU is handled, through network interface can also be connect by USB interface
Output is uploaded to internet, digital camera can also be connect from Cameralink input interface, shooting picture inputs CPU, through CPU
It send HDMI output interface that display is sent to show picture after processing, modulation /demodulation interface or transmitting less radio-frequency can also be passed through
Signal.In short, can have the different interfaces that outputs and inputs, the power of CPU processing capacity and place according to different applications
Reason software is also not quite similar.
The specific practical model of current such equipment has very much, suppose automobile data recorder, can be shot simultaneously by camera
The video information in certain time is recorded, is transferred when in case needing, closed circuit shooting and monitoring system, is inputted by camera for another example
Vision signal, the real-time pictures in monitoring place needed for being shown through display or TV, and be recorded on hard disk through computer, for
Access is transferred when needing, for another example network television-set top-set-box, it can be by the shadow video data of Web TV through set-top box processes solution
It is shown after tune on a television set, mobile phone can watch network movie TV programs etc. by 3G 4G wireless networking, and there are also one
Class application is exactly that the personnel that specialize in are development platform needed for doing the processing and program verification of audio, video data.
The hardware platform of the above equipment is all the dedicated platform to adapt to certain needs and exploitation, non-professional towards certain class
Medium and low-end users, but also have interface single, applicable surface is narrow, and program can not or be difficult to upgrade, and hardware capability does not wait by force limitation, i.e.,
It is to specialize in the development platform that developer uses there is also same problems, does not adapt to specialize in personnel and need a variety of inputs
The stronger CPU processor of output interface, function changes program at any time to test the needs such as function newly developed.
Utility model content
The purpose of the utility model is to provide a kind of general processing platforms, solve general audio-video processing hardware platform
The technical issues of.
To achieve the above object, the utility model uses following technical scheme:
A kind of general processing platform, including motherboard, GPS daughter board, core daughter board and AD-FMCOMMS3-EBZ modulatedemodulate tune
Plate；
Motherboard includes power supply chip, daughter board socket, UART serial interface, programming jtag interface and input/output interface；
Daughter board socket includes that GPS daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board are inserted
Seat；GPS daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket are equipped with several I/O interfaces；
Input/output interface includes SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel
TS-SPI interface, 10,/10,0/1,000,000,000 adaptive network interfaces, USB2.0 socket and SD memory card socket；
Core daughter board includes core daughter board plug, core FPGA and its peripheral circuit, DDR3 memory, FLASH memory, thousand
Million steel wire rack pieces, USB2.0 interface chip, core daughter board power supply power supply chip and aspect sensor, core daughter board pass through core daughter board
Plug is plugged on the core daughter board socket of motherboard, and core daughter board constitutes core by core daughter board plug and core daughter board socket
Center connector for substrate, SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel TS-SPI interface and
SD memory card socket passes through the different I/O ports of core daughter board connector connection core FPGA, and 10,/10,0/1,000,000,000 is adaptive
Network interface connects kilomega network chip by core daughter board connector, and USB2.0 socket connects USB2.0 by core daughter board connector and connects
Mouth chip；
Program the programming end that jtag interface connects core FPGA by core daughter board connector；
It is different that DDR3 memory, FLASH memory, kilomega network chip and USB2.0 interface chip are separately connected core FPGA
I/O port, core daughter board power supply are the power supply of core daughter board；
AD-FMCOMMS3-EBZ modulation /demodulation daughter board is equipped with AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug, AD-
FMCOMMS3-EBZ modulation /demodulation daughter board is plugged on the AD- of motherboard by AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug
On FMCOMMS3-EBZ modulation /demodulation daughter board socket；
GPS daughter board is equipped with GPS daughter board plug, and GPS daughter board is plugged on GPS daughter board socket by GPS daughter board plug.
Preferably, the model LSHM-150-04.0-L-DV- of the core daughter board socket and the core daughter board plug
A-S-K-TR matching connector, the AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket and the AD-FMCOMMS3-EBZ tune
The model of system demodulation daughter board plug is respectively ASP-134603-01 and ASP-134604-01 matching connector, the GPS daughter board
The model of socket and the GPS daughter board plug is respectively that Ff-20-1-1-5p-a-a-s-0 and Pf-20-1-1-5p-a-a-s-0 match
To connector.
Preferably, the model XC7Z045-FFG676ABX1641 of the core FPGA.
Preferably, the HDMI interface includes HDMI receiving interface and HDMI transmission interface, and HDMI receiving interface includes can
Programmed configurations interface chip ADV7611BSWZ-P is simultaneously equipped with HDMI_D type socket, and HDMI transmission interface includes that programmable configuration connects
Mouth chip ADV7511 is simultaneously equipped with HDMI_D type socket.
Preferably, the SDI interface includes SDI receiving interface and SDI transmission interface, and SDI receiving interface includes
LMH0394SQ chip is simultaneously equipped with SMA socket, and SDI transmission interface includes LMH0303SQ chip and is equipped with SMA socket.
Preferably, the kilomega network chip model is AR8035 chip, and 10,/10,0/1,000,000,000 adaptive network interfaces are inserted for RJ45
Seat, the model USB3320C-EZK chip of USB2.0 interface chip.
A kind of general processing platform described in the utility model solves the technology of general audio-video processing hardware platform
Problem, the utility model provides a kind of general audio-video processing hardware platform to specialize in personnel or military aspect, with suitable
A variety of input-output equipment and a variety of audio/video processing methods are answered, the compatible current mainstream of the input and output of audio, video data information
Most of interface modes, and various interfaces are all the bidirectional interfaces that existing input has output again, it can be with two differences of unrestricted choice
Interface equipment combines input and output, can also apply plurality of devices simultaneously, be suitble to various exploitation needs, especially also adds wireless
Radio-frequency modulations demodulate interface, and frequency range and bandwidth are all very big, are able to satisfy most of application, are suitble to stream at present
Capable software radio exploitation；The processing core of the audio, video data of the utility model is using the FPGA for being embedded in double-core ARM stone
Chip not only adapts to the format analysis processings needs such as different encoding and decoding and compression, but also is also adapted to different rates and data throughout need
It wants, realizes that different software need to be developed or be loaded to these purposes only or logical program achieves that；The utility model platform uses mould
Blockization design, except core daughter board be must be in addition to submodule, other submodules are optional module, can unrestricted choice as needed, with
Cost is reduced, it is versatile and easy to maintain；The kernel processor chip of the utility model platform selecting is all low-power consumption, is had
Power consumption and fever are reduced to effect, heat dissipation is simple, without designing complicated radiator structure part, increases the reliability of performance；This
Utility model platform be suitble to developer do various audio-videos in terms of exploitation and validation test, versatility is good, and scalability is strong.
Detailed description of the invention
Fig. 1 is the principles of the present invention figure block diagram；
Fig. 2 is the circuit diagram of the programmable configuration interface chip ADV7611BSWZ-P of the utility model；
Fig. 3 is the matched HDMI_D type socket of programmable configuration interface chip ADV7611BSWZ-P of the utility model
Circuit diagram；
Fig. 4 is the circuit diagram of the programmable configuration interface chip ADV7511 of the utility model；
Fig. 5 is the circuit diagram of the mating volume HDMI_D type socket of programmable configuration interface chip ADV7511 of the utility model；
Fig. 6 is the circuit diagram of the SDI transmission interface of the utility model；
Fig. 7 is the circuit diagram of the SDI receiving interface of the utility model；
Fig. 8 is the circuit diagram of the audiovisual compression data streams in parallel TS-SPI interface of the utility model；
Fig. 9 is the circuit diagram of the CamerLink interface of the utility model；
Figure 10 is the electricity of the first part of the LSHM-150-04.0-L-DV-A-S-K-TR matching connector of the utility model
Lu Tu；
Figure 11 is the electricity of the second part of the LSHM-150-04.0-L-DV-A-S-K-TR matching connector of the utility model
Lu Tu；
Figure 12 is the electricity of the Part III of the LSHM-150-04.0-L-DV-A-S-K-TR matching connector of the utility model
Lu Tu；
Figure 13 is the circuit diagram of the ASP-134603-01 of the utility model；
Figure 14 is the RJ45 socket of the utility model and the circuit diagram of network transformer HX5004NL；
Figure 15 is the circuit diagram of the SD memory card socket of the utility model；
Figure 16 is the circuit diagram of the USB power source protective switch MIC2025 of the utility model；
Figure 17 is the circuit diagram of the USB interface X13 of the utility model.
Specific embodiment
Such as a kind of general processing platform of Fig. 1, including motherboard, GPS daughter board, core daughter board and AD-FMCOMMS3-EBZ modulation
Demodulate daughter board；
Motherboard includes power supply chip, daughter board socket, UART serial interface, programming jtag interface and input/output interface；
Power supply power supply chip be wide-range direct current voltage input, DC voltage 5.5V-36V, provide 8V, 5V, 3.3V,
A variety of direct voltage outputs such as 2.5V, 1.8V, for different chips needs.
Daughter board socket includes that GPS daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board are inserted
Seat；GPS daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket are equipped with several I/O interfaces；
Input/output interface includes SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel
TS-SPI interface, 10,/10,0/1,000,000,000 adaptive network interfaces, USB2.0 socket and SD memory card socket；
Core daughter board includes core daughter board plug, core FPGA and its peripheral circuit, DDR3 memory, FLASH memory, thousand
Million steel wire rack pieces, USB2.0 interface chip, core daughter board power supply power supply chip and aspect sensor, core daughter board pass through core daughter board
Plug is plugged on the core daughter board socket of motherboard, and core daughter board constitutes core by core daughter board plug and core daughter board socket
Center connector for substrate, SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel TS-SPI interface and
SD memory card socket passes through the different I/O ports of core daughter board connector connection core FPGA, and 10,/10,0/1,000,000,000 is adaptive
Network interface connects kilomega network chip by core daughter board connector, and USB2.0 socket connects USB2.0 by core daughter board connector and connects
Mouth chip；
It is illustrated in figure 9 the circuit diagram of CamerLink interface, is as shown in figure 15 the circuit diagram of SD memory card socket；
Program the programming end that jtag interface connects core FPGA by core daughter board connector；
It is different that DDR3 memory, FLASH memory, kilomega network chip and USB2.0 interface chip are separately connected core FPGA
I/O port, core daughter board power supply are the power supply of core daughter board；
Fpga chip is embedded in two ARM stones, provides the place of two kinds of algorithms of software and logic to audio-video and image data
Function is managed, the needs of friction speed and data throughout are adapted to, logical operation speed is fast, but exploitation is difficult, if in ARM
Runs software, then speed is slightly slow, but adaptable, and exploitation is easier to, and can use ready-made many algorithms module and is spliced
Call, can be run in the case where having operating system and varying environment without operating system, the kilomega network that has except core board itself and
Outside USB2.0 interface, motherboard and the additional interface of other daughter boards program realization all in fpga logic, convenient, flexible, convenient for repairing
Change.
AD-FMCOMMS3-EBZ modulation /demodulation daughter board is equipped with AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug, AD-
FMCOMMS3-EBZ modulation /demodulation daughter board is plugged on the AD- of motherboard by AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug
On FMCOMMS3-EBZ modulation /demodulation daughter board socket；
AD-FMCOMMS3-EBZ modulation /demodulation daughter board be the prior art, AD-FMCOMMS3-EBZ modulation /demodulation daughter board be with
AD9361 chip be core, and equipped with twin-channel radio-frequency receiving-transmitting interface, monitoring interface and reference clock circuit, EEPROM,
The complete functional module of the compositions such as electric voltage observation circuit, power circuit, FMC socket.
AD9361 is radio frequency (RF) Agile of a high-performance towards 3G and 4G base station applies, high integration
Transceiver agile transceiver.The programmability and broadband ability of the device become the reason of a variety of transceiver applications
Want to select.The device integrates the front end RF and flexible mixed signal baseband part, integrates frequency synthesizer, mentions for processor
For can configure digital interface, imported to simplify design.
AD9361 operating frequency range is 70 MHz to 6.0 GHz, covers most of charter and unlicensed band, is propped up
The bandwidth chahnel range held is less than 200 kHz to 56 MHz.Two independent direct converting receiving devices possess premier
Noise coefficient and the linearity.Each reception (RX) subsystem is owned by independent automatic growth control (AGC), DC maladjustment school
Just, quadrature alignment and digital filter function, provide the necessity of these functions to eliminate in digital baseband.
AD9361 also possesses flexible manual gain mode, supports external control.Carry two high dynamic ranges in each channel
ADC is enclosed, the I signal received and Q signal are first subjected to digitized processing, are then transmitted through configurable decimation filter and 128
As a result tap finite impulse response (FIR) filter generates 12 output signals with corresponding sample rate.
GPS daughter board is equipped with GPS daughter board plug, and GPS daughter board is plugged on GPS daughter board socket by GPS daughter board plug.
The utility model GPS daughter board plug is 5 common needle standard sockets, can match most of GPS module in the market,
Function when GPS module mainly provides standard school.
Preferably, the model LSHM-150-04.0-L-DV- of the core daughter board socket and the core daughter board plug
A-S-K-TR matching connector, the utility model is since port is more, so using 3 couples of LSHM-150-04.0-L-DV-A-S-
K-TR matching connector, i.e. first of the LSHM-150-04.0-L-DV-A-S-K-TR matching connector as shown in Figure 10-Figure 12
Partially, second part and Part III, the AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket and the AD-FMCOMMS3-
The model of EBZ modulation /demodulation daughter board plug is respectively ASP-134603-01 and ASP-134604-01 matching connector, described
The model of GPS daughter board socket and the GPS daughter board plug is respectively Ff-20-1-1-5p-a-a-s-0 and Pf-20-1-1-5p-a-
A-s-0 matching connector.
Preferably, the model XC7Z045-FFG676ABX1641 of the core FPGA.
Preferably, the HDMI interface includes HDMI receiving interface and HDMI transmission interface, HDMI as shown in Figures 2 and 3
Receiving interface includes programmable configuration interface chip ADV7611BSWZ-P and is equipped with HDMI_D type socket, as shown in Figure 4 and Figure 5
HDMI transmission interface includes programmable configuration interface chip ADV7511 and is equipped with HDMI_D type socket.
Preferably, the SDI interface includes SDI receiving interface and SDI transmission interface, as shown in fig. 7, SDI receiving interface
Including LMH0394SQ chip and it is equipped with SMA socket, as shown in fig. 6, SDI transmission interface includes LMH0303SQ chip and is equipped with
SMA socket.
Preferably, the kilomega network chip model is AR8035 chip, and 10,/10,0/1,000,000,000 adaptive network interfaces are inserted for RJ45
Seat, the model USB3320C-EZK chip of USB2.0 interface chip.
As shown in figure 14, the 10/100/1000000000 of the utility model adaptive network interfaces further include network transformer
HX5004NL, network transformer HX5004NL connection RJ45 socket, kilomega network chip connect network transformer HX5004NL.
As shown in Figure 16 and Figure 17, the utility model is constituted using single channel panel switches MIC2025 and USB interface X13
USB2.0 socket.
A kind of general processing platform described in the utility model solves the technology of general audio-video processing hardware platform
Problem, the utility model provides a kind of general audio-video processing hardware platform to specialize in personnel or military aspect, with suitable
A variety of input-output equipment and a variety of audio/video processing methods are answered, the compatible current mainstream of the input and output of audio, video data information
Most of interface modes, and various interfaces are all the bidirectional interfaces that existing input has output again, it can be with two differences of unrestricted choice
Interface equipment combines input and output, can also apply plurality of devices simultaneously, be suitble to various exploitation needs, especially also adds wireless
Radio-frequency modulations demodulate interface, and frequency range and bandwidth are all very big, are able to satisfy most of application, are suitble to stream at present
Capable software radio exploitation；The processing core of the audio, video data of the utility model is using the FPGA for being embedded in double-core ARM stone
Chip not only adapts to the format analysis processings needs such as different encoding and decoding and compression, but also is also adapted to different rates and data throughout need
It wants, realizes that different software need to be developed or be loaded to these purposes only or logical program achieves that；The utility model platform uses mould
Blockization design, except core daughter board be must be in addition to submodule, other submodules are optional module, can unrestricted choice as needed, with
Cost is reduced, it is versatile and easy to maintain；The kernel processor chip of the utility model platform selecting is all low-power consumption, is had
Power consumption and fever are reduced to effect, heat dissipation is simple, without designing complicated radiator structure part, increases the reliability of performance；This
Utility model platform be suitble to developer do various audio-videos in terms of exploitation and validation test, versatility is good, and scalability is strong.
Claims (6)
1. a kind of general processing platform, it is characterised in that: including motherboard, GPS daughter board, core daughter board and AD-FMCOMMS3-EBZ
Modulation /demodulation daughter board；
Motherboard includes power supply chip, daughter board socket, UART serial interface, programming jtag interface and input/output interface；
Daughter board socket includes GPS daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket；GPS
Daughter board socket, core daughter board socket and AD-FMCOMMS3-EBZ modulation /demodulation daughter board socket are equipped with several I/O interfaces；
Input/output interface includes SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel TS-SPI
Interface, 10,/10,0/1,000,000,000 adaptive network interfaces, USB2.0 socket and SD memory card socket；
Core daughter board includes core daughter board plug, core FPGA and its peripheral circuit, DDR3 memory, FLASH memory, kilomega network
Chip, USB2.0 interface chip, core daughter board power supply power supply chip and aspect sensor, core daughter board pass through core daughter board plug
It is plugged on the core daughter board socket of motherboard, core daughter board constitutes core by core daughter board plug and core daughter board socket
Connector for substrate, SDI interface, HDMI interface, CamerLink interface, audiovisual compression data streams in parallel TS-SPI interface and SD are deposited
Card storage socket passes through the different I/O ports of core daughter board connector connection core FPGA, 10,/10,0/1,000,000,000 adaptive network interfaces
Kilomega network chip is connected by core daughter board connector, USB2.0 socket connects USB2.0 interface core by core daughter board connector
Piece；
Program the programming end that jtag interface connects core FPGA by core daughter board connector；
DDR3 memory, FLASH memory, kilomega network chip and USB2.0 interface chip are separately connected the different IO of core FPGA
Mouthful, core daughter board power supply is the power supply of core daughter board；
AD-FMCOMMS3-EBZ modulation /demodulation daughter board is equipped with AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug, AD-
FMCOMMS3-EBZ modulation /demodulation daughter board is plugged on the AD- of motherboard by AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug
On FMCOMMS3-EBZ modulation /demodulation daughter board socket；
GPS daughter board is equipped with GPS daughter board plug, and GPS daughter board is plugged on GPS daughter board socket by GPS daughter board plug.
2. a kind of general processing platform as described in claim 1, it is characterised in that: the core daughter board socket and the core
The model LSHM-150-04.0-L-DV-A-S-K-TR matching connector of daughter board plug, the AD-FMCOMMS3-EBZ modulation
Demodulate the model of daughter board socket model ASP-134603-01 and the AD-FMCOMMS3-EBZ modulation /demodulation daughter board plug
ASP-134604-01 matching connector, the GPS daughter board socket model Ff-20-1-1-5p-a-a-s-0 and GPS
The model Pf-20-1-1-5p-a-a-s-0 matching connector of plate plug.
3. a kind of general processing platform as described in claim 1, it is characterised in that: the model XC7Z045- of the core FPGA
FFG676ABX1641。
4. a kind of general processing platform as described in claim 1, it is characterised in that: the HDMI interface includes that HDMI connects
Mouth and HDMI transmission interface, HDMI receiving interface include programmable configuration interface chip ADV7611BSWZ-P and are equipped with HDMI_D
Type socket, HDMI transmission interface include programmable configuration interface chip ADV7511 and are equipped with HDMI_D type socket.
5. a kind of general processing platform as described in claim 1, it is characterised in that: the SDI interface includes SDI receiving interface
With SDI transmission interface, SDI receiving interface includes LMH0394SQ chip and is equipped with SMA socket, and SDI transmission interface includes
LMH0303SQ chip is simultaneously equipped with SMA socket.
6. a kind of general processing platform as described in claim 1, it is characterised in that: the kilomega network chip model is AR8035
Chip, 10,/10,0/1,000,000,000 adaptive network interfaces are RJ45 socket, the model USB3320C-EZK core of USB2.0 interface chip
Piece.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201822134870.4U CN209462408U (en) | 2018-12-19 | 2018-12-19 | A kind of general processing platform |
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| CN201822134870.4U CN209462408U (en) | 2018-12-19 | 2018-12-19 | A kind of general processing platform |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113905227A (en) * | 2021-10-18 | 2022-01-07 | 中国科学院长春光学精密机械与物理研究所 | Video processing chip aging device and method based on daisy chain |
-
2018
- 2018-12-19 CN CN201822134870.4U patent/CN209462408U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113905227A (en) * | 2021-10-18 | 2022-01-07 | 中国科学院长春光学精密机械与物理研究所 | Video processing chip aging device and method based on daisy chain |
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