CN209401023U - A kind of solid state hard disk for destroying function with rapid data - Google Patents
A kind of solid state hard disk for destroying function with rapid data Download PDFInfo
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- CN209401023U CN209401023U CN201920025703.8U CN201920025703U CN209401023U CN 209401023 U CN209401023 U CN 209401023U CN 201920025703 U CN201920025703 U CN 201920025703U CN 209401023 U CN209401023 U CN 209401023U
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Abstract
The utility model provides a kind of solid state hard disk that function is destroyed with rapid data, including pcb board and the master controller being arranged on pcb board, NAND FLASH and power circuit, data destroying control circuit, pcb board meets PCIE M.2 consensus standard, data destroying control circuit is integrated into master controller, any one of data/address bus PCIE, UART and I2C.Data destroying can arrange hardware signal triggering by outside, and the software signal that agreement can also be sent by host computer triggers；Master controller, which receives, to be immediately performed scheduled rapid data after the destruction signal of agreement and destroys program, and all data of NAND FLASH storage inside are destroyed.The utility model easily realizes on PCIE M.2 hard disk rapid data and destroys function, can be to destroy the valid data of user, the effective protection data safety of user in the short time, and reduction is divulged a secret risk.
Description
Technical field
The utility model relates to solid state hard disk technical field, it is related to a kind of solid state hard disk of PCIE M.2 interface, specifically relates to
And a kind of PCIE M.2 solid state hard disk that function is destroyed with rapid data.
Background technique
With the fast development of electronic information technology, storage speed and just of the solid-state storage product because of its remote super mechanical hard disk
It takes performance and is widely used for Party and government offices, military project institutes and each large enterprises.With the development of the times, market to storage speed and
The requirement of portable performance is higher and higher, higher readwrite performance, smaller product size and more perfect security request data
So that the exploitation design difficulty of solid-state storage product is also increasing.
2.5 cun of hard disks of standard have enough spaces to place data destroying circuit, and M.2 hard disk comes without sufficient space
Place these circuits.
Utility model content
In order to solve the above-mentioned technical problem, data destroying control circuit is integrated into inside master controller by the utility model
Realize that the rapid data of M.2 hard disk destroys function.It is as follows using specific technical solution:
A kind of solid state hard disk for destroying function with rapid data, including pcb board and the main control being arranged on pcb board
Device, NAND FLASH and power circuit, data destroying control circuit, the pcb board meets PCIE M.2 consensus standard, described
Data destroying control circuit is integrated into master controller.
Further, the data/address bus for the data destroying control circuit that the master controller integrates is PCIE, UART and I2C
Any one of.
The master controller is main control unit, and the PCIE protocol command and management for parsing and responding host computer are hung
The NAND FLASH of load is also used to rapid data and destroys function management and realization；The NAND FLASH is solid state hard disk
Data storage cell, the write-in, reading and destruction etc. for realizing data for parsing and responding the order of master controller；Described
Power circuit is used for converting corresponding power supply to master controller and NAND FLASH.Data destroying principle are as follows:
Rapid data destroys function can arrange hardware signal triggering by outside, can also be sent and be arranged by host computer
Software signal triggering；Master controller, which receives, to be immediately performed scheduled rapid data after the destruction signal of agreement and destroys program,
Destroy all data of NAND FLASH storage inside.
Trigger signal is destroyed to need in advance with host computer agreement unanimously so that rapid data destruction function works normally.The pin
The general HD vendor's setting of trigger signal is ruined, client or upper computer end are set for destroying triggering according to this；It can also be by client
Or upper computer end proposes demand, the destruction that signal is master controller of destroying that then customer demand is arranged in HD vendor triggers letter
Number.Common hardware is destroyed some GPIO pin that trigger signal is master control and is dragged down 2 seconds, and it is one that common software, which destroys signal,
It is directed toward the order of fixed register.
The beneficial effects of the utility model are: rapid data is easily realized on PCIE M.2 hard disk destroys function,
It can be to destroy the valid data of user, the effective protection data safety of user in the short time, reduction is divulged a secret risk.
Detailed description of the invention
Fig. 1 is a kind of PCIE with rapid data destruction function of the utility model M.2 solid state hard disk structure chart, wherein
Data destroying control circuit has been integrated into master controller；
Fig. 2 is that the utility model rapid data destroys functional schematic.
Specific embodiment
Understand the purpose of this utility model, technical solution and advantage to be more clearly understood, below with reference to embodiment and
Attached drawing, the utility model is described in further detail, and the exemplary embodiment and its explanation of the utility model are only used for
It explains the utility model, is not intended to limit the scope of the present invention.
A kind of PCIE M.2 solid state hard disk for destroying function with rapid data, comprising pcb board 1 and is arranged on pcb board 1
Master controller 2, NAND FLASH3 and power circuit 4.
Pcb board 1 meets PCIE M.2 solid state hard disk standard requirements, the present embodiment according to Type 2280-S3-M interface and
The standard of PCIE3.0X4 bus is illustrated.
Master controller 2 be solid state hard disk main control unit, for parse and respond host computer PCIE protocol command and
The NAND FLASH 3 for managing rear end carry is also used to rapid data and destroys function management and realization.Master controller 2 and host computer
Between bus can also be comprising UART and I2C etc., the management for solid state hard disk.
NAND FLASH 3 is the data storage cell of solid state hard disk, and the order for parsing and responding master controller 2 comes
Realize write-in, reading and the destruction etc. of data.
Power circuit 4 be solid state hard disk power conversion unit, for by PCIE M.2 hard disk 3.3V external power supply turn
It is changed to master controller 2 and NAND FLASH 3 works required power supply.
Pcb board 1 and the master controller 2 being arranged on pcb board 1, NAND FLASH3 and power circuit 4 combine can
To realize the basic function of PCIE M.2 solid state hard disk.
Rapid data described in the utility model destroys function operation, and steps are as follows:
M.2 solid state hard disk is powered on and is initialized 1.PCIE, starts to work normally；
2. agreement hardware signal or host computer that host computer is issued by M.2 pin are sent by PCIE or UART or I2C
Agreement software signal to master controller 2；
3. master controller 2 receives and judges whether hardware or software signal are consistent with previously arranged signal；
4. destroying program according to scheduled rapid data if consistent destroys all data stored in NAND FLASH 3；
5. rapid data destruction terminates, all data of hard drive internal have been destroyed and can not have been restored.
Above-mentioned hardware signal after simple level conversion by being connected on the GPIO pin of master controller 2, main control
Device judges whether the signal on the GPIO is consistent with agreement and destroys function to determine whether to execute rapid data.
Above-mentioned software signal is generated by host computer, and PCIE or UART by being connected with host computer and master controller 2
Or I2C bus interface is sent to master controller 2, master controller judges whether the protocol signal is consistent with agreement and determines whether to hold
Row rapid data destroys function.
Above-mentioned data destroying is realized by the data inside erasing NAND FLASH 3, general only to wipe storage inside
All customer data come shorten destroy the time.
Claims (2)
1. a kind of solid state hard disk for destroying function with rapid data, including pcb board and the master controller being arranged on pcb board,
NAND FLASH and power circuit, the pcb board meet PCIE M.2 consensus standard characterized by comprising data destroying
Control circuit, the data destroying control circuit are integrated into master controller.
2. a kind of solid state hard disk for destroying function with rapid data according to claim 1 characterized by comprising
The data/address bus for the data destroying control circuit that the master controller integrates is any one of PCIE, UART and I2C.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920025703.8U CN209401023U (en) | 2019-01-07 | 2019-01-07 | A kind of solid state hard disk for destroying function with rapid data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201920025703.8U CN209401023U (en) | 2019-01-07 | 2019-01-07 | A kind of solid state hard disk for destroying function with rapid data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209401023U true CN209401023U (en) | 2019-09-17 |
Family
ID=67898038
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201920025703.8U Active CN209401023U (en) | 2019-01-07 | 2019-01-07 | A kind of solid state hard disk for destroying function with rapid data |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209401023U (en) |
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2019
- 2019-01-07 CN CN201920025703.8U patent/CN209401023U/en active Active
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