CN209299561U - DALI interface cut phase circuit for detecting - Google Patents
DALI interface cut phase circuit for detecting Download PDFInfo
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- CN209299561U CN209299561U CN201821484252.6U CN201821484252U CN209299561U CN 209299561 U CN209299561 U CN 209299561U CN 201821484252 U CN201821484252 U CN 201821484252U CN 209299561 U CN209299561 U CN 209299561U
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Abstract
The utility model provides a kind of DALI interface cut phase circuit for detecting, including signal transmitting module, constant flow module, signal adjusting module, signal receiving module, alternating-current power supply, detecting phase module and switch module；The constant flow module connects the concurrent electric signals of signal transmitting module to the signal transmitting module；The signal adjusting module includes a signal controller, and the signal controller reaches the time of the constant flow module according to preset frequency control feedback signal；The signal receiving module connects the signal transmitting module and sends feedback signal identical with electric signal waveform to the signal adjusting module；The detecting phase module is connected between the cathode and switch module of the alternating-current power supply, and the switch module is connected between the detecting phase module and the signal transmitting module；The square wave for being not easily susceptible to interference relevant to phase can be obtained using the technical program.
Description
Technical field
The utility model relates to a kind of DALI interface cut phase circuit for detecting.
Background technique
Requirement with people to quality of the life is higher and higher, and LED illumination tool of the people to life most frequently is wanted
Ask also higher and higher, people are also higher and higher to the needs of the LED lamp of tunable optical.The LED lamp of existing tunable optical is being adjusted
In the realization of light function, there are many methods, and in recent years, DALI agreement is gradually promoted, and is used in more and more widely
In LED light adjusting circuit.With reference to prior art CN207410561, this scheme constitutes constant current by triode Q101 and triode Q102
Module, constant flow module connection signal sending module PC102 send a signal to signal transmitting module PC102.This technology thus much one
Constant flow module, interferes larger in power grid, when a variety of powerful devices of electricity load, is influenced by mains waveform, to interfere with defeated
Enter the signal of signal transmitting module PC102, to make the acquisition jitter of control unit, control unit is caused to judge by accident, it is whole
A system is unstable.
Utility model content
The purpose of the utility model is to overcome above-mentioned deficiencies in the prior art, provide a kind of DALI interface cut phase detecting
Circuit obtains the square wave for being not easily susceptible to interference relevant to phase.
In order to solve the above-mentioned technical problem, the utility model provides a kind of DALI interface cut phase circuit for detecting, including letter
Number sending module, constant flow module, signal adjusting module, signal receiving module, alternating-current power supply, detecting phase module and switching molding
Block；The constant flow module connects the concurrent electric signals of signal transmitting module to the signal transmitting module；The signal tune
Mould preparation block includes a signal controller, and feedback signal reaches the constant flow module by signal controller and controls the constant current mould
Block sends electric signal, and the signal controller reaches the time of the constant flow module according to preset frequency control feedback signal, makes
The electric signal waveform logic high time that the constant flow module is sent meets predetermined value；Described in the signal receiving module connection
Signal transmitting module simultaneously sends feedback signal identical with electric signal waveform to the signal adjusting module；The detecting phase mould
Block is connected between the cathode and switch module of the alternating-current power supply, and the switch module is connected to the detecting phase module
Between the signal transmitting module；When the detecting phase module detects certain voltage, the switch module is opened, institute
It states signal transmitting module and sends or do not send signal.
In a preferred embodiment, the detecting phase module is specially a ghyristor circuit, the switch module tool
Body is a switching tube, and the signal transmitting module includes receiving interface and transmission interface；When the ghyristor circuit detects one
When constant voltage, the switching tube conducting, the receiving interface signal is pulled low, and the transmission interface does not send signal.
In a preferred embodiment, the ghyristor circuit includes a triode thyrister, the first detecting resistance, second
Detect resistance, detecting capacitor；The triode thyrister includes anode, cathode, control electrode；The anode connects the alternating current
Power supply, the first detecting resistance are connected between the anode and control electrode, and the second detecting resistance is connected to the yin
Between pole and control electrode；The detecting capacitance connection is in the both ends of the second detecting resistance；The switching tube connects the yin
Pole；When the voltage of the control electrode reaches certain voltage value, the anode is connected with cathode, and the switching tube receives high level and leads
It is logical.
It further include the first deferred mount and one second deferred mount in a preferred embodiment；The signal controller
Including a first switch and a second switch；First deferred mount is connected to the signal receiving module and opens with described first
Between pass, second deferred mount is connected between the signal receiving module and the second switch；First delay
Device and the second deferred mount receive feedback signal before feedback signal enters the first switch and second switch, and delay is anti-
Feedback signal enters the time of the signal controller.
In a preferred embodiment, the first switch is specially one first triode Q104, the second switch tool
Body is a NMOS tube Q103；The grid of the NMOS tube Q103 connects the signal receiving module and second deferred mount,
The drain electrode of the NMOS tube Q103 connects the constant flow module, the source electrode ground connection of the NMOS tube Q103；First triode
The base stage of Q104 connects first deferred mount and the signal receiving module, and the emitter of the first triode Q104 connects
It is connected between signal receiving module and the grid of the NMOS tube Q103, the grounded collector of the first triode Q104.
In a preferred embodiment, the signal receiving module sends feedback signal, when feedback signal is high level letter
Number when, the base stage of the first triode Q104 receives high level signal and is not turned on, and the grid of the NMOS tube Q103 receives high
Level signal is connected and sends high level signal to the constant flow module；When feedback signal is low level signal, described first
The base stage of triode Q104 receives low level signal conducting, is pulled low the grid level of the NMOS tube Q103, the NMOS
Pipe Q103 is not turned on.
In a preferred embodiment, first deferred mount, second deferred mount are respectively a first capacitor
C105 and one second capacitor C110；When feedback signal is high level signal, high level signal enters the first triode Q104
Before, it first charges to the first capacitor C105, after the first capacitor C105 is full of, high level signal passes through the described 1st
Pole pipe Q104, the first triode Q104 are not turned on；Meanwhile high level signal enters between the NMOS tube Q103, it is first right
The second capacitor C110 charging, after the second capacitor C110 is full of, high level signal enters the NMOS tube Q103；
When feedback signal is low level signal, the first capacitor C105 electric discharge, the first triode Q104 receives high
Level signal is not turned on, and when first capacitor C105 electric discharge terminates, the first triode Q104 does not receive high level signal
Be connected；Meanwhile the second capacitor C110 electric discharge, the NMOS tube Q103, which receives high level signal, to be continued to be connected, when described
Second capacitor C110 electric discharge terminates, and the NMOS tube Q103 does not receive high level signal.
In a preferred embodiment, the constant flow module includes one second triode Q101 and a third transistor
Q102；The base stage of the second triode Q101 connects the emitter of the third transistor Q102, second triode
The collector of Q101 connects the base stage of the third transistor Q102, and the collector of the third transistor Q102 connects the letter
Number sending module；The signal adjusting module be connected to the second triode Q101 base stage and the third transistor Q102
Emitter between.
In a preferred embodiment, when the drain electrode of the NMOS tube Q103 sends high level signal to the two or three pole
The base stage of pipe Q101, the second triode Q101 are not turned on, and the base level of the third transistor Q102 is pulled low, described
Third transistor Q102 conducting, the third transistor Q102 send high level signal to signal transmitting module；As the NMOS
When the drain electrode of pipe Q103 does not send high level signal, the second triode Q101 conducting, the base of the third transistor Q102
Pole receives high level signal, and the third transistor Q102 is not turned on, and the emitter of the third transistor Q102 sends low electricity
Ordinary mail number is to signal transmitting module.
In a preferred embodiment, the signal transmitting module, the signal receiving module are specially one first photoelectricity
Coupler PC102 and one second photoelectrical coupler PC101 and it is separately connected a control unit；The switching tube is specially the four or three
Pole pipe Q107；Receiving interface, that is, diode side of the first photoelectrical coupler PC102 connects the 4th triode Q107's
Collector；The constant flow module sends electric signal to the first photoelectrical coupler PC102, first photoelectrical coupler
The diode side of PC102 receives electric signal and is converted into optical signal, transmission interface, that is, CE of the first photoelectrical coupler PC102
Pole, which flanks the optical signal for receiving diode side transmission and is converted into electric signal, is sent to control unit；Described control unit sends telecommunications
Number to the second photoelectrical coupler PC101 diode side, diode side send optical signal, second photoelectrical coupler
The pole CE of PC101, which flanks to receive optical signal and be converted into electric signal i.e. feedback signal, is sent to the signal adjusting module；The perseverance
Flow module sending logic low and high level is constant；The signal adjusting module adjusts electric signal；Described in the ghyristor circuit control
4th triode Q107 on or off, when the 4th triode Q107 is connected, the two of the first photoelectrical coupler PC102
Pole pipe side signal is pulled low, when the 4th triode Q107 ends, the diode side letter of the first photoelectrical coupler PC102
Number transmission is unaffected；Described control unit receives the letter that the diode side from the first photoelectrical coupler PC102 is sent
Number be square wave signal.
Compared to the prior art, the technical solution of the utility model have it is following the utility model has the advantages that
The utility model provides a kind of DALI interface cut phase circuit for detecting, fills by first capacitor, the second capacitor
Discharge of electricity postpone the first triode, NMOS tube switch time come be precisely controlled feedback signal waveform rise time and decline and
The size of logic high-low level time makes feedback signal no matter input voltage is in that range that DALI agreement can be met
Under the premise of increase ghyristor circuit so that circuit increases a kind of anti-interference ability, output one it is relevant to phase not vulnerable to
To the square wave of the interference from alternating current, and does not need trigger voltage and can persistently work；DALI signaling interface can be done,
It may be used as 220VAC voltage interface, be used as a control signal, and function control is carried out to circuit；Guarantee that whole system is kept
Excellent operating status.
Detailed description of the invention
Fig. 1 is the circuit diagram of DALI interface cut phase circuit for detecting in the preferred embodiment in the utility model.
Specific embodiment
The utility model is described further below in conjunction with the drawings and specific embodiments.
A kind of DALI interface cut phase circuit for detecting, with reference to Fig. 1, comprising: signal transmitting module 6, constant flow module 5, signal tune
Mould preparation block, signal receiving module 7, alternating-current power supply, detecting phase module and switch module；The constant flow module 5 connects described
The concurrent electric signals of signal transmitting module 6 are to the signal transmitting module 6；The signal adjusting module is controlled including a signal
Device, feedback signal, which reaches constant flow module 5 by signal controller and controls constant flow module 5, sends electric signal, the signal control
Device reaches the time of constant flow module 5, the wave for the electric signal for sending the constant flow module 5 according to preset frequency control feedback signal
Shape up and down and logic high-low level time meet predetermined value；The signal receiving module 7 connects the signal transmitting module
6 and identical with electric signal waveform feedback signal is sent to the signal adjusting module.
Specifically, the detecting phase module is specially a ghyristor circuit, and the switch module is specially a switch
Pipe, the signal transmitting module 6 include receiving interface and transmission interface；When the ghyristor circuit detects certain voltage,
The switching tube conducting, the receiving interface signal are pulled low, and the transmission interface does not send signal.More specifically, institute
Stating ghyristor circuit includes a triode thyrister U103, the first detecting resistance R120, the second detecting resistance R121, detecting electricity
Hold；The triode thyrister U103 includes anode A, cathode K, control electrode G；The anode A connects the alternating-current power supply, institute
It states the first detecting resistance R120 to be connected between the anode A and control electrode G, the second detecting resistance R121 is connected to described
Between cathode K and control electrode G；The detecting capacitance connection is in the both ends of the second detecting resistance R121；The switching tube connects
Meet the cathode K；When the voltage of the control electrode G reaches certain voltage value, the anode A is connected with cathode K, the switching tube
Receive high level conducting.The resistance value decision certain voltage value of the first detecting resistance R120, the second detecting resistance R121
Size.
This programme further includes the first deferred mount 3 and one second deferred mount 4；The signal controller is opened including one first
Pass 1 and a second switch 2；First deferred mount 3 is connected between the signal receiving module 7 and the first switch 1,
Second deferred mount 4 is connected between the signal receiving module 7 and the second switch 2；First deferred mount 3
Feedback signal is received before feedback signal enters the first switch 1 and second switch 2 with the second deferred mount 4, delay is anti-
Feedback signal enters the time of the signal controller.
The first switch 1 is specially one first triode Q104, and the second switch 2 is specially a NMOS tube Q103；
The grid of the NMOS tube Q103 connects the signal receiving module 7 and second deferred mount 4, the NMOS tube Q103's
Drain electrode connects the constant flow module 5, the source electrode ground connection of the NMOS tube Q103；The base stage of the first triode Q104 connects institute
The first deferred mount 3 and the signal receiving module 7 are stated, the emitter of the first triode Q104 is connected to signal and receives mould
Between block 7 and the grid of the NMOS tube Q103, the grounded collector of the first triode Q104.
The signal receiving module 7 sends feedback signal, when feedback signal is high level signal, first triode
The base stage of Q104 receives high level signal and is not turned on, and the grid of the NMOS tube Q103 receives high level signal and is connected and sends height
Level signal is to the constant flow module 5；When feedback signal is low level signal, the base stage of the first triode Q104 is received
Low level signal conducting, is pulled low the grid level of the NMOS tube Q103, the NMOS tube Q103 is not turned on.
In order to make waveform up and down and the logic high-low level time of feedback signal meet predetermined value, described first prolongs
Slow device 3, second deferred mount 4 are respectively a first capacitor C105 and one second capacitor C110；
Concrete operating principle are as follows: when feedback signal is high level signal, high level signal enters first triode
It before Q104, first charges to the first capacitor C105, after the first capacitor C105 is full of, high level signal passes through described the
One triode Q104, the first triode Q104 are not turned on；Meanwhile high level signal enters before the NMOS tube Q103,
It first charges to the second capacitor C110, after the second capacitor C110 is full of, high level signal enters the NMOS tube Q103；
When feedback signal is low level signal, the first capacitor C105 electric discharge, the first triode Q104 receives high
Level signal is not turned on, and when first capacitor C105 electric discharge terminates, the first triode Q104 does not receive high level signal
Be connected；Meanwhile the second capacitor C110 electric discharge, the NMOS tube Q103, which receives high level signal, to be continued to be connected, when described
Second capacitor C110 electric discharge terminates, and the NMOS tube Q103 does not receive high level signal.It is precisely controlled by setting capacitance size
The waveform of feedback signal processed makes feedback signal meet DALI agreement.
In order to keep electric current constant in circuit, the constant flow module 5 includes one second triode Q101 and one the 3rd 3 pole
Pipe Q102；The base stage of the second triode Q101 connects the emitter of the third transistor Q102, second triode
The collector of Q101 connects the base stage of the third transistor Q102, and the collector of the third transistor Q102 connects the letter
Number sending module 6；The signal adjusting module is connected to the base stage and the third transistor of the second triode Q101
Between the emitter of Q102.
When the drain electrode of the NMOS tube Q103 sends the base stage of high level signal to the second triode Q101, described the
Two triode Q101 are not turned on, and the base level of the third transistor Q102 is pulled low, the third transistor Q102 conducting,
The third transistor Q102 sends high level signal to signal transmitting module 6；When the drain electrode of the NMOS tube Q103 is not sent
When high level signal, the second triode Q101 conducting, the base stage of the third transistor Q102 receives high level signal, institute
It states third transistor Q102 to be not turned on, the emitter of the third transistor Q102 sends low level signal to signal transmitting module
6。
The signal transmitting module 6, the signal receiving module 7 are specially one first photoelectrical coupler PC102 and 1 the
Two photoelectrical coupler PC101 and it is separately connected a control unit；The switching tube is specially the 4th triode Q107；Described 4th
The base stage of switching tube Q107 connects the cathode K, and the emitter of the 4th switching tube Q107 connects the alternating-current voltage source
Cathode；Receiving interface, that is, diode side of the first photoelectrical coupler PC102 connects the current collection of the 4th triode Q107
Pole；The constant flow module 5 sends electric signal to the first photoelectrical coupler PC102, the first photoelectrical coupler PC102's
Diode side receives electric signal and is converted into optical signal, and transmission interface, that is, pole CE of the first photoelectrical coupler PC102 flanks
It receives the optical signal that diode side is sent and is converted into electric signal and be sent to control unit；Described control unit sends electric signal to institute
The diode side of the second photoelectrical coupler PC101 is stated, diode side sends optical signal, the second photoelectrical coupler PC101's
The pole CE, which flanks to receive optical signal and be converted into electric signal i.e. feedback signal, is sent to the signal adjusting module；The constant flow module 5
Sending logic low and high level is constant；The signal adjusting module adjustment electric signal meets DALI agreement.When the electricity of the control electrode G
Pressure reaches certain voltage value, and the anode A be connected with cathode K, and the 4th triode Q107 reception high level is connected, and described the
When four triode Q107 are connected, the diode side signal of the first photoelectrical coupler PC102 is pulled low, as the control electrode G
Voltage when being not up to certain voltage value, the anode A is not turned on cathode K, the 4th triode Q107 cut-off, described the
The diode side signal of one photoelectrical coupler PC102 sends unaffected；Described control unit, which receives, comes from first photoelectricity
The signal that the diode side of coupler PC102 is sent is in square-wave signal, is a kind of signal for being not easy to be disturbed relevant to phase.
The utility model provides a kind of DALI interface cut phase circuit for detecting, is passing through first capacitor C105, the second capacitor
The charging and discharging of C110 postpones the first triode Q104, the switch time of NMOS tube Q105 is precisely controlled the waveform of feedback signal
The size of rise time and decline and logic high-low level time, make feedback signal no matter input voltage be in which range can
Increase ghyristor circuit under the premise of enough meeting DALI agreement so that circuit increases a kind of anti-interference ability, output one with
The relevant square wave for being not easily susceptible to the interference from alternating current of phase, and do not need trigger voltage and can persistently work；?
DALI signaling interface is done, 220VAC voltage interface is also used as, is used as a control signal, and function control is carried out to circuit
System；Guarantee that whole system keeps excellent operating status.The preferable specific embodiment of the above, only the utility model,
But the design concept of the present invention is not limited thereto, and anyone skilled in the art takes off in the utility model
In the technical scope of dew, the change of unsubstantiality is carried out to the utility model using this design, belongs to invade the utility model
The behavior of protection scope.
Claims (10)
1. a kind of DALI interface cut phase circuit for detecting, it is characterised in that adjust mould including signal transmitting module, constant flow module, signal
Block, signal receiving module, alternating-current power supply, detecting phase module and switch module；The constant flow module connects the signal hair
Send the concurrent electric signals of module to the signal transmitting module；The signal adjusting module includes a signal controller, feedback letter
Number the constant flow module is reached by signal controller and controls the constant flow module and send electric signal, the signal controller is pressed
The time of the constant flow module is reached according to preset frequency control feedback signal, the electric signal waveform for sending the constant flow module is patrolled
It collects high level time and meets predetermined value；The signal receiving module connects the signal transmitting module and sends and electric signal waveform
Identical feedback signal is to the signal adjusting module；The detecting phase module be connected to the cathode of the alternating-current power supply with
Between switch module, the switch module is connected between the detecting phase module and the signal transmitting module；When described
When detecting phase module detects certain voltage, the switch module is opened, and the signal transmitting module sends or do not send letter
Number.
2. DALI interface cut phase circuit for detecting according to claim 1, which is characterized in that the detecting phase module is specific
For a ghyristor circuit, the switch module is specially a switching tube, and the signal transmitting module includes receiving interface and transmission
Interface；When the ghyristor circuit detects certain voltage, the switching tube conducting, the receiving interface signal is pulled low,
The transmission interface does not send signal.
3. DALI interface cut phase circuit for detecting according to claim 2, which is characterized in that the ghyristor circuit includes one
Triode thyrister, the first detecting resistance, the second detecting resistance, detecting capacitor；The triode thyrister includes anode, yin
Pole, control electrode；The anode connects the alternating-current power supply, the first detecting resistance be connected to the anode and control electrode it
Between, the second detecting resistance is connected between the cathode and control electrode；The detecting capacitance connection is in second detecting
The both ends of resistance；The switching tube connects the cathode；When the voltage of the control electrode reaches certain voltage value, the anode with
Cathode conducting, the switching tube receive high level conducting.
4. DALI interface cut phase circuit for detecting according to claim 1, which is characterized in that further include the first deferred mount with
One second deferred mount；The signal controller includes a first switch and a second switch；The first deferred mount connection
Between the signal receiving module and the first switch, second deferred mount be connected to the signal receiving module with
Between the second switch；First deferred mount and the second deferred mount enter the first switch and the in feedback signal
Feedback signal is received before two switches, delayed feedback signal enters the time of the signal controller.
5. DALI interface cut phase circuit for detecting according to claim 4, which is characterized in that the first switch is specially one
First triode Q104, the second switch are specially a NMOS tube Q103；The grid of the NMOS tube Q103 connects the letter
The drain electrode of number receiving module and second deferred mount, the NMOS tube Q103 connects the constant flow module, the NMOS tube
The source electrode of Q103 is grounded；The base stage of the first triode Q104 connects first deferred mount and the signal receives mould
The emitter of block, the first triode Q104 is connected between signal receiving module and the grid of the NMOS tube Q103, institute
State the grounded collector of the first triode Q104.
6. DALI interface cut phase circuit for detecting according to claim 5, which is characterized in that the signal receiving module is sent
Feedback signal, when feedback signal is high level signal, the base stage of the first triode Q104 receives high level signal and does not lead
Logical, the grid of the NMOS tube Q103 receives high level signal and is connected and sends high level signal to the constant flow module；When anti-
When feedback signal is low level signal, the base stage of the first triode Q104 receives low level signal conducting, makes the NMOS tube
The grid level of Q103 is pulled low, and the NMOS tube Q103 is not turned on.
7. DALI interface cut phase circuit for detecting according to claim 6, which is characterized in that first deferred mount, institute
Stating the second deferred mount is respectively a first capacitor C105 and one second capacitor C110；It is high when feedback signal is high level signal
Level signal enters before the first triode Q104, first charges to the first capacitor C105, the first capacitor C105
After being full of, high level signal is not turned on by the first triode Q104, the first triode Q104；Meanwhile high level
Signal enters between the NMOS tube Q103, first charges to the second capacitor C110, high after the second capacitor C110 is full of
Level signal enters the NMOS tube Q103；
When feedback signal is low level signal, the first capacitor C105 electric discharge, the first triode Q104 receives high level
Signal is not turned on, and when first capacitor C105 electric discharge terminates, the first triode Q104 does not receive high level signal and leads
It is logical；Meanwhile the second capacitor C110 electric discharge, the NMOS tube Q103, which receives high level signal, to be continued to be connected, when described second
Capacitor C110 electric discharge terminates, and the NMOS tube Q103 does not receive high level signal.
8. the DALI interface cut phase circuit for detecting according to any one of claim 5-7, which is characterized in that the constant current
Module includes an one second triode Q101 and third transistor Q102；The base stage connection described the of the second triode Q101
The collector of the emitter of three triode Q102, the second triode Q101 connects the base stage of the third transistor Q102,
The collector of the third transistor Q102 connects the signal transmitting module；The signal adjusting module is connected to described second
Between the base stage of triode Q101 and the emitter of the third transistor Q102.
9. DALI interface cut phase circuit for detecting according to claim 8, which is characterized in that when the leakage of the NMOS tube Q103
Pole sends the base stage of high level signal to the second triode Q101, and the second triode Q101 is not turned on, the third
The base level of triode Q102 is pulled low, and the third transistor Q102 conducting, the third transistor Q102 sends high electricity
Ordinary mail number is to signal transmitting module；When the drain electrode of the NMOS tube Q103 does not send high level signal, second triode
The base stage of Q101 conducting, the third transistor Q102 receives high level signal, and the third transistor Q102 is not turned on, described
The emitter of third transistor Q102 sends low level signal to signal transmitting module.
10. DALI interface cut phase circuit for detecting described in any one of according to claim 1 to 7 or 9, which is characterized in that institute
State signal transmitting module, the signal receiving module is specially one first photoelectrical coupler PC102 and one second photoelectrical coupler
PC101 and it is separately connected a control unit；The switching tube is specially the 4th triode Q107；First photoelectrical coupler
Receiving interface, that is, diode side of PC102 connects the collector of the 4th triode Q107；The constant flow module sends telecommunications
Number to the first photoelectrical coupler PC102, the diode side of the first photoelectrical coupler PC102 receives electric signal and simultaneously converts
At optical signal, transmission interface, that is, pole CE of the first photoelectrical coupler PC102 flanks the optical signal of receipts diode side transmission simultaneously
It is converted into electric signal and is sent to control unit；Described control unit sends electric signal to the second photoelectrical coupler PC101's
Diode side, diode side send optical signal, and the pole CE of the second photoelectrical coupler PC101, which flanks, receives optical signal and be converted into
Electric signal, that is, feedback signal is sent to the signal adjusting module；The constant flow module sending logic low and high level is constant；It is described
Signal adjusting module adjusts electric signal；The ghyristor circuit controls the 4th triode Q107 on or off, and described the
When four triode Q107 are connected, the diode side signal of the first photoelectrical coupler PC102 is pulled low, the 4th triode
When Q107 ends, the diode side signal of the first photoelectrical coupler PC102 sends unaffected；Described control unit receives
The signal that diode side from the first photoelectrical coupler PC102 is sent is square wave signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821484252.6U CN209299561U (en) | 2018-09-11 | 2018-09-11 | DALI interface cut phase circuit for detecting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821484252.6U CN209299561U (en) | 2018-09-11 | 2018-09-11 | DALI interface cut phase circuit for detecting |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209299561U true CN209299561U (en) | 2019-08-23 |
Family
ID=67652922
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821484252.6U Active CN209299561U (en) | 2018-09-11 | 2018-09-11 | DALI interface cut phase circuit for detecting |
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| Country | Link |
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| CN (1) | CN209299561U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102019125445A1 (en) * | 2019-07-12 | 2021-01-14 | Erco Gmbh | Control gear |
-
2018
- 2018-09-11 CN CN201821484252.6U patent/CN209299561U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102019125445A1 (en) * | 2019-07-12 | 2021-01-14 | Erco Gmbh | Control gear |
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Effective date of registration: 20200415 Address after: Xinyang Industrial Park Haicang District of Xiamen City, Fujian province 361000 after Cheung Road No. 88 Co-patentee after: ZHEJIANG YANKON GROUP Co.,Ltd. Patentee after: XIAMEN YANKON ENERGETIC LIGHTING Co.,Ltd. Address before: Xinyang Industrial Park Haicang District of Xiamen City, Fujian province 361000 after Cheung Road No. 88 Co-patentee before: Xiamen Energetic Lighting Co.,Ltd. Patentee before: XIAMEN YANKON ENERGETIC LIGHTING Co.,Ltd. Co-patentee before: ZHEJIANG YANKON GROUP Co.,Ltd. |