CN209149292U - A kind of driving circuit - Google Patents
A kind of driving circuit Download PDFInfo
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- CN209149292U CN209149292U CN201821916608.9U CN201821916608U CN209149292U CN 209149292 U CN209149292 U CN 209149292U CN 201821916608 U CN201821916608 U CN 201821916608U CN 209149292 U CN209149292 U CN 209149292U
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- electrical level
- transferring chip
- level transferring
- communication bus
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Abstract
The utility model relates to a kind of driving circuits, including serial interface module, electrical level transferring chip and communication bus, the serial interface module is connect by electrical level transferring chip with communication bus, the second pin and third pin of electrical level transferring chip are shorted, using half-duplex operation, when the transmitting terminal of serial interface module is in high level, the enabled i.e. transmitter of third pin is enabled, and electrical level transferring chip is in transmission state；When the receiving end of serial interface module is in low level, the enabled i.e. receiver of the second pin is enabled, and electrical level transferring chip is in reception state；In order to guarantee the stability of circuit, the filter capacitor of response is increased separately in the first power end and second source end, while two unidirectional voltage-stabiliser tubes are set on communication bus, protection electrical level transferring chip is not damaged.
Description
Technical field
The utility model relates to electronic technology fields, more particularly to a kind of driving circuit.
Background technique
Half duplex series communication driving chip is the chip that the communications field is widely applied.By taking RS485 communication interface as an example,
The direction controlling end of RS485 is all to receive signal of communication using low level control chip, and high level control sends signal of communication, and
The same time can only allow a driving mouth to be in transmission state in bus, so when device drives or failure in bus not
Can be in transmission state, especially on-line joining process equipment when, therefore, for guarantee circuit stability and communication bus can
By being put forward new requirements in terms of property.
Utility model content
For overcome the deficiencies in the prior art, the utility model provides a kind of driving circuit.It is to be solved in the utility model
Technical problem is achieved through the following technical solutions:
The utility model embodiment provides a kind of driving circuit, including serial interface module, electrical level transferring chip and communication
Bus, the serial interface module are connect by electrical level transferring chip with communication bus, the transmitting terminal of the serial interface module
It is connect with the first pin of electrical level transferring chip, the receiving end of the serial interface module and the 4th pin of electrical level transferring chip
Connection, the enable end of the serial interface module and the second pin of electrical level transferring chip connect, and the electrical level transferring chip
The second pin and third pin be shorted；
The communication bus includes the first communication bus and the second communication bus, and the 6th pin of electrical level transferring chip connects
First communication bus, the 7th pin of electrical level transferring chip are connected to the second communication bus, the 5th pin of electrical level transferring chip
Ground terminal GND is connected, the 8th pin of electrical level transferring chip connects the first power end VCC1；Wherein, the first power end VCC1 and
It has been sequentially connected in series pull-up resistor R3, build-out resistor R4 and pull down resistor R5 between ground terminal GND, has been serially connected on the first communication bus
6th resistance R6, the 7th resistance R7 is serially connected on the second communication bus, and the 6th pin of electrical level transferring chip is connected to pull-up electricity
Between the connecting node and the 6th resistance R6 for hindering R3 and build-out resistor R4, the 7th pin of electrical level transferring chip is connected to drop-down electricity
Between the connecting node and the 7th resistance R7 for hindering R5 and build-out resistor R4；
Be provided with the first voltage-stabiliser tube D1 between 7th resistance R7 and the 7th pin of electrical level transferring chip, the 6th resistance R6 with
The second voltage-stabiliser tube D2 is provided between 6th pin of electrical level transferring chip.
In one embodiment of the utility model, the driving circuit further includes first resistor R1 and second resistance R2,
First resistor R1 is serially connected between the first pin of electrical level transferring chip and second source end VCC2, and second resistance R2 is serially connected with electricity
Between the 4th pin and second source end VCC2 of flat conversion chip, between the second source end VCC2 and ground terminal GND simultaneously
It is connected to first capacitor C1 and the second capacitor C2.
In one embodiment of the utility model, also gone here and there between first resistor R1 and the first pin of electrical level transferring chip
It is connected to the first indicator light L1, is also serially connected with the second indicator light L2 between second resistance R2 and the 4th pin of electrical level transferring chip.
In one embodiment of the utility model, the driving circuit further includes third capacitor C3, third capacitor C3 string
It connects between the first power end VCC1 and ground terminal GND.
The utility model has the following beneficial effects:
1, in the present embodiment, the second pin and third pin of electrical level transferring chip are shorted, using half-duplex operation,
When the transmitting terminal of serial interface module is in high level, the enabled i.e. transmitter of third pin is enabled, and electrical level transferring chip is in
Transmission state；When the receiving end of serial interface module is in low level, the enabled i.e. receiver of the second pin is enabled, level conversion
Chip is in reception state；In order to guarantee the stability of circuit, response is increased separately in the first power end and second source end
Filter capacitor, while two unidirectional voltage-stabiliser tubes are set on communication bus, protection electrical level transferring chip is not damaged.
Detailed description of the invention
Fig. 1 is driver circuit schematic diagram provided by the embodiment of the utility model.
Specific embodiment
To keep the above objects, features, and advantages of the utility model more obvious and easy to understand, with reference to the accompanying drawing to this
The specific embodiment of utility model is described in detail.
Embodiment one
As shown in Figure 1, Fig. 1 is driver circuit schematic diagram provided by the embodiment of the utility model.The driving circuit is responsible for handle
The signal that USART is sent changes into RS485 level nature, completes to convert by electrical level transferring chip here.
A simple declaration is done to 8 pins of electrical level transferring chip first:
First pin RO: receiver output end；
Second pin RE: receiver exports enable end, and low level is effective；
Third pin DE: transmitter exports enable end, and high level is effective；
4th pin DI: transmitter input terminal；
5th pin GND: connection ground terminal；
6th pin A, the 7th pin B: output end is connected respectively in the first communication bus of communication bus and second
Communication bus；
8th pin VCC: the first power end VCC1 of connection.
Secondly serial interface module is briefly described:
Serial interface module is used to connect microprocessor, specifically includes transmitting terminal A1, receiving end B1 and enable end C1, when
When the transmitting terminal A1 of serial interface module is in high level, enable end C1 keeps the enabled i.e. transmitter of third pin enabled, and level turns
It changes chip and is in transmission state；When the receiving end B1 of serial interface module is in low level, enable end C1 makes the second pin
It can be that receiver is enabled, electrical level transferring chip is in reception state.
Finally communication bus is briefly described:
Communication bus includes the first communication bus and the second communication bus, and the first communication bus and the second communication bus are distinguished
It is connected between electrical level transferring chip and intelligent electric meter, the data-interface as driving circuit.
In the present embodiment, electrical level transferring chip is the model produced by manufacturer SIPEX (Sipex Corporation)
The chip of SP3485.
Driving circuit provided by the embodiment of the utility model, including serial interface module, electrical level transferring chip and communication are total
Line, the serial interface module are connect by electrical level transferring chip with communication bus, the transmitting terminal of the serial interface module and
First pin of electrical level transferring chip connects, and the receiving end of the serial interface module and the 4th pin of electrical level transferring chip connect
It connecing, the enable end of the serial interface module and the second pin of electrical level transferring chip connect, and the electrical level transferring chip
Second pin and third pin are shorted；
The communication bus includes the first communication bus and the second communication bus, and the 6th pin of electrical level transferring chip connects
First communication bus, the 7th pin of electrical level transferring chip are connected to the second communication bus, the 5th pin of electrical level transferring chip
Ground terminal GND is connected, the 8th pin of electrical level transferring chip connects the first power end VCC1；Wherein, the first power end VCC1 and
It has been sequentially connected in series pull-up resistor R3, build-out resistor R4 and pull down resistor R5 between ground terminal GND, has been serially connected on the first communication bus
6th resistance R6, the 7th resistance R7 is serially connected on the second communication bus, and the 6th pin of electrical level transferring chip is connected to pull-up electricity
Between the connecting node and the 6th resistance R6 for hindering R3 and build-out resistor R4, the 7th pin of electrical level transferring chip is connected to drop-down electricity
Between the connecting node and the 7th resistance R7 for hindering R5 and build-out resistor R4；
Be provided with the first voltage-stabiliser tube D1 between 7th resistance R7 and the 7th pin of electrical level transferring chip, the 6th resistance R6 with
The second voltage-stabiliser tube D2 is provided between 6th pin of electrical level transferring chip.
The driving circuit further includes third capacitor C3, third capacitor C3 concatenation and the first power end VCC1 and ground terminal
Between GND.
Specifically, the transmitting terminal A1 of serial interface module and the first pin of electrical level transferring chip connect in this driving circuit
It connecing, controls the level height of the first pin, the receiving end B1 of serial interface module and the 4th pin of electrical level transferring chip connect,
The level height of the 4th pin is controlled, the enable end C1 of serial interface module and the second pin of electrical level transferring chip connect, and
The second pin and third pin of electrical level transferring chip are shorted, therefore electrical level transferring chip is in half-duplex operation.It is enabled
Holding C1 to be used to control, transmitter is enabled or receiver is enabled, so that electrical level transferring chip is in different working conditions.
It should be noted that flow process of the data in this driving circuit is as follows: the 6th resistance and the 7th resistance receive
The data of intelligent electric meter, data enter SP3485 chip from the 6th pin and the 7th pin, then in the first pipe from SP3485
Foot output, then arrives the transmitting terminal A1 of serial interface module, this interface is exactly the serial line interface for connecting microprocessor.Similarly from micro-
Processor sends data and is exported by the receiving end B1 of serial interface module, the 4th pin is then reached, into SP3485 chip.
Further, the 5th pin of electrical level transferring chip connects ground terminal GND, and the 8th pin connects the first power end
VCC1, wherein the voltage of the first power end VCC1 is 3.3V.6th pin and the 7th pin be separately connected the first communication bus and
Second communication bus, wherein the stability in order to guarantee circuit, is provided with third capacitor C3, third on the first power end VCC1
Capacitor C3 is filter capacitor, and in the present embodiment, third capacitor C3 is 0.1 microfarad filter capacitor；Further, the first power end
Be sequentially connected in series pull-up resistor R3, build-out resistor R4 and pull down resistor R5 between VCC1 and ground terminal GND, pull-up resistor R3 with match
The connecting node of resistance R4 is connected on the first communication bus, and the connecting node of pull down resistor R5 and build-out resistor R4 are connected to the
On two communication bus, wherein pull-up resistor R3 is 4.7 ohm, and pull down resistor R5 is 4.7 ohm, their effect is turned for level
When changing chip and being in idle condition, network failure protection is provided, the reliability of driving circuit is improved；Build-out resistor R4 is terminal
With resistance R4.Further, it is provided with the 7th resistance R7 on the first communication bus, the 6th resistance is provided on the second communication bus
R6。
In the present embodiment, it is provided with the second voltage-stabiliser tube D2 on the first communication bus, is provided with first on the second communication bus
Voltage-stabiliser tube D1, wherein the first voltage-stabiliser tube D1 and the second voltage-stabiliser tube D2 is unidirectional voltage-stabiliser tube, other end ground connection, it is therefore intended that
Protection communication bus is avoided by external interference.
Further, the driving circuit further includes first resistor R1 and second resistance R2, and first resistor R1 is serially connected with electricity
Between the first pin and second source end VCC2 of flat conversion chip, second resistance R2 is serially connected with the 4th pipe of electrical level transferring chip
Between foot and second source end VCC2, between the second source end VCC2 and ground terminal GND and it is connected to first capacitor C1 and
Two capacitor C2.
Wherein, also it is serially connected with the first indicator light L1 between first resistor R1 and the first pin of electrical level transferring chip, second
The second indicator light L2 is also serially connected between resistance R2 and the 4th pin of electrical level transferring chip.
Specifically, first capacitor C1 and the second capacitor C2 are in parallel, filter action is played, for protecting electrical level transferring chip to keep away
Exempt from excessive pressure damages.Be arranged between first resistor R1 and the first pin the first indicator light L1, second resistance R2 and the 4th pin it
Between the second indicator light L2 is set, when the first pin of communication module is in the conductive state, then second source end VCC2, first resistor
R1 and the first pin form access, and the first indicator light L1 is lighted, and communication module is in transmission state at this time；When the of communication module
Four pins are on device, then second source end VCC2, second resistance R2 and the 4th pin form access, the second indicator light L2
It lights, communication module is in reception state at this time.First resistor R1 and second resistance R2 play metering function, prevent electric current excessive
Indicator light is damaged, the first indicator light L1, the second indicator light L2 are LED light in the present embodiment.
The purpose of this utility model is to provide a kind of driving circuit, wherein the second pin and third of electrical level transferring chip
Pin is shorted, and using half-duplex operation, when the transmitting terminal of serial interface module is in high level, third pin is enabled i.e.
Transmitter is enabled, and electrical level transferring chip is in transmission state；When the receiving end of serial interface module is in low level, the second pipe
The enabled i.e. receiver of foot is enabled, and electrical level transferring chip is in reception state；In order to guarantee the stability of circuit, in the first power end
VCC1 and second source end VCC2 increases separately the filter capacitor of response, while two unidirectional pressure stabilizings being arranged on communication bus
Pipe, protection electrical level transferring chip are not damaged.
In conclusion specific case used herein is to a kind of embodiment of driving circuit provided by the utility model
It is expounded, the embodiment of the utility model that the above embodiments are only used to help understand and its core concept；Meanwhile
For those of ordinary skill in the art, based on the idea of the present invention, can in specific embodiments and applications
There is change place, in conclusion the content of the present specification should not be construed as a limitation of the present invention, the protection of the utility model
Range should be subject to appended claims.
Claims (4)
1. a kind of driving circuit, which is characterized in that including serial interface module, electrical level transferring chip and communication bus, the string
Line interface module is connect by electrical level transferring chip with communication bus, the transmitting terminal and level conversion core of the serial interface module
First pin of piece connects, and the receiving end of the serial interface module and the 4th pin of electrical level transferring chip connect, the string
Second pin of the enable end of line interface module and electrical level transferring chip connects, and the second pin of the electrical level transferring chip and
Third pin is shorted；
The communication bus includes the first communication bus and the second communication bus, the 6th pin connection first of electrical level transferring chip
Communication bus, the 7th pin of electrical level transferring chip are connected to the second communication bus, the 5th pin connection of electrical level transferring chip
8th pin of ground terminal (GND), electrical level transferring chip connects the first power end (VCC1)；Wherein, the first power end (VCC1)
Pull-up resistor (R3), build-out resistor (R4) and pull down resistor (R5) are sequentially connected in series between ground terminal (GND), the first communication is total
It is serially connected with the 6th resistance (R6) on line, the 7th resistance (R7), the 6th pipe of electrical level transferring chip are serially connected on the second communication bus
Foot is connected between the connecting node of pull-up resistor (R3) and build-out resistor (R4) and the 6th resistance (R6), electrical level transferring chip
7th pin is connected between the connecting node of pull down resistor (R5) and build-out resistor (R4) and the 7th resistance (R7)；
It is provided with the first voltage-stabiliser tube (D1) between 7th resistance (R7) and the 7th pin of electrical level transferring chip, the 6th resistance (R6)
The second voltage-stabiliser tube (D2) is provided between the 6th pin of electrical level transferring chip.
2. driving circuit according to claim 1, which is characterized in that the driving circuit further include first resistor (R1) and
Second resistance (R2), first resistor (R1) are serially connected between the first pin of electrical level transferring chip and second source end (VCC2),
Second resistance (R2) is serially connected between the 4th pin of electrical level transferring chip and second source end (VCC2), the second source end
(VCC2) between ground terminal (GND) and first capacitor (C1) and the second capacitor (C2) are connected to.
3. driving circuit according to claim 1, which is characterized in that the first of first resistor (R1) and electrical level transferring chip
It is also serially connected between pin the first indicator light (L1), is also concatenated between second resistance (R2) and the 4th pin of electrical level transferring chip
There is the second indicator light (L2).
4. driving circuit according to claim 1, which is characterized in that the driving circuit further includes third capacitor (C3),
Between third capacitor (C3) concatenation and the first power end (VCC1) and ground terminal (GND).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821916608.9U CN209149292U (en) | 2018-11-20 | 2018-11-20 | A kind of driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821916608.9U CN209149292U (en) | 2018-11-20 | 2018-11-20 | A kind of driving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN209149292U true CN209149292U (en) | 2019-07-23 |
Family
ID=67286756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821916608.9U Active CN209149292U (en) | 2018-11-20 | 2018-11-20 | A kind of driving circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN209149292U (en) |
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2018
- 2018-11-20 CN CN201821916608.9U patent/CN209149292U/en active Active
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