CN209148760U - A kind of locking amplifying device detecting small-signal - Google Patents
A kind of locking amplifying device detecting small-signal Download PDFInfo
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- CN209148760U CN209148760U CN201821907333.2U CN201821907333U CN209148760U CN 209148760 U CN209148760 U CN 209148760U CN 201821907333 U CN201821907333 U CN 201821907333U CN 209148760 U CN209148760 U CN 209148760U
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Abstract
The utility model proposes a kind of locking amplifying devices for detecting small-signal.The utility model is it is characterised by comprising: the first signaling interface, second signal interface, third signaling interface, the first attenuation network, the second attenuation network, adder, exchange amplification module, bandpass filtering modules block, triggering Shaping Module, phase sensitive detection module, low-pass filtering module, direct current amplification module, analog-to-digital conversion, FPGA, Keysheet module, LED display module.Compared with prior art, the utility model is low in cost, and cost performance is high；It can be by manually selecting setting multiple signals decaying amplification, convenient for meeting the different demands of user.
Description
Technical field
The utility model relates to Detection of Weak Signals fields more particularly to a kind of locking for detecting small-signal to amplify dress
It sets.
Background technique
Lock-in amplifier refers to a kind of voltmeter of signal amplitude and phase for being capable of measuring and being buried in noise.It is general to put
Big device also amplifies noise while amplified signal, thus cannot detect the signal being buried in noise, and lock-in amplifier
Noise suppressed can then be fallen while detecting amplified signal.It only detect with input signal with frequently, with phase signal (including
Noise).Due to the randomness of noise, have with frequency, with very little a possibility that phase noise, thus is greatly lowered.In electrochemistry
In measurement, it is commonly used to detection small-signal.
Utility model device adds multiple signals decaying on the basis of original lock-in amplifier and amplifies mould with multichannel
Block, convenient for meeting the use of different demands.
Utility model content
In order to solve the above-mentioned technical problem, the utility model proposes a kind of locking amplifying devices for detecting small-signal.
The technical solution of the utility model is a kind of locking amplifying device for detecting small-signal characterized by comprising
First signaling interface, second signal interface, third signaling interface, the first attenuation network, the second attenuation network, adder, exchange
Amplification module, bandpass filtering modules block, triggering Shaping Module, phase sensitive detection module, low-pass filtering module, direct current amplification module, mould
Number conversion, FPGA, Keysheet module, LED display module；
First signaling interface is connect with first attenuation network by conducting wire；First attenuation network with it is described
Adder is connected by conducting wire；The second signal interface is connect with second attenuation network by conducting wire；Described second declines
Subtract network and is connect with the adder by conducting wire；The adder, the exchange amplification module, the bandpass filtering modules block with
The phase sensitive detection module is sequentially connected in series by conducting wire；It is the phase sensitive detection module, the low-pass filtering module, described straight
Stream amplification module, the analog-to-digital conversion module are sequentially connected in series with the FPGA by conducting wire；The phase sensitive detection module with
The FPGA is connected by conducting wire；The third signaling interface is connect with the triggering Shaping Module by conducting wire；The triggering
Shaping Module is connect with the FPGA by conducting wire；The Keysheet module is connect with the FPGA by conducting wire；The LED is shown
Module is connect with the FPGA by conducting wire.
Preferably, first signaling interface is for receiving measured signal and being transmitted to first attenuation network；
Preferably, the second signal interface is for receiving noise signal and being transmitted to second attenuation network；
Preferably, the third signaling interface is for receiving reference signal and being transmitted to the triggering Shaping Module；
Preferably, measured signal after decaying measured signal and is input to described by first attenuation network for decaying
Adder, and possess the 20000 times and 2000 times two-way evanescent modes that can be manually selected；
Preferably, noise signal after decaying noise signal and is input to described by second attenuation network for decaying
Adder, and possess 20000 times, the 2000 times and 200 times three road evanescent modes that can be manually selected；
Preferably, the adder, which is added for measured signal after decaying with noise after decaying, generates composite signal biography
It is defeated by the exchange amplification module, and possesses the 200 times and 2000 times 2 road amplification modes that can be manually selected；
Preferably, the exchange amplification module by composite signal for amplifying and being transferred to the bandpass filtering mould
Block；
Preferably, the bandpass filtering modules block is used to filter out after amplification flip-flop in composite signal, low-frequency component
And the harmonic component of signal, for composite signal after bandpass filtering to be transmitted to the phase sensitive detection module；
Preferably, the triggering Shaping Module is used to reference signal triggering being shaped as square-wave signal and be transmitted to described
FPGA；
Preferably, the phase sensitive detection module be used for according to the amplitude of composite signal after bandpass filtering and with it is described
The phase difference between phase shift square-wave signal that FPGA is generated generates synthesis direct current signal and is transmitted to the low-pass filtering module；
Preferably, the low-pass filtering module is used to filter out the AC noise in synthesis direct current signal and is transmitted to described
Direct current amplification module；
Preferably, the direct current amplification module amplifies 16 times for synthesis direct current signal after filtering and is transmitted to described
Analog-to-digital conversion module；
Preferably, the analog-to-digital conversion module is converted to synthesis DC digital letter for synthesis direct current signal after amplifying
Number and be transmitted to the FPGA；
Preferably, the FPGA is used to receive the square-wave signal that the triggering Shaping Module generates, it is described for receiving
The keyboard control signals of Keysheet module, for generating phase shift square-wave signal according to keyboard control signals and square-wave signal and transmitting
To the phase sensitive detection module, for receiving synthesis DC digital signal, for according to keyboard control signals and synthesis direct current number
Word signal generates display screen control signal and is transmitted to the LED display module；
Preferably, the Keysheet module is used to generate keyboard control signals according to artificial button operation and be transmitted to described
FPGA；
It is shown preferably, the LED display module is used to control signal according to display screen.
Compared with prior art, the utility model is low in cost, and cost performance is high；It can be by manually selecting setting multiple signals
Decaying amplification, convenient for meeting the different demands of user.
Detailed description of the invention
Fig. 1: the structural block diagram of utility model device；
Fig. 2: the utility model attenuation network and adder circuit figure；
Fig. 3: the utility model ac amplifier circuit figure；
Fig. 4: the utility model bandwidth-limited circuit figure；
Fig. 5: the utility model phase-sensitive detection circuit figure；
Fig. 6: the utility model triggers shaping circuit figure；
Fig. 7: the utility model low pass filtered involves DC amplification circuit figure.
Specific embodiment
The utility model is understood and implemented for the ease of those of ordinary skill in the art, it is right with reference to the accompanying drawings and embodiments
The utility model is described in further detail, it should be understood that implementation example described herein is only used for describing and explaining this
Utility model is not used to limit the utility model.
As shown in Figure 1, Tthe utility model system structural block diagram.Referring to Fig.1, the technical solution of the utility model embodiment
For a kind of locking amplifying device for detecting small-signal characterized by comprising the first signaling interface, second signal interface, the
Three signaling interfaces, the first attenuation network, the second attenuation network, adder, exchange amplification module, bandpass filtering modules block, triggering are whole
Shape module, phase sensitive detection module, low-pass filtering module, direct current amplification module, analog-to-digital conversion, FPGA, Keysheet module, LED are shown
Module；First signaling interface is connect with first attenuation network by conducting wire；First attenuation network adds with described
Musical instruments used in a Buddhist or Taoist mass is connected by conducting wire；The second signal interface is connect with second attenuation network by conducting wire；Second decaying
Network is connect with the adder by conducting wire；The adder, the exchange amplification module, the bandpass filtering modules block and institute
Phase sensitive detection module is stated to be sequentially connected in series by conducting wire；The phase sensitive detection module, the low-pass filtering module, the direct current
Amplification module, the analog-to-digital conversion module are sequentially connected in series with the FPGA by conducting wire；The phase sensitive detection module and institute
FPGA is stated to connect by conducting wire；The third signaling interface is connect with the triggering Shaping Module by conducting wire；The triggering is whole
Shape module is connect with the FPGA by conducting wire；The Keysheet module is connect with the FPGA by conducting wire；The LED shows mould
Block is connect with the FPGA by conducting wire.
First signaling interface is for receiving measured signal and being transmitted to first attenuation network；
The second signal interface is for receiving noise signal and being transmitted to second attenuation network；
The third signaling interface is for receiving reference signal and being transmitted to the triggering Shaping Module；
First attenuation network is used to decay measured signal and measured signal after decaying is input to the adder, and
And possess the 20000 times and 2000 times two-way evanescent modes that can be manually selected；
Second attenuation network is used to decay noise signal and noise signal after decaying is input to the adder, and
And possess 20000 times, the 2000 times and 200 times three road evanescent modes that can be manually selected；
The adder is added described in generation composite signal is transferred to for noise after measured signal after decay and decaying
Amplification module is exchanged, and possesses the 200 times and 2000 times 2 road amplification modes that can be manually selected；
The exchange amplification module by composite signal for amplifying and being transferred to the bandpass filtering modules block；
The bandpass filtering modules block is used to filter out after amplification flip-flop in composite signal, low-frequency component and signal
Harmonic component, for composite signal after bandpass filtering to be transmitted to the phase sensitive detection module；
The triggering Shaping Module is used to reference signal triggering being shaped as square-wave signal and is transmitted to the FPGA；
What the phase sensitive detection module was used to generate according to the amplitude of composite signal after bandpass filtering and with the FPGA
Phase difference between phase shift square-wave signal generates synthesis direct current signal and is transmitted to the low-pass filtering module；
The low-pass filtering module is used to filter out the AC noise in synthesis direct current signal and is transmitted to the direct current amplification
Module；
The direct current amplification module amplifies 16 times for synthesis direct current signal after filtering and is transmitted to the analog-to-digital conversion
Module；
The analog-to-digital conversion module is converted to synthesis DC digital signal for synthesis direct current signal after amplifying and transmits
To the FPGA；
The FPGA is used to receive the square-wave signal that the triggering Shaping Module generates, for receiving the Keysheet module
Keyboard control signals, for generating phase shift square-wave signal according to keyboard control signals and square-wave signal and being transmitted to the phase sensitivity
Detection module, for receiving synthesis DC digital signal, for being generated according to keyboard control signals and synthesis DC digital signal
Display screen control signal is simultaneously transmitted to the LED display module；
The Keysheet module is used to generate keyboard control signals according to artificial button operation and is transmitted to the FPGA；
The LED display module is used to control signal according to display screen and be shown.
First signaling interface, second signal interface, third signaling interface type selecting are standard SMA interface；It is described
MPU FPGA uses EP4CE40F23C8；First attenuation network and the second attenuation network module are all made of π
Type decaying；The adder Module uses OPA228 chip；The exchange amplification module uses OPA228 chip；The band logical filter
Wave module uses OPA228 chip；The phase sensitive detection module uses OPA2227 and CD4053 chip；The triggering Shaping Module
Using OPA228 and TL3116 chip；The low-pass filtering module uses OPA192 chip；The direct current amplification module uses
OPA192 chip；The LED display module type selecting is OLED SH1106 display screen.
The embodiments of the present invention are introduced below with reference to Fig. 1 to Fig. 7.It connects and measured signal is accessed into first signal connects
Mouthful；Noise signal is accessed into the second signal interface；Reference signal is accessed into the third signaling interface.
Measured signal after decaying is simultaneously input to the adder by the first attenuation network decaying measured signal, and can
Manually select 20000 times and 2000 times of two-way evanescent mode；The second attenuation network decaying noise signal simultaneously will be after decaying
Noise signal is input to the adder, and can manually select 20000 times, 2000 times and 200 Bei tri- road evanescent modes；Institute
State adder measured signal after decaying is added with noise after decaying generate composite signal be transferred to it is described exchange amplification module, and
And 200 times and 2000 times of 2 road amplification modes can be manually selected；Composite signal is amplified and is passed by the exchange amplification module
It is defeated to arrive the bandpass filtering modules block；
The bandpass filtering modules block filters out the harmonic wave of flip-flop after amplification in composite signal, low-frequency component and signal
Composite signal after bandpass filtering is transmitted to the phase sensitive detection module by component；The triggering Shaping Module touches reference signal
Hair is shaped as square-wave signal and is transmitted to the FPGA；The phase sensitive detection module is according to the amplitude of composite signal after bandpass filtering
And the phase difference between the phase shift square-wave signal generated with the FPGA generates synthesis direct current signal and is transmitted to the low pass
Filter module；The low-pass filtering module filters out the AC noise in synthesis direct current signal and is transmitted to the direct current amplification mould
Block；The direct current amplification module will synthesize direct current signal and amplify 16 times and be transmitted to the analog-to-digital conversion module after filtering；It is described
Analog-to-digital conversion module will synthesize direct current signal and be converted to synthesis DC digital signal and be transmitted to the FPGA after amplification；It is described
FPGA receives the square-wave signal that the triggering Shaping Module generates, and the keyboard control signals of the Keysheet module is received, according to key
Disk control signal and square-wave signal generate phase shift square-wave signal and are transmitted to the phase sensitive detection module, receive synthesis direct current number
Word signal controls signal and is transmitted to the LED and show according to keyboard control signals and synthesis DC digital signal generation display screen
Show module；The phase for the phase shift square wave that the FPGA is generated with respect to reference signal can continuously stepping or 180 ° of phase shift, stepping spacing
It is 3 °；The measured signal that the LED display module is shown is measured when measured signal is superimposed with noise signal 1:1 and 1:10 is superimposed
The error of amplitude and actual web angle value is respectively less than 10%.
Although this specification has more used the first signaling interface, second signal interface, third signaling interface, first to decline
Subtract network, the second attenuation network, adder, exchange amplification module, bandpass filtering modules block, triggering Shaping Module, phase sensitive detection mould
The terms such as block, low-pass filtering module, direct current amplification module, analog-to-digital conversion, FPGA, Keysheet module, LED display module, but not
A possibility that excluding using other terms.The use of these items is only for more easily describing the essence of the utility model,
It is contrary to the spirit of the present invention to interpret them as any one of the additional limitations.
It should be understood that the part that this specification does not elaborate belongs to the prior art.
It should be understood that the above-mentioned description for preferred embodiment is more detailed, can not therefore be considered to this
The limitation of utility model patent protection scope, those skilled in the art are not departing under the enlightenment of the utility model
Under ambit protected by the claims of this utility model, replacement or deformation can also be made, the utility model is each fallen within
Within protection scope, the utility model is claimed range and should be determined by the appended claims.
Claims (2)
1. a kind of locking amplifying device for detecting small-signal, characterized by comprising: the first signaling interface, second signal connect
Mouth, third signaling interface, the first attenuation network, the second attenuation network, adder, exchange amplification module, bandpass filtering modules block, touching
Send out Shaping Module, phase sensitive detection module, low-pass filtering module, direct current amplification module, analog-to-digital conversion, FPGA, Keysheet module, LED
Display module；First signaling interface is connect with first attenuation network by conducting wire；First attenuation network and institute
Adder is stated to connect by conducting wire；The second signal interface is connect with second attenuation network by conducting wire；Described second
Attenuation network is connect with the adder by conducting wire；The adder, the exchange amplification module, the bandpass filtering modules block
It is sequentially connected in series with the phase sensitive detection module by conducting wire；It is the phase sensitive detection module, the low-pass filtering module, described
Direct current amplification module, the analog-to-digital conversion module are sequentially connected in series with the FPGA by conducting wire；The phase sensitive detection module
It is connect with the FPGA by conducting wire；The third signaling interface is connect with the triggering Shaping Module by conducting wire；The touching
Hair Shaping Module is connect with the FPGA by conducting wire；The Keysheet module is connect with the FPGA by conducting wire；The LED is aobvious
Show that module is connect with the FPGA by conducting wire.
2. the locking amplifying device of detection small-signal according to claim 1, it is characterised in that:
First signaling interface is for receiving measured signal and being transmitted to first attenuation network；
The second signal interface is for receiving noise signal and being transmitted to second attenuation network；
The third signaling interface is for receiving reference signal and being transmitted to the triggering Shaping Module；
First attenuation network is used to decay measured signal and measured signal after decaying is input to the adder, and gathers around
There are the 20000 times and 2000 times two-way evanescent modes that can be manually selected；
Second attenuation network is used to decay noise signal and noise signal after decaying is input to the adder, and gathers around
There are 20000 times, the 2000 times and 200 times three road evanescent modes that can be manually selected；
The adder is added generation composite signal with noise after decaying for measured signal after decaying and is transferred to described exchange
Amplification module, and possess the 200 times and 2000 times 2 road amplification modes that can be manually selected；
The exchange amplification module by composite signal for amplifying and being transferred to the bandpass filtering modules block；
The bandpass filtering modules block is used to filter out after amplification the harmonic wave of flip-flop in composite signal, low-frequency component and signal
Component, for composite signal after bandpass filtering to be transmitted to the phase sensitive detection module；
The triggering Shaping Module is used to reference signal triggering being shaped as square-wave signal and is transmitted to the FPGA；
The phase shift that the phase sensitive detection module is used for the amplitude according to composite signal after bandpass filtering and generates with the FPGA
Phase difference between square-wave signal generates synthesis direct current signal and is transmitted to the low-pass filtering module；
The low-pass filtering module is used to filter out the AC noise in synthesis direct current signal and is transmitted to the direct current amplification module；
The direct current amplification module amplifies 16 times for synthesis direct current signal after filtering and is transmitted to the analog-to-digital conversion module；
The analog-to-digital conversion module is converted to synthesis DC digital signal for synthesis direct current signal after amplifying and is transmitted to institute
State FPGA；
The FPGA is used to receive the square-wave signal that the triggering Shaping Module generates, for receiving the keyboard of the Keysheet module
Signal is controlled, for generating phase shift square-wave signal according to keyboard control signals and square-wave signal and being transmitted to the phase sensitive detection
Module, for receiving synthesis DC digital signal, for generating display according to keyboard control signals and synthesis DC digital signal
Screen control signal is simultaneously transmitted to the LED display module；
The Keysheet module is used to generate keyboard control signals according to artificial button operation and is transmitted to the FPGA；
The LED display module is used to control signal according to display screen and be shown.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821907333.2U CN209148760U (en) | 2018-11-19 | 2018-11-19 | A kind of locking amplifying device detecting small-signal |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821907333.2U CN209148760U (en) | 2018-11-19 | 2018-11-19 | A kind of locking amplifying device detecting small-signal |
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| CN209148760U true CN209148760U (en) | 2019-07-23 |
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| CN201821907333.2U Expired - Fee Related CN209148760U (en) | 2018-11-19 | 2018-11-19 | A kind of locking amplifying device detecting small-signal |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111726116A (en) * | 2020-07-15 | 2020-09-29 | 广州赛恩科学仪器有限公司 | Synchronous multichannel digital phase-locked amplifier |
-
2018
- 2018-11-19 CN CN201821907333.2U patent/CN209148760U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111726116A (en) * | 2020-07-15 | 2020-09-29 | 广州赛恩科学仪器有限公司 | Synchronous multichannel digital phase-locked amplifier |
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190723 Termination date: 20201119 |
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| CF01 | Termination of patent right due to non-payment of annual fee |