CN209056488U - Array substrate, reflective display panel and display device - Google Patents
Array substrate, reflective display panel and display device Download PDFInfo
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- CN209056488U CN209056488U CN201920019387.3U CN201920019387U CN209056488U CN 209056488 U CN209056488 U CN 209056488U CN 201920019387 U CN201920019387 U CN 201920019387U CN 209056488 U CN209056488 U CN 209056488U
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Abstract
The utility model provides a kind of array substrate, including substrate, pixel electrode, grid line, data line and thin film transistor (TFT) are provided on the substrate, the data line and the grid line are arranged in a crossed manner, to limit multiple pixel units, the pixel electrode and the thin film transistor (TFT) are corresponded with the pixel unit；The pixel electrode and datagraphic are provided with insulating layer between layers, and the datagraphic includes the source electrode of the data line and the thin film transistor (TFT), and a part of the pixel electrode and the datagraphic is overlapping；It is provided with multiple recess on the insulating layer, the orthographic projection of the recess over the substrate is located at except the orthographic projection of the overlapping region of the pixel electrode and the datagraphic over the substrate.The utility model also provides a kind of reflective display panel and display device.Flashing when the utility model can reduce display is bad.
Description
Technical field
The utility model relates to field of display technology, and in particular to a kind of array substrate, reflective display panel and display
Device.
Background technique
In current Reflective liquid crystal displays product, in order to increase visual angle, insulating layer of the meeting below pixel electrode is set
Protrusion and sunk structure are set, so that pixel electrode surface forms protrusion and recess, to reach irreflexive effect.But such one
The recess thickness that aspect will lead to insulating layer is too small, and on the other hand, due to the limitation of process conditions, institute is right between adjacent pixel
The recess thickness for the insulating layer answered be difficult it is identical, thus be easy to cause between adjacent two frame of same pixel and adjacent pixel it
Between display effect generate difference, and then generate scintillation.
Utility model content
The utility model aims to solve at least one of the technical problems existing in the prior art, proposes a kind of array base
Plate, reflective display panel and display device.
To achieve the goals above, the utility model provides a kind of array substrate, including substrate, is provided on the substrate
Pixel electrode, grid line, data line and thin film transistor (TFT), the data line and the grid line are arranged in a crossed manner, to limit multiple pictures
Plain unit, the pixel electrode and the film crystal are corresponded with the pixel unit；The pixel electrode and data
Figure is provided with insulating layer between layers, and the datagraphic includes the source electrode of the data line and the thin film transistor (TFT),
A part of the pixel electrode and the datagraphic is overlapping；Multiple recess are provided on the insulating layer, the recess exists
Orthographic projection on the substrate is located at the positive throwing of the overlapping region of the pixel electrode and the datagraphic over the substrate
Except shadow.
Optionally, a part of the pixel electrode and the data line is overlapping.
Optionally, the recess orthographic projection over the substrate and the orthographic projection of the data line over the substrate without
It is overlapping.
Optionally, the orthographic projection of the recess over the substrate is being located at the thin film transistor (TFT) over the substrate just
Except projection.
Optionally, the pixel electrode is reflecting electrode.
Optionally, there is septal area in the ranks between every adjacent rows pixel electrode, exist between every adjacent two column pixel electrode
The intersection region of column spacer region, the septal area in the ranks and the column spacer region is spacer material area；The recess is over the substrate
Orthographic projection be located at except the orthographic projection of at least part spacer material area over the substrate.
Correspondingly, the utility model also provides a kind of reflective display panel, including array substrate, to box substrate and is located at
The array substrate and the liquid crystal layer between box substrate, the array substrate use above-mentioned array substrate.
Optionally, the pixel electrode is reflecting electrode, and the recess on the insulating layer is configured as:
It is incident upon with the light of the angle of reflective display panel thickness direction between [25 °, 35 °] described reflective aobvious
After showing panel, the thickness direction by the pixel electrode along the reflective display panel reflects.
Optionally, the angle of gradient of the recess is between 9 °~12 °, the angle of gradient be the recessed side walls bottom end with
Angle between the section of midpoint between top and the reflective display panel display surface.
Correspondingly, the utility model also provides a kind of display device, including above-mentioned reflective display panel.
Detailed description of the invention
Attached drawing is to be used to provide a further understanding of the present invention, and constitute part of specification, and following
Specific embodiment be used to explain the utility model together, but do not constitute limitations of the present invention.In the accompanying drawings:
Fig. 1 is a kind of structural schematic diagram of array substrate in the prior art；
Fig. 2 is the schematic equivalent circuit in pixel unit；
Fig. 3 is the top view for the array substrate that the utility model embodiment one provides；
Fig. 4 is the cross-sectional view of line A-A in Fig. 3；
Fig. 5 is the index path that the light of directive pixel electrode is reflected by pixel electrode；
Fig. 6 is a kind of production method flow chart for array substrate that the utility model embodiment four provides.
Specific embodiment
Specific embodiment of the present utility model is described in detail below in conjunction with attached drawing.It should be understood that herein
Described specific embodiment is only used for describing and explaining the present invention, and is not intended to limit the utility model.
Fig. 1 is a kind of structural schematic diagram of array substrate in the prior art, as shown in Figure 1, data line 11 and film are brilliant
The source electrode 12 of body pipe, drain electrode 13 same layers setting, are provided with insulating layer 14 between pixel electrode 15 and data line 11, source electrode 12, and
And pixel electrode 15 and data line 11, thin film transistor (TFT) source electrode 12 between be respectively formed it is overlapping.Wherein, pixel electrode 15 and number
It will form parasitic capacitance according to the overlapping part of line 11, source electrode 12, the overlapping part of pixel electrode 15 and grid 16, which also will form, to be posted
Raw capacitor.
Fig. 2 is the schematic equivalent circuit in pixel unit, referring to figs. 1 and 2, the grid 16 of thin film transistor (TFT) T1
It is connected with grid line 17, source electrode is connected with data line 11.CpdFor pixel electrode 15 and the overlapping parasitism generated of data line 11, source electrode 12
Capacitor；CpgThe parasitic capacitance generated for the grid 16 of pixel electrode 15 and thin film transistor (TFT)；CstFor storage capacitance；ClcFor liquid crystal
Capacitor.In two frame screen switchings, the picture element signal on pixel electrode 15 will receive the influence of the data-signal on data line 11,
Influence degree ΩpdIt indicates, Ωpd(1) and formula (2) calculate according to the following formula:
Ωpd=Δ Vpd_max-ΔVpd_min (2)
Wherein, VdhAnd VdlThe respectively data-signal that is received in adjacent two frames picture of pixel unit, Δ VpdFor pixel
Stray voltage variable quantity between electrode and data line；Adjacent two frames picture is positive and negative frame picture, that is, for any pixel unit
For, the signal that pixel electrode is supplied in adjacent two frames picture is respectively as follows: the signal greater than common voltage and is less than public affairs
The signal of common voltage；In addition, by parasitic capacitance CpdInfluence, the dielectric when showing adjacent two frames picture, after liquid crystal deflection
Constant can change, then when showing adjacent two frames picture, according to the available Δ V of formula (1)pdValue, and in formula (2)
Δ Vpd_maxWith Δ Vpd_minIt is then respectively multiple Δ VpdIn maximum value and minimum value.
For reflective display product, it will usually multiple recess are formed on insulating layer 14, so that insulating layer 14 is right
Extraneous light carries out diffusing reflection, to increase the visual angle of display product on the basis of not increasing structure.According to the calculating of capacitor
Formula is (that is, C=ε o* ε r*S/d, wherein ε o is permittivity of vacuum, and ε r is the relative dielectric constant of dielectric layer, and S has for capacitor
Area is imitated, d is thickness of dielectric layers) it is found that the thickness of dielectric layers in capacitor is smaller, then the value of capacitor is bigger.Therefore, work as insulating layer
When forming recess on 14, the parasitic capacitance of recess is very big；And due to the limitation of process conditions, insulating layer 14 is in different recess
Thickness be extremely difficult to it is identical, once insulating layer 14 different recess thickness occur slight variations, will lead to not
There is biggish difference with parasitic capacitance corresponding to recess.
And according to above-mentioned formula (1), (2) it is found that working as parasitic capacitance C corresponding to two neighboring pixel unitpdDifference compared with
When big, Ω corresponding to the two pixel units will lead topdDiffer greatly, so as to cause the bright dark state of two pixel units
It is inconsistent, and then cause to flash.On the other hand, for the same pixel unit, due in the pixel unit pixel electrode with
The parasitic capacitance C that data line, source electrode generatepdItself is larger, therefore, when positive and negative frame screen switching, pixel electrode and data line
Between stray voltage variable quantity it is larger, the signal of data line can generate interference to the signal of pixel electrode, so as to cause same
A pixel unit differs greatly in the display brightness of adjacent two frame, can also cause to flash.
Fig. 3 is the top view for the array substrate that the utility model embodiment one provides, and Fig. 4 is the section view of line A-A in Fig. 3
Figure.In conjunction with shown in Fig. 3 and Fig. 4, array substrate includes substrate 20, and pixel electrode 25, grid line 21, data line are provided on substrate 20
22 and thin film transistor (TFT) 23, grid line 21 and data line 22 are arranged in a crossed manner, to limit multiple pixel units, pixel electrode 20 and picture
Plain unit corresponds, and thin film transistor (TFT) 23 and pixel unit correspond.Pixel electrode 25 and datagraphic are between layers
It is provided with insulating layer 24, wherein datagraphic includes the source electrode of data line 22 and thin film transistor (TFT) 23, and data line 22 and film are brilliant
The source electrode 231 of body pipe 23 can be arranged with same layer.A part of pixel electrode 25 and datagraphic is overlapping.It is provided on insulating layer 24
Multiple recess s, recess s are located at the overlapping region of pixel electrode 25 and datagraphic on substrate 20 in the orthographic projection on substrate 20
Orthographic projection except." overlapping " in the utility model refers to, two figures are located at different layers, and the positive throwing of the two on substrate
Shadow has overlapping.
It should be noted that in Fig. 3, in order to identify the position of recess s, the region that pixel electrode 25 is covered
Recess s is illustrated, it is not intended that pixel electrode 25 must be transparent.
In the present invention, orthographic projection of the recess s on substrate 20 on insulating layer 24 is located at pixel electrode 25 and number
According to the overlapping region of figure except the orthographic projection on substrate 20, that is to say, that handed over when pixel electrode 25 and data line 22 exist
When folded, insulating layer 24 corresponds to pixel electrode 25 and the part of 22 overlapping region of data line is not provided with recess s；When pixel electrode 25
When having overlapping with source electrode 231, insulating layer 24 corresponds to pixel electrode 25 and the part of source electrode overlapping region is also not provided with being recessed
s.Therefore, compared with prior art, the parasitic capacitance C between the pixel electrode 25 and datagraphic of the utility modelpdReduce, this
In the case of kind, due to parasitic capacitance CpdItself is smaller, therefore, for the same pixel unit, when the switching of positive and negative frame, posts
Raw voltage variety Δ VpdIt is smaller, so that interference reduction of the data line signal to pixel electrode signal, so that pixel unit
It is close in the display effect of adjacent two frames picture, improve scintillation；On the other hand, for two adjacent pixel units,
Even if two pixel units will not be caused since technological problems make the thickness of the different location of insulating layer 24 inconsistent
Parasitic capacitance CpdExcessive difference is generated, to reduce the display difference between different pixels unit, and then flashing can also be improved
Phenomenon.
Wherein, the thickness of the part of the not set recess s of insulating layer 24 is at 1.5 μm or more, and insulating layer 24 is at the recess bottom s position
The thickness set is less than the thickness of the part of not set recess s at 1.0 μm or more.
The array substrate of the present embodiment one is particularly suitable for reflective display panel, and at this moment, pixel electrode 25 is reflection electricity
Pole is reflected with the light to external environmental light or front located light source.The recess s being arranged on insulating layer 24 makes pixel electrode 25
Surface forms diffusing reflection surface, to increase visual angle.Wherein, reflecting electrode can be total reflection electrode, or semi-transparent half
Counterelectrode.
Further, as shown in figure 3, a part of pixel electrode 25 and data line 22 is overlapping, to increase pixel electrode 25
Area coverage, i.e., increase reflective surface area, to increase the aperture opening ratio of pixel unit.At this moment, insulating layer 24 corresponds to pixel electricity
Pole 25 and the part of 22 overlapping region of data line are not provided with recess s.
Further, recess s is in the orthographic projection and orthographic projection no overlap of the data line 22 on substrate 20 on substrate 20.
That is, entire 22 region of data line is not provided with recess s.
In addition, recess s is located at thin film transistor (TFT) 23 except the orthographic projection on substrate 20 in the orthographic projection on substrate 20.
That is, the part that insulating layer 24 corresponds to entire 23 region of thin film transistor (TFT) is not provided with recess s, to reduce pixel electrode
Parasitic capacitance between 25 and grid 232, to reduce the parasitic capacitance between pixel electrode 25 and grid 232 to display effect
It influences.
Wherein, as shown in figure 3, each pixel unit respectively corresponds two grid lines 21 and a data line 22, each pixel
Thin film transistor (TFT) 23 in unit can be double-gate film transistor, and two grids 232 of double-gate film transistor are distinguished
It is connected with two grid lines 21 corresponding to pixel unit.Certainly, each pixel unit can also correspond to a grid line 21 and one
Data line 22.
In addition, the thin film transistor (TFT) 23 in the utility model can be bottom gate thin film transistor, or top gate type
Thin film transistor (TFT).
In addition, there is septal area in the ranks between adjacent rows pixel electrode, there is column interval between adjacent two column pixel electrode
Area, in the ranks the intersection region between septal area and column spacer region be spacer material area B, at least part spacer material area B for be arranged every
Underbed, so that spacer material is able to maintain that the box of display panel is thick when array substrate is in display panel.For the ease of every
The stability of underbed support, the s that is recessed may be located at least part spacer material area B on substrate 20 in the projection on substrate 20
Orthographic projection except.Preferably, projection of the recess s on substrate 20 is located at positive throwing of all spacer material area B on substrate 20
Except shadow, that is, insulating layer 24 is also not provided with recess s corresponding to the part of spacer material area B.
The utility model embodiment two provides a kind of reflective display panel, including array substrate, to box substrate and is located at
Array substrate and to the liquid crystal layer between box substrate, wherein array substrate is the array substrate in above-described embodiment one.Wherein,
Reflective display panel can be total-reflection type display panel, or Transflective display panel.
Wherein, the recess s in Fig. 4 on insulating layer 24 is configured as: being existed with the angle of reflective display panel thickness direction
After light between [25 °, 35 °] injects reflective display panel, by pixel electrode 25 along the thickness side of reflective display panel
To reflection.
Fig. 5 is the index path that the light of directive pixel electrode is reflected by pixel electrode.Wherein, angle of incidence of light and angle of reflection
Meet following formula (3):
Sinθ1 is incident/sinθRefraction=ncell/nAir (3)
Wherein, θ1 is incidentIncidence angle when reflective display panel surface is incident to for ambient；θRefractionIt is being reflected for light
Refraction angle when formula panel surface reflects；ncellFor the overall refractive index of reflective display panel；nAirFor air folding
Penetrate rate.It should be noted that may include multilayered structure to box substrate 30, array substrate further includes positioned at 24 top of insulating layer
Multilayered structure, and the refractive index of these layer of structure and the refractive index of liquid crystal layer 40 might not be identical, therefore, ambient light
To exposing to pixel electrode 25 since entering reflective display panel, it may occur that repeatedly refraction, and above-mentioned ncellThen it is
It is uniform by refractive index is equivalent to the multilayered structure for being located at 24 top of insulating layer in box substrate 30, liquid crystal layer 40 and array substrate
The refractive index of dielectric layer；θRefractionThen for light enter this it is equivalent after dielectric layer when refraction angle.
It can be obtained according to above-mentioned formula (3):
θRefraction=arcsin (sin θ1 is incident*nAir/ncell) (4)
Assuming that with the angle theta between the section and display surface of the midpoint between the bottom end and top of the s side wall that is recessedThe gradientMake
For the angle of gradient of the s that is recessed, (wherein, the be recessed bottom end of s side wall is close to one end of substrate, and the top of the s that is recessed is far from substrate
One end；Be recessed s the angle of gradient that is, between adjacent recessed s protrusion the angle of gradient), then, in order to meet light by pixel electricity
The direction that pole 25 is reflected is display panel thickness direction, the then angle of gradient θ for the s that is recessedThe gradientAre as follows:
θThe gradient=θ2 is incident=θReflection=θRefraction/2 (5)
Wherein, θ2 is incidentThe incidence angle of pixel electrode 25, θ are exposed to for lightReflectionFor the reflection reflected by pixel electrode 25
Angle.
The angle of gradient of recess s can then be calculated by above-mentioned formula (4) and (5), and then (6) are counted according to the following formula
Calculate the overall thickness D of insulating layer 24Always, insulating layer 24 recess the bottom s thickness DIt is recessed, recess s diameter W between relationship:
tanθThe gradient=(DAlways—DIt is recessed)/(W/2) (6)
In the present invention, specifically, be recessed the angle of gradient θ of sThe gradientBetween 9 °~12 °.
It is given in table 1 to the reflective display panel of the utility model and reflective display panel in the prior art
Test data.Wherein, in existing reflective display panel, other than spacer material corresponding with Fig. 3 area B, insulating layer
Other parts be provided with recess；And in the reflective display panel of the utility model, it is brilliant that insulating layer 24 corresponds to film
The part of body pipe 23 is not provided with being recessed corresponding to the part of data line 22 and the part corresponding to spacer material area B, other regions are equal
Setting recess.Also, in two kinds of reflective display panels, in the region of setting recess s, the size and distribution density for the s that is recessed are equal
It is identical.
Table 1
Data in table 1 include the reflectivity (Reflectance) of two kinds of reflective display panels, contrast
(contrast ratio) and flicker level.Wherein, reflectivity is for characterizing reflective display panel in reflection state (that is, reflection
When ambient) brightness；Contrast is to be displayed in white the brightness and display black picture of picture (when most bright) (when most dark)
The ratio of brightness；Flicker level is the bright dark variation degree of display panel；Specifically, the unit time can be passed through (e.g., every
1s) detect a display panel brightness, then, the variable quantity of the multiple brightness values detected in detection time section with it is multiple bright
The ratio between average value of angle value is the flicker level of reflective display panel.DP in table 1 is indicated from reflective display panel
The data that binding side (bonding) is detected, DO indicate the data that the opposite side from binding side is detected, and L is indicated from reflection
The data that the left side of formula display panel is detected, R indicate the data detected from the right side of reflective display panel；Flashing
The corresponding percentage value of degree is bigger, indicates that flashing is more serious.By comparison as can be seen that with existing reflective display panel phase
Than the light reflectivity of the reflective display panel of the utility model, contrast are almost unchanged, and flicker level is greatly reduced.
Reflective display panel in the present embodiment two uses the array substrate of above-described embodiment one, due in array substrate
Parasitic capacitance C between pixel electrode and data line, source electrodepdReduce, therefore, in the switching of positive and negative frame, the parasitism of pixel unit
Voltage variety is smaller, so that the same pixel unit is close in the display effect of adjacent two frame；And work as parasitic capacitance Cpd
After reduction, the difference of the parasitic capacitance of two neighboring pixel unit can also reduce, so that two neighboring pixel unit is aobvious
Show that effect is also close, therefore, the flashing of reflective display panel is bad to be can be improved, and passes through test result it is found that anti-
The reflectivity for penetrating formula display panel is almost unchanged.
The present embodiment three provides a kind of display device, using the reflective display panel of above-described embodiment two, so as to
In the case where guaranteeing reflectivity, improves and show display effect that is bad, and then improving display device.
The display device of the present embodiment three can be with are as follows: Electronic Paper, mobile phone, tablet computer, television set, display, notebook
Any products or components having a display function such as computer, navigator, and the display device of the present embodiment three can be total reflection
Or Transflective display device, it especially can be electronic tag product.
Fig. 6 is a kind of production method flow chart for array substrate that the utility model embodiment four provides, for making reality
The array substrate in example one is applied, as shown in fig. 6, the production method of array substrate includes:
S1, the figure including grid line is formed on the substrate.
S2, datagraphic is formed；Datagraphic includes the source electrode of data line and thin film transistor (TFT)；Grid line and data line intersect
Setting, to limit multiple pixel units.Thin film transistor (TFT) can be bottom gate thin film transistor, or top gate type thin film
Transistor.
S3, insulating layer is formed.
S4, multiple recess are formed on the insulating layer.
S5, the figure including pixel electrode is formed；Wherein, a part of pixel electrode and datagraphic is overlapping；Also, it is recessed
Orthographic projection on substrate is fallen into be located at except the orthographic projection of the overlapping region of pixel electrode and datagraphic on substrate.Pixel electricity
It can extremely be made of metal material, to form reflecting electrode.
Specifically, insulating layer is made of photoresist.Insulating layer specifically includes first area, second area and is located at and is somebody's turn to do
Third region except first area and second area.First area is the region of via hole to be formed, the photoresist of first area
It is completely removed in step s 4, to form via hole, pixel electrode is connected with the drain electrode of thin film transistor (TFT) by via hole.Its
In, the region that insulating layer corresponds to array substrate binding area (bonding) is also considered as the region of via hole to be formed.Secondth area
Domain is the region of groove to be formed, and the photoresist of second area is removed a part in step s 4, to form groove.
Step S4 includes:
S41, insulating layer is exposed using mask plate.Wherein, the mask plate includes transparent area, semi-opaque region and not
Transparent area；When insulating layer is made of positive photoresist, the transparent area of mask plate is corresponding with first area, mask plate it is semi-transparent
Light area is corresponding with second area, and the opaque area of mask plate is corresponding with third region；When insulating layer is made of negative photoresist
When, the opaque area of mask plate is corresponding with first area, and the semi-opaque region of mask plate is corresponding with second area, the light transmission of mask plate
Area is corresponding with third region.
S42, develop to the insulating layer after exposure, to form via hole and multiple recess.
It is understood that embodiment of above is merely to illustrate that the principles of the present invention and uses exemplary
Embodiment, however the utility model is not limited thereto.For those skilled in the art, this is not being departed from
In the case where the spirit and essence of utility model, various changes and modifications can be made therein, these variations and modifications are also considered as this reality
With novel protection scope.
Claims (10)
1. a kind of array substrate, including substrate, it is provided with pixel electrode, grid line, data line and thin film transistor (TFT) on the substrate,
The data line and the grid line are arranged in a crossed manner, to limit multiple pixel units, the pixel electrode and the film crystal
Corresponded with the pixel unit；It is characterized in that, the pixel electrode and datagraphic are provided with absolutely between layers
Edge layer, the datagraphic include the source electrode of the data line and the thin film transistor (TFT), the pixel electrode and the data
A part of figure is overlapping；Multiple recess are provided on the insulating layer, the orthographic projection of the recess over the substrate is located at
Except the orthographic projection of the overlapping region of the pixel electrode and the datagraphic over the substrate.
2. array substrate according to claim 1, which is characterized in that a part of the pixel electrode and the data line
It is overlapping.
3. array substrate according to claim 1, which is characterized in that orthographic projection and the institute being recessed over the substrate
State the orthographic projection no overlap of data line over the substrate.
4. array substrate according to claim 1, which is characterized in that the orthographic projection of the recess over the substrate is located at
Except the orthographic projection of the thin film transistor (TFT) over the substrate.
5. array substrate according to claim 1, which is characterized in that the pixel electrode is reflecting electrode.
6. array substrate according to claim 1, which is characterized in that there are row intervals between every adjacent rows pixel electrode
Area, often there are column spacer region between adjacent two column pixel electrode, the intersection region of the septal area in the ranks and the column spacer region is
Spacer material area；The recess orthographic projection over the substrate is located at least part spacer material area over the substrate
Except orthographic projection.
7. a kind of reflective display panel, which is characterized in that including array substrate, to box substrate and be located at the array substrate with
The liquid crystal layer between box substrate, the array substrate is using array base described in any one of claim 1 to 6
Plate.
8. reflective display panel according to claim 7, which is characterized in that the pixel electrode is reflecting electrode, institute
The recess stated on insulating layer is configured as:
The reflective display panel is incident upon with the light of the angle of reflective display panel thickness direction between [25 °, 35 °]
After plate, the thickness direction by the pixel electrode along the reflective display panel reflects.
9. reflective display panel according to claim 7, which is characterized in that the angle of gradient of the recess is at 9 °~12 °
Between, the section of midpoint of the angle of gradient between the bottom end and top of the recessed side walls and the reflective display panel
Angle between plate display surface.
10. a kind of display device, which is characterized in that including reflective display panel described in any one of claim 7 to 9
Plate.
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