CN209045140U - A kind of display device - Google Patents
A kind of display device Download PDFInfo
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- CN209045140U CN209045140U CN201821570425.6U CN201821570425U CN209045140U CN 209045140 U CN209045140 U CN 209045140U CN 201821570425 U CN201821570425 U CN 201821570425U CN 209045140 U CN209045140 U CN 209045140U
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- pixel column
- transistor
- signal wire
- input terminal
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Abstract
The utility model provides a kind of display device, including the first to the 12nd pixel column, first to the 6th signal wire, the first to the second branch control signal wire and the first to the tenth two-transistor, first to the 12nd pixel column is successively according to red pixel column, green pixel column, blue pixel column is arranged in parallel, first branch control signal wire and first, third, 5th, 7th, 9th, the grid of 11st transistor connects, second branch control signal wire and second, 4th, 6th, 8th, tenth, the grid of tenth two-transistor connects, 1. signal wire quantity of above-mentioned technical proposal is reduced, reduce IC cost;2. signal wire quantity is reduced, fanout bracing wire height is reduced, reduces processing procedure risk, improves yield;3. using the branch design method can reduce to greatest extent because pixel preliminary filling it is inconsistent caused by show quality uneven phenomenon.
Description
Technical field
The utility model relates to pixel driver display field more particularly to a kind of display devices.
Background technique
LCD (Liquid Crystal Display, liquid crystal display) and OLED (Organic Light-Emitting
Diode, Organic Electricity laser display) Demux (branch control) design be now subjected to the concerns of more and more display manufacturers, because
Have the advantage that 1.IC (integrated circuit, integrated circuit) exports pin number and reduce for it, the decline of IC cost;
2.IC exports pin number and reduces, and advantageously reduces fanout and (is fanned out to) bracing wire height, to be conducive to lower frame narrow frame
Panel (panel) design.But the panel of demux design is used to often focus on LTPS (Low Temperature Poly-
Silicon, low-temperature polysilicon silicon technology) on the basis of processing procedure, the reason is that the mobility of the carrier of LTPS is higher, meet demux
Design the requirement to TFT (Thin Film Transistor, thin film transistor (TFT)).With IGZO (indium gallium zinc
Oxide, indium gallium zinc oxide) TFT electric property becomes better and better, and carrier mobility is higher and higher, and demux is designed IGZO's
Attention of the design by more and more IGZO panel vendors on panel, but it is opposite with LTPS TFT, the carrier of IGZO TFT
Mobility often only has the 1/10~1/5 of LTPS, therefore it can not accomplish the design requirement of LTPS panel demux, display effect
Fruit is poor.
Utility model content
For this reason, it may be necessary to provide a kind of display device, the display effect for solving the problems, such as that demux is designed on IGZO is poor.
To achieve the above object, it inventor provides a kind of display device, including the first to the 12nd pixel column, first arrives
6th signal wire, the first to the second branch control signal wire and the first to the tenth two-transistor, the first to the 12nd pixel column according to
It is secondary arranged in parallel according to red pixel column, green pixel column, blue pixel column, the first branch control signal wire and first, third,
The grids of five, the seven, the nine, the 11st transistors connects, the second branch control signal wire and second, the 4th, the 6th, the
Eight, the grid connection of the ten, the tenth two-transistors, the first signal wire are connect with the source electrode of the first, second transistor, second signal
Line is connect with the source electrode of third, the 4th transistor, and third signal wire is connect with the source electrode of the five, the 6th transistors, fourth signal
Line is connect with the source electrode of the seven, the 8th transistors, and the 5th signal wire is connect with the source electrode of the nine, the tenth transistors, the 6th signal
Line is connect with the source electrode of the 11st, the tenth two-transistor;
The drain electrode of the first transistor is connect with the public input terminal of the first pixel column, the drain electrode of second transistor and third picture
The public input terminal connection of element column, the drain electrode of third transistor are connect with the public input terminal of the 4th pixel column, the 4th transistor
Drain electrode connect with the public input terminal of the second pixel column, drain electrode and the public input terminal of the 7th pixel column of the 5th transistor connect
It connects, the drain electrode of the 6th transistor is connect with the public input terminal of the 5th pixel column, the drain electrode of the 7th transistor and the 6th pixel column
The connection of public input terminal, the drain electrode of the 8th transistor connect with the public input terminal of the 8th pixel column, the leakage of the 9th transistor
Pole is connect with the public input terminal of the 9th pixel column, and the drain electrode of the tenth transistor connects with the public input terminal of the 11st pixel column
It connects, the drain electrode of the 11st transistor is connect with the public input terminal of the tenth pixel column, the drain electrode and the 12nd of the tenth two-transistor
The public input terminal of pixel column connects.
It is different from the prior art, 1. signal wire quantity of above-mentioned technical proposal is reduced, and reduces IC cost;2. signal wire quantity subtracts
It is few, fanout bracing wire height is reduced, processing procedure risk is reduced, improves yield;3. can be dropped to greatest extent using the branch design method
It is low because pixel preliminary filling it is inconsistent caused by show quality uneven phenomenon.
Detailed description of the invention
Fig. 1 is the structural schematic diagram that the pixel (Pixel) of the utility model arranges;
Fig. 2 is the utility model demux circuit design;
Fig. 3 is general 1To 2demux design charging schematic diagram;
Fig. 4 is the utility model 1To 2demux design charging schematic diagram.
Specific embodiment
Technology contents, construction feature, the objects and the effects for detailed description technical solution, below in conjunction with specific reality
It applies example and attached drawing is cooperated to be explained in detail.
Fig. 1 to Fig. 4 is please referred to, the present embodiment provides a kind of display device, including the first to the 12nd pixel column, first is arrived
6th signal wire, the first to the second branch control signal wire and the first to the tenth two-transistor, the first to the 12nd pixel column according to
Secondary arranged in parallel according to red pixel column, green pixel column, blue pixel column, four adjacent pixels are in rectangular four
On a vertex, Fig. 1 is the area the AA pixel arrangement figure of the utility model, using stripe (bar shaped) arrangement mode, is used in display
The mode for arranging overturning, can reduce fliker (flashing).
The grid of first branch control signal wire Demux 1 and first, third, the five, the seven, the nine, the 11st transistors
Pole connection, the grid of the second branch control signal wire Demux 2 and second, the four, the six, the eight, the ten, the tenth two-transistors
Connection, the first signal wire source 1 connect with the source electrode of the first, second transistor, second signal line source 2 and third,
The source electrode of 4th transistor connects, and third signal wire source 3 is connect with the source electrode of the five, the 6th transistors, fourth signal line
Source 4 is connect with the source electrode of the seven, the 8th transistors, the source electrode of the 5th signal wire source 5 and the nine, the tenth transistors
Connection, (source 6 is connect the 6th signal wire with the source electrode of the 11st, the tenth two-transistor.
The drain electrode of the first transistor is connect with the public input terminal 1 of the first pixel column, the drain electrode and third of second transistor
The public input terminal 3 of pixel column connects, and the drain electrode of third transistor is connect with the public input terminal 4 of the 4th pixel column, and the 4th is brilliant
The drain electrode of body pipe is connect with the public input terminal 2 of the second pixel column, and draining for the 5th transistor is public defeated with the 7th pixel column
Enter 7 connection of end, the drain electrode of the 6th transistor connect with the public input terminal 5 of the 5th pixel column, the drain electrode of the 7th transistor and the
The public input terminal 6 of six pixel columns connects, and the drain electrode of the 8th transistor is connect with the public input terminal 8 of the 8th pixel column, and the 9th
The drain electrode of transistor is connect with the public input terminal 9 of the 9th pixel column, the drain electrode and the public affairs of the 11st pixel column of the tenth transistor
Input terminal 11 connects altogether, and the drain electrode of the 11st transistor is connect with the public input terminal 10 of the tenth pixel column, the tenth two-transistor
Drain electrode connect with the public input terminal 12 of the 12nd pixel column.
Fig. 2 is the utility model demux circuit design, wherein 6 source (signal source) signal line groups at
Demux structure is a cycle, and each source signal polarity is identical in a frame, this advantageously reduces source signal function
Consumption, while in order to meet display quality (column overturning), therefore use the connection type in the following access area AA.The connection type is main
Have the advantage that 1. realizations column overturning;2. all demux 1 drive R pixel, all demux 2 to drive G pixel;It is real
Existing which can improve the display quality of Panel to greatest extent.
Fig. 3 is that there are drawbacks to prove the superior of the utility model by a kind of common 1To 2demux design method
Property, it is that the demux 1 and demux 2 in figure charge respectively if there is two column R Pixel (Pixel 1_R and Pixel 2_R),
Since the current potential of Pixel 1_R and Pixel 2_R preliminary filling is different.Therefore its charge rate A% and B% may be different, in this way
The brightness that two column R Pixel are shown can generate striped with regard to different inside R, display quality decline.And as shown in figure 4,
All R Pixel are the driving chargings of demux 1 in the utility model, and all G Pixel are the driving chargings of demux 2, therefore in R
Or G interior would not be generated because of brightness disproportionation caused by different.And B can not be avoided, part of it is that demux 1 drives,
And another part is that demux 2 drives, therefore will appear the inconsistent phenomenon of charge rate inside B, but the resolution due to human eye to B
Ability is most weak in RGB, therefore realizes the normal of RG color by sacrificing B;To guarantee display quality to greatest extent.
It should be noted that being not intended to limit although the various embodiments described above have been described herein
The scope of patent protection of the utility model.Therefore, based on the innovative idea of the utility model, embodiment described herein is carried out
Change and modification or equivalent structure or equivalent flow shift made based on the specification and figures of the utility model, directly
Or above technical scheme is used in other related technical areas indirectly, it is included in the protection model of the utility model patent
Within enclosing.
Claims (1)
1. a kind of display device, it is characterised in that: arrived including the first to the 12nd pixel column, the first to the 6th signal wire, first
Second branch control signal wire and the first to the tenth two-transistor, the first to the 12nd pixel column successively according to red pixel column,
Green pixel column, blue pixel column are arranged in parallel, the first branch control signal wire and first, third, the 5th, the 7th, the 9th,
The grid of 11 transistors connects, the second branch control signal wire and second, the four, the six, the eight, the ten, the 12nd crystal
The grid of pipe connects, and the first signal wire is connect with the source electrode of the first, second transistor, second signal line and third, the 4th crystal
The source electrode of pipe connects, and third signal wire is connect with the source electrode of the five, the 6th transistors, fourth signal line and the seven, the 8th crystal
The source electrode of pipe connects, and the 5th signal wire is connect with the source electrode of the nine, the tenth transistors, the 6th signal wire and the 11st, the 12nd
The source electrode of transistor connects;
The drain electrode of the first transistor is connect with the public input terminal of the first pixel column, the drain electrode of second transistor and third pixel column
The connection of public input terminal, the drain electrode of third transistor connect with the public input terminal of the 4th pixel column, the leakage of the 4th transistor
Pole is connect with the public input terminal of the second pixel column, and the drain electrode of the 5th transistor is connect with the public input terminal of the 7th pixel column,
The drain electrode of 6th transistor is connect with the public input terminal of the 5th pixel column, the drain electrode and the public affairs of the 6th pixel column of the 7th transistor
Input terminal connection altogether, the drain electrode of the 8th transistor connect with the public input terminal of the 8th pixel column, the drain electrode of the 9th transistor and
The public input terminal of 9th pixel column connects, and the drain electrode of the tenth transistor is connect with the public input terminal of the 11st pixel column, the
The drain electrode of 11 transistors is connect with the public input terminal of the tenth pixel column, the drain electrode of the tenth two-transistor and the 12nd pixel column
Public input terminal connection.
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CN201821570425.6U CN209045140U (en) | 2018-09-26 | 2018-09-26 | A kind of display device |
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CN201821570425.6U CN209045140U (en) | 2018-09-26 | 2018-09-26 | A kind of display device |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110910845A (en) * | 2019-11-18 | 2020-03-24 | 福建华佳彩有限公司 | Dot display driving method |
CN110992906A (en) * | 2019-11-18 | 2020-04-10 | 福建华佳彩有限公司 | Drive method of Demux circuit |
-
2018
- 2018-09-26 CN CN201821570425.6U patent/CN209045140U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110910845A (en) * | 2019-11-18 | 2020-03-24 | 福建华佳彩有限公司 | Dot display driving method |
CN110992906A (en) * | 2019-11-18 | 2020-04-10 | 福建华佳彩有限公司 | Drive method of Demux circuit |
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