CN208890648U - A kind of envelope-tracking chip circuit - Google Patents
A kind of envelope-tracking chip circuit Download PDFInfo
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- CN208890648U CN208890648U CN201821338428.7U CN201821338428U CN208890648U CN 208890648 U CN208890648 U CN 208890648U CN 201821338428 U CN201821338428 U CN 201821338428U CN 208890648 U CN208890648 U CN 208890648U
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Abstract
The utility model discloses a kind of envelope-tracking chip circuits, internal circuit includes signal instruction module and high-frequency switch circuit module, and external interface includes the first pressure regulation signal output end, the second pressure regulation signal output end, the first power input, second source input terminal and power output end.Wherein, first pressure regulation signal output end is electrically connected to the first pressure regulation signal receiving end of a voltage-regulating switching power source at a slow speed, second pressure regulation signal output end is electrically connected to the second pressure regulation signal receiving end of a first voltage source, first power input is electrically connected to the anode of first voltage source, second source input terminal is electrically connected to the cathode of first voltage source and the anode of voltage-regulating switching power source, power output end are electrically connected to the drain electrode of power amplifier at a slow speed.The envelope-tracking chip circuit of the utility model, signal instruction module and high-frequency switch circuit is module integrated at chip form, to reduce circuit volume and occupied space.
Description
Technical field
The utility model relates to field of communication technology, in particular to a kind of envelope-tracking chip circuit.
Background technique
Envelope-tracking (ET, Envelop Tracking) is to improve Modern Communication System intermediate power amplifier (PA) efficiency
Technology.With the development of the communication technology, the frequency of radiofrequency signal is higher and higher, and peak-to-average force ratio is higher and higher, and this requires ET electricity
The envelope voltage range of regulation in source is more and more wider, and pressure regulation speed is getting faster, these propose the design of envelope-tracking power supply
Bigger challenge, how effectively to reduce the loss of the stress and switching device of switching device in envelope-tracking power supply be current
Envelope-tracking power supply problem encountered and challenge.
Existing envelope-tracking power supply technology is divided into two kinds:
The first is traditional Switching Power Supply mode, and common form is multiphase interleaving, thus to improve response speed；
Second is Switching Power Supply ledger line power source combination, and this mode can be responded adequately fastly using linear power supply,
The high feature of switch power efficiency.
Wherein in the first technology, for simple Switching Power Supply, since range of regulation is wider, switching device needs to select
The higher device of pressure resistance, causes device reliability low, while influencing device optimization, causes final whole efficiency not high；
In second of technology, for the mode that Switching Power Supply is combined with linear power supply, since linear power supply efficiency is far below
Switching Power Supply, whole efficiency will not be high in the biggish situation of linear segment accounting.
Utility model content
In view of this, the present invention provides a kind of envelope-tracking chip circuits, to reduce switching loss and device voltage
Stress promotes the efficiency and reliability of envelope-tracking power supply, to promote the quality of the envelope signal finally synthesized.
The technical solution of the utility model is achieved in that
A kind of envelope-tracking chip circuit, the envelope-tracking chip circuit include signal instruction module and HF switch electricity
Road module, the envelope-tracking chip circuit have radio frequency envelope signal receiving end, the first pressure regulation signal output end, the second pressure regulation
Signal output end, the first power input, second source input terminal and power output end；
In the envelope-tracking chip circuit:
The signal instruction module be connected to the radio frequency envelope signal receiving end, the first pressure regulation signal output end,
The pulse width modulation (PWM) signal input part of the second pressure regulation signal output end and the high-frequency switch circuit module, with from
The radio frequency envelope signal receiving end receives radio frequency envelope signal, generates pwm signal, the first tune according to the radio frequency envelope signal
Signal instruction and the second pressure regulation signal instruction are pressed, and to described in the transmission of the pwm signal input terminal of the high-frequency switch circuit module
Pwm signal, Xiang Suoshu the first pressure regulation signal output end and the second pressure regulation signal output end send the first pressure regulation signal respectively
Instruction and the second pressure regulation signal instruction；
The high-frequency switch circuit module also has the second positive terminal, the second negative pole end and output end, wherein described second
Positive terminal is connected to first power input, and second negative pole end is connected to the second source input terminal, described defeated
Outlet is connected to the power output end, and the high-frequency switch circuit module is with second positive terminal and second negative pole end
Between the voltage that loads as input voltage, and adjust according to the pwm signal output voltage of the output end.
Further, the first pressure regulation signal output end is electrically connected to the first pressure regulation signal of a voltage-regulating switching power source at a slow speed
Receiving end, the second pressure regulation signal output end are electrically connected to the second pressure regulation signal receiving end of a first voltage source, and described
One power input is electrically connected to the anode of the first voltage source, and the second source input terminal is electrically connected to first electricity
The anode of the cathode of potential source and the voltage-regulating switching power source at a slow speed, the power output end are electrically connected to power by filter circuit
The drain electrode of amplifier, the cathode ground connection of the voltage-regulating switching power source at a slow speed；Wherein,
The power amplifier is base station radio-frequency power amplifier；
The voltage-regulating switching power source at a slow speed adjusts the electricity between its anode and cathode according to the first pressure regulation signal instruction
Pressure；
The first voltage source adjusts the voltage between its anode and cathode according to the second pressure regulation signal instruction；
The voltage-regulating switching power source at a slow speed and the first voltage source are DC voltage source.
Further, the signal instruction module is field programmable gate array FPGA chip.
Further, the high-frequency switch circuit module is multiphase interleaving BUCK circuit；
The pwm signal is multiphase PWM signal, and every one-phase circuit in the multiphase interleaving BUCK circuit all has
With the one-to-one pwm signal input terminal of each phase pwm signal of the multiphase PWM signal.
Further, every one-phase circuit in the multiphase interleaving BUCK circuit includes first switch transistor,
Two switching transistors, the first driving circuit, the second driving circuit；Wherein,
The drain electrode of the first switch transistor is second positive terminal of the multiphase interleaving BUCK circuit, institute
The source electrode for stating first switch transistor is connected to the output end；
The drain electrode of the second switch transistor is electrically connected to the source electrode of the first switch transistor, the second switch
The source electrode of transistor is the second negative pole end of the multiphase interleaving BUCK circuit；
First driving circuit is connected to the pwm signal input terminal and the first switch transistor of phase BUCK circuit
Grid between, to drive the on and off of the first switch transistor；
Second driving circuit is connected to the pwm signal input terminal and the second switch transistor of phase BUCK circuit
Grid between, to drive the on and off of the second switch transistor；
Wherein, the second switch transistor cutoff when the first switch transistor turns, when the first switch
Second switch transistor turns when transistor cutoff.
Further, first driving circuit includes the first signal conversion unit, first voltage adapter and first grid
Driver；Wherein,
First signal conversion unit is electrically connected to the pwm signal input terminal of phase BUCK circuit, is corresponded to receiving
The pwm signal of phase BUCK circuit, and the received pwm signal of institute is converted into transistor-crystalline substance from low-voltage differential signal form
Body pipe logic level form；
The first voltage adapter is connected to first signal conversion unit, by first signal conversion unit
Signal after converting carries out voltage adjusting；
The first grid driver is electrically connected to the grid of the first voltage adapter and the first switch transistor
Between pole, with according to the first voltage adapter reconcile after voltage signal drive the first switch transistor conducting and
Cut-off.
Further, second driving circuit includes second signal converting unit, second voltage adapter and second grid
Driver；Wherein,
The second signal converting unit is electrically connected to the pwm signal input terminal of phase BUCK circuit, is corresponded to receiving
The pwm signal of phase BUCK circuit, and the received pwm signal of institute is converted into transistor-crystalline substance from low-voltage differential signal form
Body pipe logic level form；
The second voltage adapter is connected to the second signal converting unit, by the second signal converting unit
Signal after converting carries out voltage adjusting；
The second grid driver is electrically connected to the grid of the second voltage adapter and the second switch transistor
Between pole, with according to the second voltage adapter reconcile after voltage signal drive the second switch transistor conducting and
Cut-off.
Further, the pwm signal input terminal receives the pwm signal by an isolator.
Further, first driving circuit and second driving circuit are powered by isolated power supply.
Further, the voltage output range of the voltage-regulating switching power source at a slow speed is 11~18V；
The voltage output range of the first voltage source is 36~48V；
The highest bandwidth for the envelope-tracking voltage that the high-frequency switch circuit module issues is 40MHz, and the maximum amplitude of oscillation is
25V, envelope-tracking voltage range are 30~54V.
From above scheme as can be seen that the envelope-tracking chip circuit of the utility model, by signal instruction module and high frequency
On-off circuit module is integrated into chip form, to reduce circuit volume and occupied space.In addition, utilizing the utility model
Envelope-tracking chip and according to envelope waveform, forms the series relationship using two Switching Power Supplies, one of them is adjusted at a slow speed
Output voltage, provides variable direct current part, another quickly adjusts output voltage, provides high frequency section energy, compares
For existing Switching Power Supply ledger line power source combination mode, slow-action splenium component efficiency is higher than linear power supply, rapid pressure adjusting
Part is smaller than the switching device pressure resistance that the prior art needs, and there is whole efficiency to improve in this way and reduce with switching device voltage stress
The advantages of.
In addition, by the structure of the utility model, by voltage-regulating switching power source at a slow speed therein and with high-frequency switch circuit into
Row chip Integrated design, the first voltage source of power supply and voltage-regulating switching power source is not included in instruction module and HF switch at a slow speed
The chip interior of circuit module composition, but inputted as chip exterior, it can greatly reduce envelope-tracking chip circuit
Volume.
Detailed description of the invention
Fig. 1 is the envelope-tracking chip circuit structure schematic diagram of the utility model embodiment；
Fig. 2 is the envelope-tracking chip circuit and external circuit connection schematic diagram of the utility model embodiment；
Fig. 3 is the connection relationship diagram of the multiphase interleaving BUCK circuit in the utility model embodiment；
Fig. 4 is the voltage's distribiuting schematic diagram that the envelope-tracking chip circuit of the utility model embodiment exports；
Fig. 5 is the peak period voltage's distribiuting schematic diagram under a concrete application scene of the utility model embodiment；
Fig. 6 is the low peak period voltage's distribiuting schematic diagram under a concrete application scene of the utility model embodiment；
Fig. 7 is the voltage's distribiuting schematic diagram of existing single supply technical solution.
Specific embodiment
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, develop simultaneously reality referring to the drawings
Example is applied, the utility model is described in further detail.
Design for base station power amplification envelope-tracking power supply, Major Difficulties are base station power amplification requirement envelope-tracking power supply
Voltage output amplitude and variation range with higher and change rate as high as possible.Thus it is possible, on the one hand, improving to power supply
Middle key semiconductor devices pressure resistance and lead to overpowering specification requirement；On the other hand, compared with high voltage and pass through the device of specification
Corresponding to bigger parasitic parameter, and parasitic parameter can be such that the loss of power significantly increases with the raising of voltage change ratio.Due to
The voltage change ratio that envelope-tracking power supply can reach determines its carrier bandwidths supported, this is its design difficulty highest and most
One of important index is wanted so the performance that excessive parasitic parameter will lead to designed envelope-tracking power supply is not achieved to apply
It asks.
In order to improve this situation, it may be considered that envelope-tracking power supply is divided into rapid pressure adjusting Switching Power Supply and pressure regulation at a slow speed
Two Switching Power Supplies of Switching Power Supply, then two Switching Power Supplies are subjected to series connection combining, with reach required output voltage and
Change rate.
As shown in Figure 1, envelope-tracking chip circuit 1 provided by the embodiment of the utility model includes 11 He of signal instruction module
There is radio frequency envelope signal receiving end 1a, the first pressure regulation signal to export for high-frequency switch circuit module 12, envelope-tracking chip circuit 1
Hold 1b, the second pressure regulation signal output end 1c, the first power input 1d, second source input terminal 1e and power output end 1f.
In the envelope-tracking chip circuit 1:
Signal instruction module 11 is connected to radio frequency envelope signal receiving end 1a, the first pressure regulation signal output end 1b, the second tune
The pulse width of signal output end 1c and high-frequency switch circuit module 12 is pressed to modulate (Pulse Width Modulation, PWM)
Signal input part 12a is generated with receiving radio frequency envelope signal from radio frequency envelope signal receiving end 1a according to radio frequency envelope signal
Pwm signal, the first pressure regulation signal instruction and the second pressure regulation signal instruction, and it is defeated to the pwm signal of high-frequency switch circuit module 12
Enter to hold 12a to send pwm signal, sends the first tune respectively to the first pressure regulation signal output end 1b and the second pressure regulation signal output end 1c
Press signal instruction and the second pressure regulation signal instruction.It should be noted that signal instruction module 11 is generated according to radio frequency envelope signal
Pwm signal, the first pressure regulation signal instruction and the second pressure regulation signal instruction are that those skilled in the art can be according to prior art original
Reason and realize.High-frequency switch circuit module 12 also has the second positive terminal 12b, the second negative pole end 12c and output end 12d,
In, the second positive terminal 12b is connected to the first power input 1d, and the second negative pole end 12b is connected to second source input terminal 1e, defeated
Outlet 12d is connected to power output end 1f, high-frequency switch circuit module 12 with the second positive terminal 12b and the second negative pole end 12c it
Between the voltage that loads as input voltage, and according to the defeated of the received pwm signal adjustment output end 1f of pwm signal input terminal 12a
Voltage out.It should be noted that high-frequency switch circuit module 12 generates pwm signal according to radio frequency envelope signal, the first pressure regulation is believed
Number instruction and the second pressure regulation signal instruction, and to the pwm signal input terminal 12a of high-frequency switch circuit module 12 send pwm signal,
The first pressure regulation signal instruction and second is sent respectively to the first pressure regulation signal output end 1b and the second pressure regulation signal output end 1c to adjust
Press signal instruction, be that those skilled in the art can realize according to prior art principle, high-frequency switch circuit module 12 with
The voltage loaded between second positive terminal 12b and the second negative pole end 12c is as input voltage, and according to pwm signal input terminal 12a
The output voltage of received pwm signal adjustment output end 1f, can also by those skilled in the art according to prior art principle and
It realizes.
As shown in Fig. 2, the first pressure regulation signal output end 1b is electrically connected when envelope-tracking chip circuit 1 is connect with external circuit
The first pressure regulation the signal receiving end 2a, the second pressure regulation signal output end 1c for being connected to voltage-regulating switching power source 2 at a slow speed is electrically connected to first
Second pressure regulation signal receiving end 3a of voltage source 3, the first power input 1d are electrically connected to the anode of first voltage source 3, and second
Power input 1e is electrically connected to the cathode of first voltage source 3 and the anode of voltage-regulating switching power source 2, power output end 1f are logical at a slow speed
The drain electrode that filter circuit 5 is electrically connected to power amplifier 4 is crossed, at a slow speed the cathode ground connection of voltage-regulating switching power source 2.Wherein, power is put
Big device 4 is base station radio-frequency power amplifier.At a slow speed voltage-regulating switching power source 2 according to the first pressure regulation signal instruction adjust its anode and
Voltage between cathode.First voltage source 3 adjusts the voltage between its anode and cathode according to the second pressure regulation signal instruction.At a slow speed
Voltage-regulating switching power source 2 and first voltage source 3 are DC voltage source.Filter circuit 5 is low-pass filter circuit, and the utility model is real
It applies in example, power output end 1f, which must connect low-pass filter circuit, could generate envelope voltage, not be from envelope-tracking chip circuit 1
Directly generation envelope voltage, which exports, gives base station radio-frequency power amplifier.About voltage-regulating switching power source 2 at a slow speed according to the first pressure regulation
Signal instruction adjusts voltage between its anode and cathode and first voltage source 3 according to the second pressure regulation signal instruction adjusts it
Voltage between anode and cathode, is that those skilled in the art can realize according to prior art principle.
In a specific embodiment, signal instruction module 11 is FPGA (Field Programmable Gate
Array, field programmable gate array) chip.
In a specific embodiment, high-frequency switch circuit module 12 is multiphase interleaving BUCK circuit.
Fig. 3 is 12 circuit diagram of high-frequency switch circuit module using multiphase interleaving BUCK circuit.Embodiment illustrated in fig. 3
In multiphase interleaving BUCK circuit be four to be in parallel, corresponding have four groups of totally 16 pwm signals inputs, and four are in parallel
Multiphase interleaving BUCK circuit is modulated into four power supply outputs, exports after the filter circuit 5 of LC (inductance, capacitor) composition
To the drain electrode of power amplifier 4.
Referring also to shown in Fig. 1, Fig. 2, Fig. 3, in illustrated embodiment, high-frequency switch circuit module 12 is four groups of pwm signals
It inputs, pwm signal input terminal 12a indicates four groups of pwm signals inputs, high-frequency switch circuit module with four ports in Fig. 1, Fig. 2
12 be four power supply outputs, and the output end 12d and power output end 1f in Fig. 1, Fig. 2 indicate that four power supplys are defeated with four ports
Out.
It under the enlightenment of embodiment shown in Fig. 3, is in parallel if it is N, then corresponding pwm signal becomes N group 4 × N number of PWM
Input is adjusted to N number of power supply output.
With continued reference to shown in Fig. 3, due to using multiphase interleaving BUCK circuit, in turn, pwm signal is multiphase PWM letter
Number, every one-phase circuit in multiphase interleaving BUCK circuit all has a pair of with each phase pwm signal one of multiphase PWM signal
The pwm signal input terminal answered.
Further, every one-phase circuit in multiphase interleaving BUCK circuit includes first switch transistor Q1,
Two switching transistor Q2, the first driving circuit and the second driving circuit.Wherein, such as Fig. 3 and as shown in Figure 1, Figure 2, first opens
The drain electrode for closing transistor Q1 is the second positive terminal 12b of multiphase interleaving BUCK circuit, the source electrode of first switch transistor Q1
It is connected to the output end 1f.The drain electrode of second switch transistor Q2 is electrically connected to the source electrode of first switch transistor Q1, and second
The source electrode of switching transistor Q2 is the second negative pole end 12c of multiphase interleaving BUCK circuit.First driving circuit is connected to this
Between the pwm signal input terminal of phase BUCK circuit and the grid of first switch transistor Q1, to drive first switch transistor Q1
On and off.Second driving circuit is connected to the pwm signal input terminal and second switch transistor Q2 of phase BUCK circuit
Grid between, to drive the on and off of second switch transistor Q2.Wherein, when first switch transistor Q1 is connected the
Two switching transistor Q2 cut-off, when first switch transistor Q1 cut-off, second switch transistor Q2 is connected.About BUCK circuit
In driving circuit how to drive the on and off of rear class switching transistor, be that those skilled in the art can be according to existing skill
Art principle and realize.
First driving circuit includes the first signal conversion unit 121, first voltage adapter 122 and first grid driver
123.Wherein, the first signal conversion unit 121 is electrically connected to the pwm signal input terminal of phase BUCK circuit, is corresponded to receiving
The pwm signal of phase BUCK circuit, and by the received pwm signal of institute from LVDS (Low-Voltage Differential
Signaling, low-voltage differential signal) form is converted to TTL (Transistor-Transistor Logic, transistor-crystalline substance
Body pipe logic) level form (LVDS to TTL).First voltage adapter (voltage adapter) 122 is connected to the first letter
Number converting unit 121, the signal after the first signal conversion unit 121 is converted carry out voltage adjusting.First grid driving
Device (Gate drive) 123 is electrically connected between first voltage adapter 122 and the grid of first switch transistor Q1, with basis
The on and off of voltage signal driving first switch transistor Q1 after the conciliation of first voltage adapter 122.
Second driving circuit includes second signal converting unit 124, second voltage adapter 125 and second grid driver
126.Wherein, second signal converting unit 124 is electrically connected to the pwm signal input terminal of phase BUCK circuit, is corresponded to receiving
The pwm signal of phase BUCK circuit, and the received pwm signal of institute is converted into transistor-crystalline substance from low-voltage differential signal form
Body pipe logic level form.Second voltage adapter 125 is connected to second signal converting unit 124, and second signal is converted
Signal after unit 124 is converted carries out voltage adjusting.Second grid driver 126 is electrically connected to second voltage adapter 125
Between the grid of second switch transistor Q2, second is driven with the voltage signal after reconciling according to second voltage adapter 125
The on and off of switching transistor Q2.
About the first signal conversion unit 121, first voltage adapter 122, first grid driver 123, second signal
The specific structure and the course of work of converting unit 124, second voltage adapter 125 and second grid driver 126, are this fields
Technical staff can realize according to prior art principle.
In a specific embodiment, first switch transistor Q1 and second switch transistor Q2 is gallium nitride field effect
Transistor, i.e. GaN (Gallium Nitride) FET (Field Effect Transistor).
With continued reference to shown in Fig. 3, pwm signal input terminal receives pwm signal by isolator.In addition, the first driving circuit
It is powered with the second driving circuit by isolated power supply.
In the utility model embodiment, at a slow speed voltage-regulating switching power source 2 according to the first pressure regulation signal instruction adjust its anode and
Voltage between cathode.First voltage source 3 adjusts the voltage between its anode and cathode according to the second pressure regulation signal instruction.Its
In, voltage-regulating switching power source 2 and first voltage source 3 are DC voltage source at a slow speed.The voltage output model of voltage-regulating switching power source 2 at a slow speed
It encloses for 11~18V.The voltage output range of first voltage source 3 is 36~48V.High-frequency switch circuit module 12 issue envelope with
The highest bandwidth of track voltage (i.e. the envelope-tracking voltage of tracking chip circuit 1 sending) is 40MHz, and the maximum amplitude of oscillation is 25V, envelope
Floating voltage range is 30~54V.
In the utility model embodiment, power amplifier 4 is base station radio-frequency power amplifier.
As shown in Figures 2 and 3, the power output end 1f for tracking chip circuit 1 is electrically connected to power by filter circuit 5 and puts
The drain electrode of big device 4.Wherein, filter circuit 5 is by including the filter of two stage filter circuit, respectively first order filter circuit and the second level
Wave circuit, wherein the first order is the filter circuit corresponding to each phase BUCK circuit, by low-pass filtering inductance L1 and low-pass filtering electricity
Hold C1 composition, every circuitry phase in parallel connection BUCK circuit staggered for four has independent first order filter circuit progress all the way
It is corresponding.Wherein, one end of low-pass filtering inductance L1 is electrically connected to the source electrode and second switch transistor of first switch transistor Q1
The drain electrode of Q2, i.e. one end of low-pass filtering inductance L1 can be connected to the power output end 1f of tracking chip circuit 1.Low-pass filtering electricity
The other end of sense L1 is electrically connected to another grade of filter circuit.One end of low-pass filtering capacitor C1 is electrically connected to low-pass filtering inductance L1
The other end, low-pass filtering capacitor C1 the other end ground connection.Second level filter circuit is made of inductance L2 and capacitor C2.Wherein,
One end of inductance L2 is electrically connected to the other end of low-pass filtering inductance L1, and the other end of inductance L2 is electrically connected to power amplifier 4
Drain electrode.One end of capacitor C2 is electrically connected to the other end of inductance L2, the other end ground connection of capacitor C2.In Fig. 1 to shown in Fig. 3
In embodiment, parallel connection BUCK circuit staggered for four, first order filter circuit is also four, corresponds respectively to each circuitry phase,
Second level filter circuit is one, while being connected to four first order filter circuits.Another question is, staggered for four
For parallel connection, corresponding there are four output, each output is PWM square wave, and four outputs must connect low-pass filter circuit just below
Envelope voltage is produced to power amplifier 4.
In the utility model embodiment, at a slow speed voltage-regulating switching power source be responsible for providing variable DC voltage (such as 11~
In 18V voltage range), it is low to the change rate requirement of its output voltage since its output voltage range is low, so being easier to reach
To high efficiency.High-frequency switch circuit module 12 is responsible for the voltage output of change rate upper section, due to a part of output voltage and
Power is shared by low speed voltage-regulating switching power source, is reduced to the pressure resistance of switching device in high-frequency switch circuit module 12 and is passed through function
The specification requirement of rate, so more easily reacing smaller parasitic parameter to reach better performance.In a specific embodiment
In, the output voltage of first voltage source 3 is for example in 36~48V voltage range.In the specific implementation, voltage-regulating switching power source at a slow speed
2 use a fixed voltage, which can change according to whole dynamic voltage adjustment range, to guarantee high-frequency switch circuit 13
Output is in a demand voltage range, such as 30~54V and/or 20~38V, interior variation.As a specific embodiment, high frequency
The envelope-tracking voltage (the leakage pressure for being supplied to power amplifier) that on-off circuit module 12 (i.e. envelope-tracking chip circuit 1) issues
Highest bandwidth be 40MHz, the maximum amplitude of oscillation is 25V, and typical envelope-tracking voltage range is 30~54V.Referring specifically to
Illustrate below.
Voltage-regulating switching power source 2 and the output of first voltage source 3 are DC voltage at a slow speed, and voltage value is according to envelope-tracking electricity
Press minimum value and maximum value adjustment.Envelope-tracking voltage minimum is set as DCmin, envelope-tracking voltage max is DCmax, slowly
Fast 2 output voltage of voltage-regulating switching power source meets equation:
DCmin-(DCmax-DCmin)/0.5 × 0.25=1.5 × DCmin-0.5×DCmax
3 output voltage of first voltage source meets equation:
(DCmax-DCmin)/0.5 × 0.25=2 × DCmax-2×DCmin
For example, the range of envelope-tracking voltage is 30~54V (DCmax=54V, DCmin=30V) when, according to above-mentioned calculating
Equation is available:
2 output voltage of voltage-regulating switching power source is 1.5 × DC at a slow speedmin-0.5×DCmax=18V；
3 output voltage of first voltage source is 2 × DCmax-2×DCmin=48V.
For another example, the range of envelope-tracking voltage is 20~38V (DCmax=38V, DCmin=20V) when, according to above-mentioned calculating
Equation is available:
2 output voltage of voltage-regulating switching power source is 1.5 × DC at a slow speedmin-0.5×DCmax=11V；
3 output voltage of first voltage source is 2 × DCmax-2×DCmin=36V.
In the utility model embodiment, envelope voltage is the information that fpga chip can be known in advance, fpga chip according to
Envelope voltage value generates pwm signal, and then pwm signal finally controls multiphase after the first driving circuit and the second driving circuit
First switch transistor Q1 and second switch transistor Q2 in crisscross parallel BUCK circuit open shutdown according to certain timing.
Fig. 4 is the voltage's distribiuting schematic diagram that the envelope-tracking chip circuit of the utility model embodiment exports.This is practical new
In type embodiment, using the structure of envelope-tracking chip circuit 1, so that by high-frequency switch circuit module 12 and first voltage
The rapid pressure adjusting Switching Power Supply and Switching Power Supply 2 constitutes a kind of series relationship at a slow speed that source 3 collectively constitutes, figure 4, it is seen that
It (is the DC voltage of 18V) in Fig. 4, first voltage source 3 is responsible for the fast of 18V-54V that voltage-regulating switching power source 2, which is responsible for 0V to 18V, at a slow speed
Speed variation voltage segment, curved portion are fast-changing voltage (the i.e. envelope-tracking core that high-frequency switch circuit module 12 exports
The voltage that piece circuit 1 exports).
It is fast for being collectively constituted by high-frequency switch circuit module 12 and first voltage source 3 in the utility model embodiment
For fast voltage-regulating switching power source, in order to quickly make voltage change response, working frequency is higher, for the packet of 20MHz
Network voltage, the working frequency of rapid pressure adjusting Switching Power Supply are often tens megahertzs (MHz), and the time in such a period only has
Tens nanoseconds, Switching Power Supply need certain dead time to ensure being not in that upper down tube is common, duty effective in this way
Than that can be limited, it is generally the case that for the working frequency of 30MHz, effective duty cycle range only has 25% to 75%.For existing
The technical solution for thering is single supply to power, if the variation range of output voltage is 30V-54V, the supply voltage needs inputted
120V could export 30V voltage in 25% duty ratio in this way, and if slow-action presses off using the embodiment of the utility model
In the case that the powered-down output of source 2 is 18V, the supply voltage of high-frequency switch circuit module 12 is only needed using 48V, in 25%-
In 75% duty ratio section, the output area of high-frequency switch circuit module 12 is 12V-36V, with voltage-regulating switching power source 2 at a slow speed
Output series connection 18V series connection, total output voltage range is 30V-54V.
It is further described below with reference to the voltage's distribiuting under a concrete application scene of Fig. 5, Fig. 6.Wherein, Fig. 5
For the peak period voltage's distribiuting schematic diagram under a concrete application scene of the utility model embodiment, Fig. 6 is the application scenarios
Under low peak period voltage's distribiuting schematic diagram.It is assumed that having two periods of peak period and low peak period, peak period and low peak period in one day
The envelope range value requirement of corresponding radiofrequency signal is different, and peak period output voltage exists in 30V-54V, low peak period output voltage
20V-38V.In the peak period period of Fig. 5, the output voltage setting of voltage-regulating switching power source 2 is 18V, first voltage source 3 at a slow speed
Output voltage setting be 48V, can guarantee in this way the output voltage values of the envelope-tracking voltage of peak period 30V-54V it
Between.In the low peak period period of Fig. 6, it is only necessary to by the output voltage setting of voltage-regulating switching power source 2 at a slow speed be 11V, by first electricity
The output voltage setting of potential source 3 is 36V, in this way in the output voltage values of the envelope-tracking voltage of low peak period between 20V-38V.
Fig. 7 is the voltage's distribiuting schematic diagram of existing single supply technical solution.In existing single supply technical solution, it is ensured that low
The output voltage values of the envelope-tracking voltage of peak phase are between 20V-38V, then single supply power supply needs 80V, it is ensured that peak period
Envelope-tracking voltage output voltage values between 30V-54V, then single supply power supply needs 120V.
It is by comparison as can be seen that the supply voltage that the technical solution of existing single supply needs is up to 120V, then therein
Switching device needs to select minimum 150V or more, and for the embodiment of the utility model, supply voltage only needs 48V, for opening
Device is closed, supply voltage is higher, and the conduction impedance of switching device is bigger, and it is lower to eventually result in efficiency, passes through present techniques
On the one hand scheme can reduce stresses of parts, improve reliability, the efficiency of whole system on the other hand can be improved.
Existing patent CN102624339B discloses a kind of cascaded structure envelope tracking power supply and its control system.It is wrapped
It includes A class linear amplifier, output voltage controlling circuit and staircase voltage and generates unit, wherein output voltage controlling circuit packet
Include sample circuit, voltage regulator, difference isolation signals transfer circuit and gain match circuit；The output of A class linear amplifier
Voltage and staircase voltage generate the superimposed formation output voltage of output voltage of unit, the output voltage through over-sampling circuit with
Reference voltage compares, and error signal is adjusted through voltage regulator, successively via difference isolation signals transfer circuit and increasing
Beneficial match circuit is transferred to A class linear amplifier, another input end grounding of the difference isolation signals transfer circuit, thus real
The closed loop of existing envelope tracking electric power output voltage is adjusted.
Compared with the technical solution of patent CN102624339B, the utility model embodiment is in output voltage controlling circuit portion
It is entirely different to set up meter separately, and it is discrete that the patent staircase voltage, which generates unit output voltage, and the utility model is implemented
Either still voltage-regulating switching power source, the voltage exported are all continuous to rapid pressure adjusting Switching Power Supply to example at a slow speed.In addition the patent
Using linear amplifier, and the utility model embodiment uses Switching Power Supply, the switch power efficiency meeting when linear accounting is larger
It is apparently higher than linear amplifier.
Existing patent CN103518322A discloses a kind of digital envelope amplifying circuit.Comprising: which digital envelope is believed
Number processor for generating digital envelope according to a pair of of digital quadrature signal, and the digital envelope is processed into
High-frequency digital envelope signal and low frequency digital envelope signal；High-frequency impulse width/Density Modulator, with the digital envelope
Processor is connected, for the high-frequency digital envelope signal to be processed into the first high-frequency signal by pulse width/density modulation；
Low frequency pulse width/Density Modulator is connected with the digital envelope processor, for believing the low frequency digital envelope
Number the first low frequency signal is processed by pulse width/density modulation；HF switch driver, with the high-frequency impulse width/
Density Modulator is connected, and is used for the first high-frequency signal enhanced processing into the second high-frequency signal；Low frequency switch driver, with
Low frequency pulse width/the Density Modulator is connected, for first low frequency signal to be passed through enhanced processing into the second low frequency
Signal；Integrator is connected with the HF switch driver and the low frequency switch driver respectively, for high by described second
Frequency signal and the second low frequency signal are integrated into analogue envelope signal.
Compared with the technical solution of patent CN103518322A, in the utility model embodiment, high frequency switch power with it is low
Frequency Switching Power Supply is series relationship, and the high frequency section and low frequency part in the patent are that parallel connection is carried out by integrator, should
Patent and the utility model embodiment are entirely different in structure.In addition the utility model embodiment be able to solve the patent and
The higher problem of the supply voltage of connection relationship, while being able to solve the interference problem of height frequency intersection.
The envelope-tracking chip circuit of the utility model, by signal instruction module and the module integrated Cheng Xin of high-frequency switch circuit
Sheet form, to reduce circuit volume and occupied space.In addition, using the envelope-tracking chip of the utility model and according to packet
Network waveform, forms the series relationship using two Switching Power Supplies, one of them adjusts at a slow speed output voltage, provides variable straight
Galvanic electricity laminate section, another quickly adjusts output voltage, provides high frequency section energy, compared to existing Switching Power Supply ledger line
For power source combination mode, slow-action splenium component efficiency is higher than linear power supply, and rapid pressure adjusting part is opened than what the prior art needed
It is small to close device pressure resistance, has the advantages that whole efficiency improves and switching device voltage stress reduces in this way.
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
Within the spirit and principle of utility model, any modification, equivalent substitution, improvement and etc. done should be included in the utility model
Within the scope of protection.
Claims (10)
1. a kind of envelope-tracking chip circuit, it is characterised in that:
The envelope-tracking chip circuit includes signal instruction module and high-frequency switch circuit module, the envelope-tracking chip electricity
Road has radio frequency envelope signal receiving end, the first pressure regulation signal output end, the second pressure regulation signal output end, the first power input
End, second source input terminal and power output end；
In the envelope-tracking chip circuit:
The signal instruction module is connected to the radio frequency envelope signal receiving end, the first pressure regulation signal output end, described
The pulse width modulation (PWM) signal input part of second pressure regulation signal output end and the high-frequency switch circuit module, with from described
Radio frequency envelope signal receiving end receives radio frequency envelope signal, generates pwm signal according to the radio frequency envelope signal, the first pressure regulation is believed
Number instruction and the second pressure regulation signal instruction, and PWM letter is sent to the pwm signal input terminal of the high-frequency switch circuit module
Number, Xiang Suoshu the first pressure regulation signal output end and the second pressure regulation signal output end send respectively the first pressure regulation signal instruction and
The second pressure regulation signal instruction；
The high-frequency switch circuit module also has the second positive terminal, the second negative pole end and output end, wherein second anode
End is connected to first power input, and second negative pole end is connected to the second source input terminal, the output end
It is connected to the power output end, the high-frequency switch circuit module is between second positive terminal and second negative pole end
The voltage of load adjusts according to the pwm signal output voltage of the output end as input voltage.
2. envelope-tracking chip circuit according to claim 1, it is characterised in that:
The first pressure regulation signal output end is electrically connected to the first pressure regulation signal receiving end of a voltage-regulating switching power source at a slow speed, described
Second pressure regulation signal output end is electrically connected to the second pressure regulation signal receiving end of a first voltage source, first power input
Be electrically connected to the anode of the first voltage source, the second source input terminal be electrically connected to the first voltage source cathode and
The anode of the voltage-regulating switching power source at a slow speed, the power output end are electrically connected to the leakage of power amplifier by filter circuit
Pole, the cathode ground connection of the voltage-regulating switching power source at a slow speed；Wherein,
The power amplifier is base station radio-frequency power amplifier；
The voltage-regulating switching power source at a slow speed adjusts the voltage between its anode and cathode according to the first pressure regulation signal instruction；
The first voltage source adjusts the voltage between its anode and cathode according to the second pressure regulation signal instruction；
The voltage-regulating switching power source at a slow speed and the first voltage source are DC voltage source.
3. envelope-tracking chip circuit according to claim 1, it is characterised in that:
The signal instruction module is field programmable gate array FPGA chip.
4. envelope-tracking chip circuit according to claim 1, it is characterised in that:
The high-frequency switch circuit module is multiphase interleaving BUCK circuit；
The pwm signal is multiphase PWM signal, and every one-phase circuit in the multiphase interleaving BUCK circuit all has and institute
State the one-to-one pwm signal input terminal of each phase pwm signal of multiphase PWM signal.
5. envelope-tracking chip circuit according to claim 4, it is characterised in that:
Every one-phase circuit in the multiphase interleaving BUCK circuit includes first switch transistor, second switch crystal
Pipe, the first driving circuit, the second driving circuit；Wherein,
The drain electrode of the first switch transistor is second positive terminal of the multiphase interleaving BUCK circuit, described the
The source electrode of one switching transistor is connected to the output end；
The drain electrode of the second switch transistor is electrically connected to the source electrode of the first switch transistor, the second switch crystal
The source electrode of pipe is the second negative pole end of the multiphase interleaving BUCK circuit；
First driving circuit is connected to the pwm signal input terminal of phase BUCK circuit and the grid of the first switch transistor
Between pole, to drive the on and off of the first switch transistor；
Second driving circuit is connected to the pwm signal input terminal of phase BUCK circuit and the grid of the second switch transistor
Between pole, to drive the on and off of the second switch transistor；
Wherein, the second switch transistor cutoff when the first switch transistor turns, when the first switch crystal
Pipe second switch transistor turns when ending.
6. envelope-tracking chip circuit according to claim 5, it is characterised in that:
First driving circuit includes the first signal conversion unit, first voltage adapter and first grid driver；Wherein,
First signal conversion unit is electrically connected to the pwm signal input terminal of phase BUCK circuit, corresponds to the phase to receive
The pwm signal of BUCK circuit, and the received pwm signal of institute is converted into Transistor-Transistor from low-voltage differential signal form
Logic level form；
The first voltage adapter is connected to first signal conversion unit, and first signal conversion unit is turned
Signal after changing carries out voltage adjusting；
The first grid driver be electrically connected to the first voltage adapter and the first switch transistor grid it
Between, to drive the conducting of the first switch transistor according to the voltage signal after first voltage adapter conciliation and cut
Only.
7. envelope-tracking chip circuit according to claim 5, it is characterised in that:
Second driving circuit includes second signal converting unit, second voltage adapter and second grid driver；Wherein,
The second signal converting unit is electrically connected to the pwm signal input terminal of phase BUCK circuit, corresponds to the phase to receive
The pwm signal of BUCK circuit, and the received pwm signal of institute is converted into Transistor-Transistor from low-voltage differential signal form
Logic level form；
The second voltage adapter is connected to the second signal converting unit, and the second signal converting unit is turned
Signal after changing carries out voltage adjusting；
The second grid driver be electrically connected to the second voltage adapter and the second switch transistor grid it
Between, to drive the conducting of the second switch transistor according to the voltage signal after second voltage adapter conciliation and cut
Only.
8. envelope-tracking chip circuit according to claim 4, it is characterised in that:
The pwm signal input terminal receives the pwm signal by isolator.
9. envelope-tracking chip circuit according to claim 5, it is characterised in that:
First driving circuit and second driving circuit are powered by isolated power supply.
10. envelope-tracking chip circuit according to claim 2, it is characterised in that:
The voltage output range of the voltage-regulating switching power source at a slow speed is 11~18V；
The voltage output range of the first voltage source is 36~48V；
The highest bandwidth for the envelope-tracking voltage that the high-frequency switch circuit module issues is 40MHz, and the maximum amplitude of oscillation is 25V, packet
Network floating voltage range is 30~54V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821338428.7U CN208890648U (en) | 2018-08-20 | 2018-08-20 | A kind of envelope-tracking chip circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821338428.7U CN208890648U (en) | 2018-08-20 | 2018-08-20 | A kind of envelope-tracking chip circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208890648U true CN208890648U (en) | 2019-05-21 |
Family
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| CN201821338428.7U Active CN208890648U (en) | 2018-08-20 | 2018-08-20 | A kind of envelope-tracking chip circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208890648U (en) |
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2018
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