CN208849668U - Voltage raising and reducing charge pump, voltage management chip and device - Google Patents
Voltage raising and reducing charge pump, voltage management chip and device Download PDFInfo
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- CN208849668U CN208849668U CN201821598304.2U CN201821598304U CN208849668U CN 208849668 U CN208849668 U CN 208849668U CN 201821598304 U CN201821598304 U CN 201821598304U CN 208849668 U CN208849668 U CN 208849668U
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Abstract
The utility model discloses a kind of voltage raising and reducing charge pump, voltage management chip and devices, voltage raising and reducing charge pump only needs a charge-discharge circuit and five groups of switches, the function of boosting and decompression can be realized, simplify the structure of charge pump, it is greatly saved cost, reduces system power dissipation, improve system effectiveness, the technical issues of increasing the use and stand-by time of battery (group), can not working when low efficiency, supply voltage are low when overcoming high using supply voltage existing for linear voltage regulator in existing power supply management application.
Description
Technical field
The utility model relates to Analogous Integrated Electronic Circuits technical field more particularly to a kind of voltage raising and reducing charge pumps, voltage pipe
Manage chip and device.
Background technique
Current motor drives industry, and much application is powered using battery (group), when battery (group) electricity abundance, output voltage
Height, with the decline of battery (group) storing electricity, supply voltage can also decline accordingly, it might even be possible to drop below 50%.
Existing voltage management chip realizes the reduced output voltage of DC to DC using linear voltage regulator, and there are two drawbacks: one
It is in battery (group) electricity abundance, the difference comparsion between input voltage and output voltage is big, and the loss of linear voltage regulator is big,
Efficiency is very low, and reduce battery (group) uses time and stand-by time；Second is that input voltage is low when battery (group) electricity is low
In output voltage, linear voltage regulator cannot provide enough output again.
As charge pump is set in the system for needing battery, such as cellular phone, pager, Bluetooth system and portable electronic
Standby extensive utilization, the output power and efficiency of charge pump are also developed.Mainly application includes that driving is used for hand to charge pump
White light LEDs and the digital processing unit of milliwatt range of machine backlight etc..But existing intelligent electric power management (power manager) is answered
In, need to use two kinds of charge pumps of boosting and decompression, each charge pump needs a winged capacitor and four groups of switches.
How the function of boosting and decompression was not only realized, but also the structure of charge pump is made simply to become existing intelligent power pipe
Technical problem urgently to be resolved in ought to using.
Utility model content
The purpose of this utility model is that for the technical problems in the prior art, providing a kind of voltage raising and reducing electricity
Lotus pump, voltage management chip and device, only need a small amount of component to can be achieved with the function of boosting and be depressured, and simplify the knot of charge pump
Structure reduces system power dissipation.
To achieve the above object, the utility model provides a kind of voltage raising and reducing charge pump, the voltage raising and reducing charge pump
For receiving, boost mode control signal switches to boost mode or reception decompression mode control signal switches to decompression mode；
In boost mode, the voltage raising and reducing charge pump receives target boost voltage, carries out the target boost voltage from lifting
Pressure obtains the second reference voltage and exports；In decompression mode, the voltage raising and reducing charge pump receives input supply voltage, to institute
Input supply voltage is stated to carry out decompression the first reference voltage of acquisition and export.
To achieve the above object, the utility model additionally provides a kind of voltage management chip, the voltage management chip packet
Include voltage raising and reducing charge pump described in the utility model.
To achieve the above object, the utility model additionally provides a kind of voltage management device, the voltage management device packet
Include voltage raising and reducing charge pump described in the utility model.
Utility model has the advantages that the utility model is by introducing voltage raising and reducing charge pump, it is lower in supply voltage
When, voltage raising and reducing charge pump carries out Bootstrap in boost mode and carrys out output voltage, when supply voltage is higher
It waits, voltage raising and reducing charge pump is depressured in decompression mode carrys out output voltage, overcomes in existing power supply management application and adopts
The technical issues of can not working when low efficiency, supply voltage are low when the supply voltage existing for linear voltage regulator is high；And this is practical
The voltage raising and reducing charge pump of novel offer only needs a charge-discharge circuit and five groups of switches, and the function of boosting and decompression can be realized
Can, the structure of charge pump is simplified, cost is greatly saved, reduces system power dissipation, improve system effectiveness, increase electricity
The use and stand-by time in pond (group).The utility model can also realize closed loop controlled buck control, and can pass through control switch
The duty ratio of signal is controlled to realize the size of adjustment output voltage.
Detailed description of the invention
Fig. 1, the configuration diagram of voltage raising and reducing charge pump described in the utility model；
Fig. 2, the circuit diagram of an embodiment of voltage raising and reducing charge pump described in the utility model；
Fig. 3 A, the circuit diagram of voltage raising and reducing charge pump when simplified boost mode；
Fig. 3 B is part of nodes waveform diagram in circuit shown in Fig. 3 A；
Fig. 4 A, the circuit diagram of voltage raising and reducing charge pump when simplified decompression mode；
Fig. 4 B is part of nodes waveform diagram in circuit shown in Fig. 4 A；
Fig. 5, the flow chart of voltage management method described in the utility model.
Specific embodiment
The embodiments of the present invention is described below in detail, the example of the embodiment is shown in the accompanying drawings, wherein
Same or similar label indicates same or similar element or element with the same or similar functions from beginning to end.Lead to below
It crosses the embodiment being described with reference to the drawings to be exemplary, is only used for explaining the utility model, and should not be understood as practical to this
Novel limitation.In addition, the utility model repeat reference numerals and/or reference letter in different examples, this repetition be for
Simplified and clear purpose, itself do not indicate discussed various embodiments and/or be arranged between relationship.
Voltage raising and reducing charge pump described in the utility model switches to boost mode by receiving boost mode control signal
Or it receives decompression mode control signal and switches to decompression mode；In boost mode, the voltage raising and reducing charge pump receives mesh
Boost voltage is marked, Bootstrap the second reference voltage of acquisition is carried out to the target boost voltage and is exported；In decompression mode,
The voltage raising and reducing charge pump receives input supply voltage, carries out decompression to the input supply voltage and obtains the first reference voltage
And it exports.Wherein, input supply voltage is greater than target boost voltage, less than the pressure resistance of intelligent electric power management device；Target boosting
Voltage can be for example the 5V voltage in intelligent power.
Voltage raising and reducing charge pump provided by the utility model, when supply voltage is lower, voltage raising and reducing charge pump work
Make to carry out output voltage in boost mode progress Bootstrap, when supply voltage is higher, voltage raising and reducing charge pump exists
Decompression mode, which is depressured, carrys out output voltage, overcomes in existing power supply management application using the electricity of power supply existing for linear voltage regulator
The technical issues of can not working when low efficiency, supply voltage are low when pressing high.
With reference to Fig. 1, the configuration diagram of voltage raising and reducing charge pump described in the utility model.The voltage raising and reducing charge
Pump includes ON-OFF control circuit 11, switch arrays 12 and charge-discharge circuit 13.
The ON-OFF control circuit (Switch Control circuit) 11, for passing through the voltage raising and reducing charge pump
The 4th port Port-D receive boost mode control signal switch to boost mode or receive decompression mode control signal cut
Decompression mode is shifted to, and for receiving a clock signal clk, according to the phase sequence time reference control of the clock signal clk
Make the switch state switched in the switch arrays 12.
In boost mode, the ON-OFF control circuit 11 controls the switch arrays 12 according to the phase sequence time reference
Switch carry out closing or opening, pass through the second port of the voltage raising and reducing charge pump to control the charge-discharge circuit 13
Port-B receives the target boost voltage V1 and carries out Bootstrap to the target boost voltage, obtains second base
Quasi- voltage V2 is exported from the third port Port-C of the voltage raising and reducing charge pump.
In decompression mode, the ON-OFF control circuit 11 controls the switch arrays 12 according to the phase sequence time reference
Switch carry out closing or opening, pass through the first port of the voltage raising and reducing charge pump to control the charge-discharge circuit 13
Port-A receives the input supply voltage VIN and is depressured to the input supply voltage VIN, obtains first base
Quasi- voltage V1 is exported from the second port Port-B.Wherein, target boost voltage V1 and the first reference voltage V1 can be same
One voltage value.
Voltage raising and reducing charge pump provided by the utility model only needs a charge-discharge circuit and a switch arrays
The function of realizing boosting and decompression, simplifies the structure of charge pump, is greatly saved cost, reduces system power dissipation, improves
System effectiveness, increases the use and stand-by time of battery (group).
The charge-discharge circuit 13 can realize the function (i.e. removal capacitor) of capacitor, such charge and discharge digitally
Circuit 13 can integrate in the chips.The charge-discharge circuit 13 also may include a capacitor, and capacitor passes through switch arrays
12 access voltage raising and reducing charge pumps.
Optionally, the voltage raising and reducing charge pump further includes clock generating unit 14；Clock generating unit 14 is for exporting
Clock signal clk, to provide the phase sequence time reference for controlling the switch state switched in the switch arrays.Clock generating unit
14 can be an oscillator (Oscillator).In other embodiments, clock signal clk can also be generated by external circuit.
Preferably, the voltage raising and reducing charge pump further includes first voltage comparator CP1；First voltage comparator CP1's
First input end is electrically connected to the second port Port-B of voltage raising and reducing charge pump, and the second input terminal is for receiving one with reference to electricity
VREF is pressed, and its output end is electrically connected to ON-OFF control circuit 11.First voltage comparator CP1 in decompression mode for receiving
First reference voltage V1 of second port Port-B acquisition is simultaneously compared with reference voltage VREF, and is based on the first comparison result
Output first control signal turns off the switch control circuit 11；And it is opened based on the output second control signal starting of the second comparison result
Control circuit 11 is closed, realizes closed-loop control, keeps the first reference voltage V1 and reference voltage VREF dynamic equal.Specifically,
When one reference voltage V1 is more than or equal to reference voltage VREF, first voltage comparator CP1 obtains the first comparison result；In the first base
When quasi- voltage V1 is less than reference voltage VREF, first voltage comparator CP1 obtains the second comparison result；By introducing first voltage
Comparator CP1, the utility model can also realize closed loop controlled buck control.
With reference to Fig. 2, Fig. 3 A-3B and Fig. 4 A-4B, wherein Fig. 2 is voltage raising and reducing charge pump described in the utility model
The circuit diagram of one embodiment, the circuit diagram of voltage raising and reducing charge pump when Fig. 3 A is simplified boost mode, Fig. 3 B are Fig. 3 A
Part of nodes waveform diagram in shown circuit, the circuit signal of voltage raising and reducing charge pump when Fig. 4 A is simplified decompression mode
Figure, Fig. 4 B are part of nodes waveform diagram in circuit shown in Fig. 4 A.In the present embodiment, there are four voltage raising and reducing charge pump tools
Port (pin), respectively first port Port-A, second port Port-B, third port Port-C and the 4th port
Port-D；The function of boosting and decompression can be realized by a charge-discharge circuit and five groups of switches in voltage raising and reducing charge pump.
Specifically, the ON-OFF control circuit 11, for the 4th port Port-D by the voltage raising and reducing charge pump
Reception boost mode control signal Low, which switches to boost mode or receives decompression mode control signal High, switches to decompression mould
Formula, and for receiving a clock signal clk, to control the switch according to the phase sequence time reference of the clock signal clk
The switch state switched in array 12.Wherein, by the way that input supply voltage VIN to be compared with a pattern switching voltage VTH,
And output boost mode control signal or decompression mode control signal based on comparative result.Specifically, working as input supply voltage
When VIN is less than pattern switching voltage VTH, output boost mode controls signal High；When input supply voltage VIN is more than or equal to mould
When formula switches voltage VTH, output buck mode control signal Low.
Specifically, switch arrays 12, including five groups of switch S1-S5: one end of first switch S1 is electrically connected to first port
Port-A, the other end are electrically connected to the first node P1 of switch arrays 12；One end of second switch S2 is electrically connected to first segment
Point P1, the other end are electrically connected to second port Port-B；One end of third switch S3 is grounded, and the other end is electrically connected to switch
The second node P2 of array 12；One end of 4th switch S4 is electrically connected to second node P2, and the other end is electrically connected to second end
Mouth Port-B；One end of 5th switch S0 is electrically connected to the first node P1, and the other end is electrically connected to the third port
Port-C。
Charge-discharge circuit 13 is serially connected between first node P1 and second node P2.Specifically, charge-discharge circuit 13 uses
Capacitor C1 carries out the charge and discharge of input voltage, and the top crown of capacitor C1 is electrically connected to first node P1, and bottom crown is electrically connected
It is connected to second node P2.
Specifically, clock generating unit 124 (selectable unit (SU)) can be an oscillator (Oscillator), oscillator output
High frequency clock CLK, to provide the phase sequence time reference of switch S0~S4.
In boost mode, ON-OFF control circuit 11 controls first switch S1 and disconnects always, while according to the phase sequence time
Benchmark controls the 5th switch S0, second switch S2, third switch S3, the 4th switch S4 and turns off or be closed, so that described fill
Discharge circuit 13 receives target boost voltage by the second port Port-B and boots to the target boost voltage
Boosting obtains the second reference voltage V2 and exports from the third port Port-C.That is, when supply voltage is low, voltage raising and reducing
Charge pump disconnects always in Bootstrap mode, switch S1, and target boost voltage V1 is inputted by the port Port-B, after boosting
Voltage V2 is exported by the end Port-C, and the circuit diagram of voltage raising and reducing charge pump is as shown in Figure 3A when simplified boost mode.
Specifically, the phase sequence time reference includes the first boosting phase sequence and the second boosting phase sequence.In first boosting
Phase sequence, the ON-OFF control circuit 11 control the second switch S2, third switch S3 closure, while controlling the 5th switch
S0, the 4th switch S4 are disconnected, so that described in the charge-discharge circuit 13 is serially connected in by the second switch S2, third switch S3
Between second port Port-B and ground terminal GND, charged with receiving the target boost voltage V1.In the second boosting phase
Sequence, the ON-OFF control circuit 11 control the second switch S2, third switch S3 disconnection, while controlling the 5th switch
S0, the 4th switch S4 closure, so that described in the charge-discharge circuit 13 is serially connected in by the 5th switch S0, the 4th switch S4
It is logical to carry out Bootstrap acquisition the second reference voltage V2 between second port Port-B and the third port Port-C
Cross the third port Port-C output.Wherein, the time of the first boosting phase sequence and the second boosting phase sequence is at the first preset ratio.
By changing the time scale of the first boosting phase sequence and the second boosting phase sequence, the switch control letter of adjustable control switch array
Number duty ratio, to obtain the output voltage after different size of boosting.
Preferably, the voltage raising and reducing charge pump further includes the second diode D2；The anode electricity of the second diode D2
It is connected to the 5th switch S0, the cathode of the second diode D2 is electrically connected to the third port Port-C, and described
Two diode D2 are for stopping the electric current of the third port Port-C to flow backward.
Preferably, the voltage raising and reducing charge pump further includes third diode D3, the anode electricity of the third diode D3
It is connected to the first switch S1, the cathode of the third diode D3 is electrically connected to the first node P1, and the described 3rd 2
Pole pipe D3 is for stopping the electric current of first node P1 (capacitor C1) to flow backward.
The node waveform shown in Fig. 3 B: in the first boosting phase sequence Phase11, switch S2 and S3 of clock signal clk
Closure, switch S0 and S4 are disconnected；Capacitor C1 top crown meets Port-B, bottom crown meets GND, and voltage difference thereon is V1；?
Two boosting phase sequence Phase12, switch S2 and S3 disconnections, switch S0 and S4 closure；Capacitor C1 top crown is connect by diode D1
Port-C, bottom crown meet Port-B, ignore the forward conduction voltage drop of diode D1, and the voltage difference on capacitor C1 is V2-V1.When
When the time of first boosting phase sequence Phase11 and the second boosting phase sequence Phase12 are equal, due to the voltage protection on capacitor C1
Constant, so there is V1=V2-V1, i.e. V2=2V1, i.e. output voltage V2 are one times of input voltage V1；First boosting phase sequence
The time scale of the boosting of Phase11 and second phase sequence Phase12 is different, and the target of the output voltage V2 after boosting and input is boosted
Multiple formed by voltage V1 is than different.Wherein, V2 voltage specific capacitance when diode D1 is for preventing the second boosting phase sequence Phase12
Electric current when device C1 top crown voltage is high flows backward.Wherein, the voltage not instead of input supply voltage VIN of Port-B input, mesh
The the first reference voltage V1 (such as 5V in intelligent power) for marking boosting, needs the voltage with the input of Port-A when decompression mode
(i.e. input supply voltage VIN) is distinguished.The voltage of Port-A input is the input supply voltage VIN of intelligent power, needs to be greater than
First reference voltage V1 of Port-B input, less than the pressure resistance of intelligent power.
With continued reference to Fig. 2, in decompression mode, the ON-OFF control circuit 11 controls the 5th switch S0 and breaks always
It opens, simultaneously according to the phase sequence time reference control first switch S1, second switch S2, third switch S3, the 4th switch S4
It turns off or is closed, so that the charge-discharge circuit 13 receives the input supply voltage by the first port Port-A
VIN is simultaneously depressured the input supply voltage VIN, and it is defeated from the second port Port-B to obtain the first reference voltage V1
Out.That is, voltage raising and reducing charge pump disconnects always in decompression mode, switch S0 when supply voltage is high, input power electricity
Pressure VIN is inputted by the port Port-A, and voltage V1 is exported by the end Port-B after decompression, voltage raising and reducing charge when simplified decompression mode
The circuit diagram of pump is as shown in Figure 4 A.
Specifically, the phase sequence time reference further includes the first decompression phase sequence and the second decompression phase sequence.In first drop
Phase sequence is pressed, the ON-OFF control circuit 11 controls the first switch S1, the 4th switch S4 closure, while controlling described second and opening
It closes S2, third switch S3 to disconnect, so that the charge-discharge circuit 13 is serially connected in institute by the first switch S1, the 4th switch S4
It states between first port Port-A and the second port Port-B, to receive the input by the first port Port-A
Supply voltage VIN discharges.It is described second decompression phase sequence, the ON-OFF control circuit 11 control the first switch S1,
4th switch S4 is disconnected, while controlling the second switch S2, third switch S3 closure, so that the charge-discharge circuit 13 passes through
The second switch S2, third switch S3 are serially connected between ground terminal GND and the second port Port-B, to carry out decompression acquisition
First reference voltage V1 is exported by the second port Port-B.Wherein, first decompression phase sequence and second decompression phase sequence when
Between at the first preset ratio.By changing the time scale of the first decompression phase sequence and the second decompression phase sequence, adjustable control is opened
The duty ratio for closing the switch control signal of array, to obtain the output voltage after different size of decompression.
The node waveform shown in Fig. 4 B: first in clock signal clk is depressured phase sequence Phase21, switch S1 and S4
Closure, switch S2 and S3 are disconnected, and capacitor C1 top crown meets Port-A by diode D3, and bottom crown meets Port-B, ignores two
The forward conduction voltage drop of pole pipe D3, the voltage difference on capacitor C1 are VIN-V1；Phase sequence Phase22, switch S1 are depressured second
It is disconnected with S4, switch S2 and S3 closure, capacitor C1 top crown meet Port-B, and bottom crown connects GND, the voltage difference on capacitor C1
For V1.When the time of the first decompression phase sequence Phase21 and the second decompression phase sequence Phase22 are equal, due on capacitor C1
Voltage protection is constant, so there is VIN-V1=V1, i.e. VIN=2V1, i.e. output voltage V1 are the half of input voltage VIN.First
The time scale for being depressured the decompression of phase sequence Phase21 and second phase sequence Phase22 is different, the output voltage V1's and input after decompression
Multiple formed by input supply voltage VIN is than different.Wherein, electricity when diode D3 is for preventing the first decompression phase sequence Phase21
Container C1 top crown voltage flows backward than electric current of VIN voltage when high.
With continued reference to Fig. 4 A, in decompression mode, the defeated of the second port PortB is received by voltage comparator CP1
It voltage VOUT (i.e. the first reference voltage V1) and is compared out with reference voltage VREF.When VOUT is higher than VREF, voltage ratio
Control circuit 11 is turned off the switch compared with device CP1 output first control signal (low level enable signal EN), is turned off S1~S4,
Referred to as third decompression phase sequence Phase23 (as shown in Figure 4 B).It is depressured phase sequence Phase23 in third, VOUT voltage can be decreased until
Lower than VREF voltage, voltage comparator CP1 output second control signal (the enable signal EN of high level) starts switch control electricity
Road 11, ON-OFF control circuit 11 are controlled according to clock signal clk according to above-mentioned the first decompression phase sequence and the second decompression phase sequence
The closure and shutdown of switch S1~S4.By closed-loop control, keep output voltage VO UT and reference voltage VREF dynamic equal.
The utility model additionally provides a kind of voltage management chip, is integrated with the utility model in the voltage management chip
Above-mentioned voltage raising and reducing charge pump.Wherein, the charge-discharge circuit of voltage raising and reducing charge pump is also integrated in voltage management chip, and
The function (i.e. removal capacitor) of capacitor is realized by digital form.In other embodiments, the charge and discharge of voltage raising and reducing charge pump
Circuit also may include a capacitor, and capacitor is arranged in voltage management chip exterior, and opening by voltage raising and reducing charge pump
It closes array and accesses voltage raising and reducing charge pump.Specifically, the voltage raising and reducing charge pump can with reference to the above-mentioned Fig. 2 of the utility model,
Described in Fig. 3 A-3B, Fig. 4 A-4B, repeated description is no longer done herein.
The utility model additionally provides a kind of voltage management device, and the voltage management device includes that the utility model is above-mentioned
Voltage raising and reducing charge pump.Specifically, the voltage raising and reducing charge pump can with reference to the above-mentioned Fig. 2 of the utility model, Fig. 3 A-3B,
Described in Fig. 4 A-4B, repeated description is no longer done herein.
Fig. 5, the flow chart of voltage management method described in the utility model.The utility model additionally provides a kind of voltage pipe
Reason method, using the above-mentioned voltage raising and reducing charge pump of the utility model, described method includes following steps: S51: voltage raising and reducing electricity
Lotus pump receives boost mode control signal and switches to boost mode, or receives decompression mode control signal and switch to decompression
Mode；S52: in boost mode, the voltage raising and reducing charge pump receives target boost voltage, to the target boost voltage into
Row Bootstrap obtains the second reference voltage and exports；S53: in decompression mode, the voltage raising and reducing charge pump receives input
Supply voltage is depressured the input supply voltage, obtains the first reference voltage and exports.
Please also refer to Fig. 2, Fig. 3 A-3B, it is preferred that step S52 further comprises: in boost mode, the boosting
Step-down charge pump receives clock signal clk, controls the voltage raising and reducing electricity according to the phase sequence time reference of the clock signal clk
The switch state switched in the switch arrays 12 of lotus pump, to control the charge-discharge circuit 13 of the voltage raising and reducing charge pump to target
Boost voltage V1 carries out Bootstrap, and acquisition is stated the second reference voltage V2 and exported.Specifically, in boost mode, switch control
Circuit 11 processed controls first switch S1 and disconnects always, while controlling the 5th switch S0, second switch according to the phase sequence time reference
S2, third switch S3, the 4th switch S4 are turned off or are closed, so that the charge-discharge circuit 13 passes through the second port
Port-B receive target boost voltage simultaneously to the target boost voltage carry out Bootstrap, obtain the second reference voltage V2 from
The third port Port-C output.That is, when supply voltage is low, voltage raising and reducing charge pump in Bootstrap mode,
Switch S1 is disconnected always, and target boost voltage V1 is inputted by the port Port-B, and voltage V2 is exported by the end Port-C after boosting, is simplified
Boost mode when voltage raising and reducing charge pump circuit diagram it is as shown in Figure 3A.
Preferably, the phase sequence time reference includes the first boosting phase sequence and the second boosting phase sequence.In first boosting
Phase sequence, the voltage raising and reducing charge pump control charge-discharge circuit 13 receive the target boost voltage V1 and charge；?
The second boosting phase sequence, the voltage raising and reducing charge pump obtain the second reference voltage V2 and export.Wherein, described first
The time of phase sequence of boosting and the second boosting phase sequence is at the first preset ratio.By changing the first boosting phase sequence and the second boosting
The time scale of phase sequence, the duty ratio of the switch control signal of adjustable control switch array 12, to obtain different size
Boosting after output voltage (the second reference voltage V2 exported is adjustable).Specifically, in the first boosting phase sequence, it is described
ON-OFF control circuit 11 controls the second switch S2, third switch S3 closure, while controlling the 5th switch S0, the 4th opening
It closes S4 to disconnect, so that the charge-discharge circuit 13 is serially connected in the second port by the second switch S2, third switch S3
Between Port-B and ground terminal GND, charged with receiving the target boost voltage V1.It is described in the second boosting phase sequence
ON-OFF control circuit 11 controls the second switch S2, third switch S3 disconnection, while controlling the 5th switch S0, the 4th opening
S4 closure is closed, so that the charge-discharge circuit 13 is serially connected in the second port by the 5th switch S0, the 4th switch S4
Between Port-B and the third port Port-C, the second reference voltage V2 is obtained by described the to carry out Bootstrap
Three port Port-C output.Wherein, the time of the first boosting phase sequence and the second boosting phase sequence is at the first preset ratio.Pass through change
The time scale of first boosting phase sequence and the second boosting phase sequence, the duty of the switch control signal of adjustable control switch array
Than to obtain the output voltage after different size of boosting.
Please also refer to Fig. 2, Fig. 4 A-4B, it is preferred that step S53 further comprises: in decompression mode, the boosting
Step-down charge pump receives clock signal clk, controls the voltage raising and reducing electricity according to the phase sequence time reference of the clock signal clk
The switch state switched in the switch arrays 12 of lotus pump, to control 13 pairs of charge-discharge circuit inputs of the voltage raising and reducing charge pump
Supply voltage VIN is depressured, and is obtained the first reference voltage V1 (the target boost voltage as under boost mode) and is exported.Tool
Body, in decompression mode, the ON-OFF control circuit 11 controls the 5th switch S0 and disconnects always, simultaneously according to the phase sequence
Time reference controls the first switch S1, second switch S2, third switch S3, the 4th switch S4 and turns off or be closed, and makes
The charge-discharge circuit 13 is obtained by the first port Port-A reception input supply voltage VIN and to the input
Supply voltage VIN is depressured, and is obtained the first reference voltage V1 and is exported from the second port Port-B.That is, when power supply electricity
When pressing high, voltage raising and reducing charge pump disconnects always in decompression mode, switch S0, and input supply voltage VIN is by the end Port-A
Mouthful input, voltage V1 is exported by the end Port-B after decompression, the circuit diagram of voltage raising and reducing charge pump when simplified decompression mode
As shown in Figure 4 A.
Preferably, the phase sequence time reference further includes the first decompression phase sequence and the second decompression phase sequence.In first drop
Phase sequence is pressed, the voltage raising and reducing charge pump controls the reception of the charge-discharge circuit 13 input supply voltage VIN and discharges；Institute
The second decompression phase sequence is stated, the voltage raising and reducing charge pump obtains the first reference voltage V1 and exports.Wherein, the first decompression phase
The time of sequence and the second decompression phase sequence is at the second preset ratio.Phase sequence is depressured by changing the first decompression phase sequence and second
Time scale, the duty ratio of the switch control signal of adjustable control switch array 12, to obtain different size of decompression
Output voltage afterwards (the first reference voltage V1 exported is adjustable).Specifically, in the first decompression phase sequence, the switch control
Circuit 11 processed controls the first switch S1, the 4th switch S4 closure, while it is disconnected to control the second switch S2, third switch S3
It opens, so that the charge-discharge circuit 13 is serially connected in the first port Port-A by the first switch S1, the 4th switch S4
Between the second port Port-B, carried out with receiving the input supply voltage VIN by the first port Port-A
Electric discharge.In the second decompression phase sequence, the ON-OFF control circuit 11 controls the first switch S1, the 4th switch S4 disconnection,
Simultaneously control the second switch S2, third switch S3 closure so that the charge-discharge circuit 13 pass through the second switch S2,
Third switch S3 is serially connected between ground terminal GND and the second port Port-B, obtains the first reference voltage V1 to carry out decompression
It is exported by the second port Port-B.Wherein, the time of the first decompression phase sequence and the second decompression phase sequence is at the first default ratio
Example.By changing the time scale of the first decompression phase sequence and the second decompression phase sequence, the switch control of adjustable control switch array
The duty ratio of signal processed, to obtain the output voltage after different size of decompression.
Please also refer to Fig. 4 A, it is preferred that step S53 further comprises: in decompression mode, the voltage raising and reducing charge
Pump compares its output voltage VO UT (i.e. a first reference voltage V1) and reference voltage VREF, and is exported based on the first comparison result
First control signal controls all switches in the switch arrays 12 and disconnects.Specifically, output is high when VOUT is higher than VREF
The enable signal EN of level is turned off S1~S4 of switch arrays 12, and referred to as third is depressured phase sequence Phase23 (such as Fig. 4 B institute
Show).The voltage raising and reducing charge pump is based further on the second comparison result output second control signal and controls the switch arrays
Switch in 12 realizes closed-loop control, makes the output electricity according to the first decompression phase sequence and the second decompression phase sequence work
Press VOUT and reference voltage VREF dynamic equal.Specifically, receiving institute by voltage comparator CP1 in decompression mode
It states the output voltage VO UT (i.e. the first reference voltage V1) of second port PortB and is compared with reference voltage VREF.When
When VOUT is higher than VREF, voltage comparator CP1 output first control signal (low level enable signal EN) turns off the switch control
Circuit 11, is turned off S1~S4, referred to as third decompression phase sequence Phase23 (as shown in Figure 4 B).Phase sequence is depressured in third
Phase23, VOUT voltage can be decreased until below VREF voltage, and voltage comparator CP1 output second control signal be (high level
Enable signal EN) control circuit 11 is started switch, ON-OFF control circuit 11 is according to clock signal clk according to the first above-mentioned decompression
Phase sequence and the second decompression phase sequence carry out the closure and shutdown of control switch S1~S4.By closed-loop control, make output voltage VO UT and
Reference voltage VREF dynamic is equal.
The above is only the preferred embodiment of the utility model, it is noted that for the common skill of the art
Art personnel can also make several improvements and modifications without departing from the principle of this utility model, these improvements and modifications
Also it should be regarded as the protection scope of the utility model.
Claims (15)
1. a kind of voltage raising and reducing charge pump, which is characterized in that the voltage raising and reducing charge pump is for receiving boost mode control letter
It number switches to boost mode or receives decompression mode control signal and switch to decompression mode；
In boost mode, the voltage raising and reducing charge pump receives target boost voltage, carries out certainly to the target boost voltage
Lifting pressure obtains the second reference voltage and exports；
In decompression mode, the voltage raising and reducing charge pump receives input supply voltage, drops to the input supply voltage
Pressure obtains the first reference voltage and exports.
2. voltage raising and reducing charge pump as described in claim 1, which is characterized in that by by the input supply voltage VIN with
One pattern switching voltage VTH is compared, and output boost mode control signal or decompression mode control based on comparative result
Signal.
3. voltage raising and reducing charge pump as described in claim 1, which is characterized in that the voltage raising and reducing charge pump includes switch control
Circuit, switch arrays and charge-discharge circuit processed；
The ON-OFF control circuit receives the boost mode for the 4th port by the voltage raising and reducing charge pump and controls
Signal, which switches to boost mode or receives the decompression mode control signal, switches to decompression mode, and for receiving for the moment
Clock signal, to control the switch state switched in the switch arrays according to the phase sequence time reference of the clock signal；
In boost mode, the ON-OFF control circuit according to the phase sequence time reference control the switches of the switch arrays into
Row closing or opening receives the target to control the charge-discharge circuit by the second port of the voltage raising and reducing charge pump
Boost voltage simultaneously carries out Bootstrap to the target boost voltage, obtains second reference voltage from the voltage raising and reducing
The third port of charge pump exports；
In decompression mode, the ON-OFF control circuit according to the phase sequence time reference control the switches of the switch arrays into
Row closing or opening receives the input to control the charge-discharge circuit by the first port of the voltage raising and reducing charge pump
Supply voltage is simultaneously depressured the input supply voltage, obtains first reference voltage and exports from the second port.
4. voltage raising and reducing charge pump as claimed in claim 3, which is characterized in that the voltage raising and reducing charge pump further includes clock
Generate unit；The clock generating unit is for exporting the clock signal, with what is switched in the offer control switch arrays
The phase sequence time reference of switch state.
5. voltage raising and reducing charge pump as claimed in claim 3, which is characterized in that the switch arrays, including five groups of switches:
One end of first switch is electrically connected to the first port, and the other end is electrically connected to the first segment of the switch arrays
Point；
One end of second switch is electrically connected to the first node, and the other end is electrically connected to the second port；
One end ground connection of third switch, the other end are electrically connected to the second node of the switch arrays；
One end of 4th switch is electrically connected to the second node, and the other end is electrically connected to the second port；
One end of 5th switch is electrically connected to the first node, and the other end is electrically connected to the third port；
The charge-discharge circuit is serially connected between the first node and the second node；
In boost mode, the ON-OFF control circuit controls the first switch and disconnects always, simultaneously according to the phase sequence time
Benchmark controls the 5th switch, second switch, third switch, the 4th switch and turns off or be closed, so that the charge and discharge
Circuit receives the target boost voltage by the second port and carries out Bootstrap to the target boost voltage, obtains
Second reference voltage is taken to export from the third port；
In decompression mode, ON-OFF control circuit control the 5th switch is disconnected, always simultaneously according to the phase sequence time
Benchmark controls the first switch, second switch, third switch, the 4th switch is turned off or is closed, so that the charge and discharge
Circuit receives the input supply voltage by the first port and is depressured to the input supply voltage, obtains institute
The first reference voltage is stated to export from the second port.
6. voltage raising and reducing charge pump as claimed in claim 5, which is characterized in that the phase sequence time reference includes the first boosting
Phase sequence and the second boosting phase sequence；
In the first boosting phase sequence, the ON-OFF control circuit controls the second switch, third closes the switch, and controls simultaneously
5th switch, the 4th switch disconnect, so that the charge-discharge circuit is serially connected in institute by the second switch, third switch
It states between second port and ground terminal, is charged with receiving the target boost voltage；
In the second boosting phase sequence, the ON-OFF control circuit controls the second switch, third switch disconnects, and controls simultaneously
5th switch, the 4th close the switch, so that the charge-discharge circuit is serially connected in institute by the 5th switch, the 4th switch
It states between second port and the third port, passes through the third end to carry out Bootstrap acquisition second reference voltage
Mouth output；
Wherein, the time of the first boosting phase sequence and the second boosting phase sequence is at the first preset ratio.
7. voltage raising and reducing charge pump as claimed in claim 5, which is characterized in that the voltage raising and reducing charge pump further includes second
Diode, the anode of second diode are electrically connected to the 5th switch, and the cathode of second diode is electrically connected to
The third port.
8. voltage raising and reducing charge pump as claimed in claim 5, which is characterized in that the voltage raising and reducing charge pump further includes third
Diode, the anode of the third diode are electrically connected to the first switch, and the cathode of the third diode is electrically connected to
The first node.
9. voltage raising and reducing charge pump as claimed in claim 5, which is characterized in that the phase sequence time reference further includes the first drop
Press phase sequence and the second decompression phase sequence；
In the first decompression phase sequence, the ON-OFF control circuit controls the first switch, the 4th closes the switch, and controls simultaneously
The second switch, third switch disconnect, so that the charge-discharge circuit is serially connected in institute by the first switch, the 4th switch
It states between first port and the second port, is discharged with receiving the input supply voltage by the first port；
In the second decompression phase sequence, the ON-OFF control circuit controls the first switch, the 4th switch disconnects, and controls simultaneously
The second switch, third close the switch, so that the charge-discharge circuit is serially connected in ground by the second switch, third switch
Between end and the second port, exported with carrying out decompression acquisition first reference voltage by the second port；
Wherein, the time of the first decompression phase sequence and the second decompression phase sequence is at the second preset ratio.
10. voltage raising and reducing charge pump as claimed in claim 3, which is characterized in that the voltage raising and reducing charge pump further includes
One voltage comparator；
The first input end of the first voltage comparator is electrically connected to the second port, and the second input terminal is for receiving one
Reference voltage, and its output end is electrically connected to the ON-OFF control circuit, the first voltage comparator is used in decompression mode
When receive first reference voltage that the second port obtains and be compared with the reference voltage, and based on the first ratio
Relatively result exports first control signal and closes the ON-OFF control circuit.
11. voltage raising and reducing charge pump as claimed in claim 10, which is characterized in that the first voltage comparator is further used
In starting the ON-OFF control circuit based on the second comparison result output second control signal, closed-loop control is realized, make described the
One reference voltage and reference voltage dynamic are equal.
12. voltage raising and reducing charge pump as claimed in claim 5, which is characterized in that the charge-discharge circuit includes a capacitor,
The top crown of the capacitor is electrically connected to the first node, and the bottom crown of the capacitor is electrically connected to second section
Point.
13. a kind of voltage management chip, which is characterized in that the voltage management chip includes claim 1-11 any one institute
The voltage raising and reducing charge pump stated.
14. voltage management chip as claimed in claim 13, which is characterized in that the charge-discharge circuit includes a capacitor,
The capacitor is arranged in the voltage management chip exterior, and accesses institute by the switch arrays of the voltage raising and reducing charge pump
State voltage raising and reducing charge pump.
15. a kind of voltage management device, which is characterized in that the voltage management device includes claim 1-11 any one institute
The voltage raising and reducing charge pump stated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821598304.2U CN208849668U (en) | 2018-09-29 | 2018-09-29 | Voltage raising and reducing charge pump, voltage management chip and device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821598304.2U CN208849668U (en) | 2018-09-29 | 2018-09-29 | Voltage raising and reducing charge pump, voltage management chip and device |
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|---|---|
| CN208849668U true CN208849668U (en) | 2019-05-10 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109120149A (en) * | 2018-09-29 | 2019-01-01 | 上海晶丰明源半导体股份有限公司 | Voltage raising and reducing charge pump, voltage management chip, device and method |
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2018
- 2018-09-29 CN CN201821598304.2U patent/CN208849668U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109120149A (en) * | 2018-09-29 | 2019-01-01 | 上海晶丰明源半导体股份有限公司 | Voltage raising and reducing charge pump, voltage management chip, device and method |
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