CN208539787U - DC-to-dc converter - Google Patents
DC-to-dc converter Download PDFInfo
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- CN208539787U CN208539787U CN201820751677.2U CN201820751677U CN208539787U CN 208539787 U CN208539787 U CN 208539787U CN 201820751677 U CN201820751677 U CN 201820751677U CN 208539787 U CN208539787 U CN 208539787U
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Abstract
This application involves a kind of DC-to-dc converters.Wherein, which includes: transformer；Positioned at the switch unit of the primary side of transformer；Synchronous rectification unit positioned at the secondary side of transformer；And control unit, at the time of being configured to control synchronous rectification unit turn-on and turn-off；Wherein, control unit includes: pumping signal generating subunit, is configured to when DC-to-dc converter is opened, and pumping signal relevant to the enabling signal of primary side is generated；And delay time controls subelement, is configured to by using pumping signal, so that synchronous rectification unit postponed for the first predetermined time and is connected at the time of opening relative to DC-to-dc converter.
Description
Technical field
This disclosure relates to which field of power supplies more particularly to a kind of DC-DC with starting in parallel and prebias function turn
Parallel operation.
Background technique
When multiple power module parallel connections, each power supply startup and shutdown at the time ofs, is different, so one of power supply
In startup and shutdown, power output end can have pre-bias voltage, when the output end of power supply hangs with a voltage source, if
Power supply does not have prebias function, then power supply in starting and closing, will drag down load on voltage so that energy recharge and
Damage the device of power supply.Current pre-biased circuit complex circuit poor reliability, when output voltage is equal with pre-bias voltage
It carves still with the presence of reverse current.
Utility model content
The brief overview about the disclosure is given below, in order to provide the basic of some aspects about the disclosure
Understand.It is understood, however, that this general introduction is not the exhaustive general introduction about the disclosure.It is not intended to for determining
The critical component or pith of the disclosure, nor being intended to limit the scope of the present disclosure.Its purpose is only with letter
The form of change provides certain concepts about the disclosure, in this, as preamble in greater detail given later.
In view of problem above, purpose of this disclosure is to provide be able to solve the straight of one or more disadvantages in the prior art
Stream-direct current transducer.
According to the one side of the disclosure, a kind of DC-to-dc converter is provided, which can wrap
It includes: transformer；Positioned at the switch unit of the primary side of transformer；Synchronous rectification unit positioned at the secondary side of transformer；And control
Unit, at the time of being configured to can control synchronous rectification unit turn-on and turn-off；Wherein, control unit includes: pumping signal
Generating subunit is configured to can produce excitation relevant to the enabling signal of primary side when DC-to-dc converter is opened
Signal；And delay time controls subelement, is configured to by using pumping signal, synchronous rectification unit can be made opposite
Postponed for the first predetermined time at the time of DC-to-dc converter is opened and is connected.
The other aspects of the embodiment of the present disclosure are provided in following specification part, wherein be described in detail for abundant
Ground discloses the preferred embodiment of the embodiment of the present disclosure, without applying restriction to it.
Detailed description of the invention
Referring to reference to the accompanying drawing to the explanation of the embodiment of the present disclosure, it can be more readily understood that the above of the disclosure and its
Its objects, features and advantages.In the accompanying drawings, identical or corresponding technical characteristic or component will use identical or corresponding attached drawing
Label is to indicate.
Fig. 1 is the schematic diagram of the DC-to-dc converter in the prior art with plug-and-play circuit.
Fig. 2 is the schematic diagram of parallel connection direct-direct current transducer in the prior art.
Fig. 3 is the schematic diagram of principal and subordinate's power supply in the prior art.
Fig. 4 is to illustrate the schematic block diagram of the DC-to-dc converter according to one embodiment of the disclosure.
Fig. 5 is to illustrate the schematic circuit of the DC-to-dc converter according to an embodiment of the present disclosure.
Fig. 6 is the timing diagram for being illustrated in signal waveform when opening according to the DC-to-dc converter of the embodiment of the present disclosure.
Fig. 7 is the timing diagram for being illustrated in signal waveform when closing according to the DC-to-dc converter of the embodiment of the present disclosure.
Fig. 8 is to illustrate the schematic circuit of DC-to-dc converter according to another embodiment of the present disclosure.
Fig. 9 is to illustrate the schematic circuit of DC-to-dc converter according to another embodiment of the present disclosure.
Figure 10 is to illustrate the schematic circuit of DC-to-dc converter according to another embodiment of the present disclosure.
Figure 11 is to illustrate the schematic circuit of DC-to-dc converter according to another embodiment of the present disclosure.
Figure 12 is to illustrate the illustrative circuitry of the starting in parallel of DC-to-dc converter according to an embodiment of the present disclosure
Figure.
Specific embodiment
In order to more clearly describe the DC-to-dc converter according to disclosure embodiment, first describe in the prior art
DC-to-dc converter.
Fig. 1 is the schematic diagram of the DC-to-dc converter in the prior art with plug-and-play circuit.
DC-to-dc converter shown in FIG. 1 include transformer, positioned at transformer primary side switch unit, Yi Jiwei
Synchronous rectification unit in the secondary side of transformer.As shown in Figure 1, Vin+ and Vin- respectively indicate the anode input of switch unit
Terminal and negative input terminal, Vout+ and Vout- respectively indicate the output terminal of the positive and negative anodes of the DC-to-dc converter, Np
It is the primary side winding and vice-side winding of transformer respectively with Ns1, PWM is the driving signal of synchronous rectification unit.
In the output end of the DC-to-dc converter for not having prebias function, a hot connecting and disconnecting of connecting can be passed through
Road, that is, MOS field effect transistor Q1 prevents from energy recharge occurs and damages straight when DC-to-dc converter starts and closes
Stream-direct current transducer device.That is, passing through control circuit, that is, Mosfet of Q1 when DC-to-dc converter turns on and off
Control circuit controls the delay time of the opening and closing of Q1, so that the DC-to-dc converter for preventing other in parallel is first built
Vertical output voltage simultaneously damages device by output end recharge.
However, increasing a MOS field effect transistor Q1 will lead to cost in DC-to-dc converter shown in Fig. 1
Rise.Circuit can be made complicated in addition, increasing Mosfet control circuit.In addition, DC-DC can be made to convert when output high current
The efficiency of device is lower.
Fig. 2 is the schematic diagram of parallel connection direct-direct current transducer in the prior art.
In parallel connection direct-DC convertir system, as shown in Fig. 2, #1 and #2 are two DC-DC in parallel respectively
Converter.
Each DC-to-dc converter include transformer, positioned at transformer primary side switch unit and be located at transformation
The synchronous rectification unit on the secondary side of device.As shown in Fig. 2, Vin+ and Vin- respectively indicate the positive input terminal of switch unit and bear
Pole input terminal, Vout+ and Vout- respectively indicate the output terminal of the positive and negative anodes of the DC-to-dc converter, and Np and Ns1 divide
It is not the primary side winding and vice-side winding of transformer, VCC is the accessory power supply on secondary side, and R1 and R2 are resistor, and Vp is single straight
Stream-direct current transducer output end bias voltage, Vo are the output voltages of DC-to-dc converter.PWM_in is that Mosfet drives
The input signal of dynamic device, PWM_out be the output signal of Mosfet driver and be synchronous rectification unit driving signal,
Enable signal is enable signal；When Enable signal is low level, Mosfet driver is not exported, and in Enable
When signal is high level, the output signal PWM_out of Mosfet driver is identical as input signal PWM_in.
In each DC-to-dc converter shown in Fig. 2, by the anode pin serial connection of Vp and capacitor C1 and comparator
Connection, therefore, the anode pin voltage of comparator can reflect the variation of Vp voltage.The negative terminal pin and reference voltage of comparator
REF connection.Comparator is compared anode pin voltage with negative terminal pin voltage, that is, reference voltage, to control the synchronization on secondary side
The working condition of rectifying tube.
In DC-to-dc converter starting, comparator anode pin voltage is less than negative terminal pin voltage, Enable letter
Number output be low level, synchronous rectification cell operation is in Schottky diode state.When the output voltage of DC-to-dc converter
When Vo is lower than Vp, Vp voltage is remained unchanged, and Enable signal keeps low level.As the output voltage Vo of DC-to-dc converter
When higher than Vp, Vp voltage is begun to ramp up, then comparator anode pin voltage is greater than negative terminal pin voltage, Enable signal is by low
Level becomes high level, and synchronous rectification unit is switched to synchronous rectification state by Schottky diode state.
Parallel connection direct-direct current transducer shown in Fig. 2 can be used in open cycle system, but the disadvantage is that more DC-DC turn
When parallel operation parallel connection, the time point of the startup and shutdown of each DC-to-dc converter is inconsistent, and Vp value can be straight by other direct currents-
The output of stream transformer is interfered.Although that is, when direct current-direct current transducer output voltage Vo is also less than Vp, Vp value
It may be influenced and be raised by the output of other DC-to-dc converters, Enable signal becomes high level from low level, to make
Synchronous rectification mosfet is switched to synchronous rectification work status, so that energy instead fills damage module.
Fig. 3 is the schematic diagram of principal and subordinate's power supply in the prior art.
In parallel power supply system, a power supply can be distributed first as host, is directly connected to current share bus,
Remaining power supply is slave, and obtains current signal from current share bus.In Fig. 3, #1 is host, is worked in voltage-controlled mould
Formula, #2 are slave, VinIt is input voltage, VoIt is output voltage, npAnd nsIt is primary side winding and vice-side winding, I_ respectivelyBUSIt indicates
The signal of current share bus, IoIndicate that output electric current, R1 and R2 are resistor.
As shown in figure 3, the signal of the output current signal of slave and current share bus is carried out by error amplifier
Compare, then compensation is reference voltage Ref.By adjusting output voltage Vo, the final purpose for realizing that electric current is shared.
It is shared that the advantages of principal and subordinate's power supply shown in Fig. 3, can be achieved on accurate electric current.The disadvantage is that if hostdown, it is whole
A system will paralyse completely, and wideband voltage control loop is easy by noise jamming, therefore the connection between host and slave
Should be as short as possible, and cannot achieve in the converter of open loop.
In order to solve said one or multiple shortcomings in the prior art, on the basis of taking into account efficiency, space and cost,
Propose the technical solution of the disclosure.
Block diagram, circuit diagram referring to the equipment according to the embodiment of the present disclosure etc. describe the disclosure.It should be noted that in order to
Component unrelated with the disclosure, known to persons of ordinary skill in the art and place is omitted in clear purpose, attached drawing and explanation
The expression and description of reason.Term used herein, it is only for description specific embodiment, without this public affairs of intended limitation
It opens.
Fig. 4 is to illustrate the schematic block diagram of the DC-to-dc converter according to one embodiment of the disclosure.
As shown in figure 4, may include transformer 501 according to the DC-to-dc converter 50 of disclosure embodiment；It is located at
The switch unit 502 of the primary side of transformer 501；Synchronous rectification unit 503 positioned at the secondary side of transformer 501；And control is single
Member 504, at the time of control unit 504 is configured to control synchronous rectification 503 turn-on and turn-off of unit.Wherein, control unit 504
May include: pumping signal generating subunit 5041, be configured to when DC-to-dc converter 50 is opened, can produce with
The relevant pumping signal of the enabling signal of primary side；And delay time controls subelement 5042, is configured to by using excitation
Signal allows synchronous rectification unit 503 to postpone for the first predetermined time at the time of opening relative to DC-to-dc converter 50
And it is connected.
In Fig. 4, Vin+ and Vin- respectively indicate the positive input terminal and negative input terminal of switch unit 502,
Vout+ and Vout- respectively indicates the output terminal of the positive and negative anodes of the DC-to-dc converter 50, and Np and Ns1 are transformer respectively
501 primary side winding and vice-side winding.Synchronous rectification unit 503 may include MOS field effect transistor, below for the side of description
Just, synchronous rectification unit 503 is equal to MOS field effect transistor to be described.
When DC-to-dc converter 50 is opened, in pumping signal generating subunit 5041, can produce and primary side
The relevant pumping signal of enabling signal；And in the delay time control subelement 5042 of control unit 504, by using sharp
Signal is encouraged, postpones the first pre- timing at the time of synchronous rectification unit 503 is opened relative to DC-to-dc converter 50
Between and be connected.That is, control unit 504 can be according to the starting with primary side generated when DC-to-dc converter 50 is opened
The relevant pumping signal of signal, delay at the time of control synchronous rectification unit 503 is opened relative to DC-to-dc converter 50
Predetermined time and be connected, thus prevent DC-to-dc converter 50 start when, occur energy recharge and damage DC-DC
The device of converter 50.
Preferably, delay time control subelement 5042 can be further configured to the disappearance in response to pumping signal,
So that synchronous rectification unit 503 postponed for the second predetermined time at the time of closing relative to DC-to-dc converter 50 and turns off.
As an example, the enabling signal of primary side disappears, above-mentioned pumping signal when DC-to-dc converter 50 is closed
Corresponding to disappear, delay time control subelement 5042 can make synchronous rectification unit 503 relative to DC-to-dc converter 50
Delay scheduled time at the time of closing and turn off, thus prevent DC-to-dc converter 50 close when, occur energy recharge and
Damage the device of DC-to-dc converter 50.
Fig. 5 is to illustrate the schematic circuit of the DC-to-dc converter 50 according to an embodiment of the present disclosure.
Preferably, in the DC-to-dc converter 50 according to the embodiment of the present disclosure, the secondary side of transformer 501 can have
There are the first winding Ns1 and the second winding Ns2, wherein the first winding Ns1 may be coupled to synchronous rectification unit 503, pumping signal
Generating subunit 5041 may include the second winding Ns2, first diode D1 and the capacitor C1 being connected in series, wherein the
The positive ends of two winding Ns2 are connect with the anode of first diode D1, the negative polarity end of the second winding Ns2 and capacitor C1
One end connection, the cathode of first diode D1 is connect with the other end of capacitor C1 and pumping signal generating subunit
5041 can be further configured to be coupled using the second winding Ns2 when DC-to-dc converter 50 is opened to produce
Raw pumping signal.
As shown in figure 5, being generated when being opened according to the DC-to-dc converter 50 of the embodiment of the present disclosure in pumping signal
It in subelement 5041, is coupled by the second winding Ns2 to generate pumping signal relevant to the enabling signal of primary side, this swashs
Encouraging signal is connected first diode D1.And when DC-to-dc converter 50 is closed, the enabling signal of primary side disappears, then swashs
Signal is encouraged also to rapidly disappear.
As shown in figure 5, PWM_p signal is the driving signal of the MOS field effect transistor in switch unit 502.Illustrate and
Unrestricted, the enabling signal of above-mentioned primary side can be PWM_p signal.In addition, the enabling signal of above-mentioned primary side can also be transformation
The starting-up signal of signal or DC-to-dc converter 50 on the primary side winding Np of device 501.
It preferably, can also include: driving unit 505 according to the DC-to-dc converter of the embodiment of the present disclosure 50, it can be with
It is configured to drive synchronous rectification unit 503, so that 503 turn-on and turn-off of synchronous rectification unit, wherein control unit 504 can
At the time of to control synchronous rectification 503 turn-on and turn-off of unit via driving unit 505.
As shown in figure 5, PWM_in is the input signal of driving unit 505, PWM_out is that the output of driving unit 505 is believed
Number and PWM_out be synchronous rectification unit 503 driving signal, that is, driving unit 505 can be driven same by PWM_out
Rectification unit 503 is walked, so that 503 turn-on and turn-off of synchronous rectification unit.Enable signal is the enabled letter of driving unit 505
Number, which is controlled by control unit 504, turns off synchronous rectification unit 503
In period, Enable signal is low level, so that driving unit 505 does not export；And to make in control unit 504
It obtains in the period that synchronous rectification unit 503 is connected, Enable signal is high level, so that the output of driving unit 505
Signal PWM_out is identical as input signal PWM_in.It illustrates rather than limits, PWM_in can be and the phase locked letter of PWM_p
Number.It illustrates rather than limits, above-mentioned pumping signal can be PWM_in signal.
It should be noted that can not be via driving unit 505 according to the DC-to-dc converter 50 of the embodiment of the present disclosure
At the time of controlling 503 turn-on and turn-off of synchronous rectification unit, but 503 turn-on and turn-off of synchronous rectification unit can be directly controlled
At the time of.But it is clear following for describing, synchronous rectification is controlled via driving unit 505 with DC-to-dc converter 50
It is described at the time of 503 turn-on and turn-off of unit.
Preferably, in the DC-to-dc converter 50 according to the embodiment of the present disclosure, delay time controls subelement 5042
It may include accessory power supply VCC, zener diode D2, capacitor C2 and MOS field effect transistor Q3.Wherein, two pole of pressure stabilizing
Pipe D2 is in parallel with capacitor C2, and the grid of MOS field effect transistor Q3 is connected to zener diode D2, drain electrode is connected to control
The output end and source electrode of unit 504 are grounded and delay time control subelement 5042 may be configured to believe in excitation
Number excitation under, make accessory power supply VCC give capacitor C2 charging so that from generate pumping signal to pass through the first predetermined time
Time point at, the door of the charging voltage of capacitor C2 the pressure stabilizing value equal to zener diode D2 and MOS field effect transistor Q3
The sum of sill voltage.
Below in conjunction with Fig. 5, it is specifically described when DC-to-dc converter 50 is opened, each device in control unit 504
Operation.
When DC-to-dc converter 50 is opened, Ns2 winding obtain the enabling signal of primary side as pumping signal and
VCC is begun setting up.First diode D1 is connected in pumping signal, so that the grid of MOS field effect transistor Q1 is high electricity
It is flat, MOS field effect transistor Q1 conducting, and then make the grid low level of MOS field effect transistor Q2, MOS field effect transistor
Pipe Q2 shutdown.VCC gives capacitor C2 charging by resistor R5, and the cathode voltage D2_cathode of D2 be (i.e. capacitor C2's
Charging voltage) it is slowly increased by 0, and from pumping signal (t=0) is generated to by the first predetermined time t1Time point (t
=t1) at become Vm1(Vm1For the pressure stabilizing value of zener diode D2 and the sum of the threshold voltage of MOS field effect transistor Q3), that is,
In t=t1Place reaches the threshold voltage of MOS field effect transistor Q3, and thus MOS field effect transistor Q3 is connected, MOS effects
Transistor Q4 is answered to turn off, Enable signal maintains the first predetermined time t in low level1After become high level.
When VCC is charged by resistor R5 to capacitor C2, cathode voltage D2_cathode such as equation (1) institute of D2
Show.
In formula (1), VCCIndicate the voltage value of accessory power supply VCC, R5And R6Respectively indicate the electricity of resistor R5 and R6
Resistance value, C2Indicate the capacitance of capacitor C2, VZIndicate the pressure stabilizing value and V of zener diode D2G(th)Indicate MOS field-effect
The threshold voltage of transistor Q3.
Vm1Formula such as equation (2) shown in.
Vm1=Vz+VG(th) (2)
With the V in formula (2)m1Substitute the D2_cathode in formula (1), so that it may calculate the first predetermined time t1。
Preferably, after the first predetermined time, the output voltage of DC-to-dc converter 50 is higher than pre-bias voltage.Its
In, setting pred icted deflection sets voltage between the Vout+ and Vout- of Fig. 5.
As a specific example, in t=t1In the past, Enable was low level, and PWM_out is not exported, synchronous rectification unit
503 work are in Schottky state, so that the output voltage of DC-to-dc converter 50 increases.In t=t1Later, output voltage
Higher than pre-bias voltage, Enable is high level, and PWM_out has output, i.e. PWM_out is identical as PWM_in, then will synchronize whole
Stream unit 503 is switched to synchronous rectification working condition.
Fig. 6 is the timing for being illustrated in signal waveform when opening according to the DC-to-dc converter 50 of the embodiment of the present disclosure
Figure.
As shown in Figure 6, it is assumed that at the time of time t=0, DC-to-dc converter 50 is open-minded, and generates switch unit
The driving signal PWM_p of MOS field effect transistor in 502.The input signal PWM_in and PWM_p phase of driving unit 505
It is synchronous.Since t=0, the cathode voltage D2_cathode of D2 is slowly increased by 0, and in t=t1Become Vm1.In t=t1With
Before, Enable is low level, and PWM_out is not exported.In t=t1Later, the output voltage of DC-to-dc converter 50 is high
In pre-bias voltage, Enable is high level, and PWM_out has output, i.e. PWM_out is identical as PWM_in.In addition, in t=t1
Later, the cathode voltage D2_cathode of D2, which can continue to increase, is directly close to voltage V shown in fig. 6s.Wherein, VSFormula such as
Shown in equation (3).
As seen from the above description, setting according to the control unit 504 in the DC-to-dc converter of the embodiment of the present disclosure 50
Meter is simple and is easily achieved, and the electronic component used only has resistance, capacitor, MOS field effect transistor etc., therefore controls
The Costco Wholesale of unit 504 is low.In addition, not using power component in control unit 504, therefore power consumption is very low.Further
Ground, DC-to-dc converter 50 utilize two pole of body parasitic in the Mos pipe of synchronous rectification unit 503 by control unit 504
Pipe realizes multiple open loop DCs-direct current transducer parallel connection starting (in relation to according to the DC-to-dc converter of the embodiment of the present disclosure
The specific descriptions of parallel connection starting can be found in the description carried out below with reference to Figure 12), and there is prebias startup function.
Preferably, delay time control subelement 5042 may be configured to make first capacitor when pumping signal disappears
Device C2 electric discharge, so that disappearing from pumping signal at the time point by the second predetermined time, first capacitor device C2's is put
The sum of the threshold voltage of piezoelectric voltage the pressure stabilizing value equal to zener diode D2 and MOS field effect transistor Q3.
As a specific example, when DC-to-dc converter 50 is closed, the enabling signal of primary side disappears, on Ns2 winding
Pumping signal also rapidly disappear.VCC can also keep high level for a period of time due to the effect of capacitor C3.Due on Ns2 winding
Pumping signal disappear, the grid of MOS field effect transistor Q1 becomes low level, therefore MOS field effect transistor Q1 is disconnected,
And then MOS field effect transistor Q2 is connected.Capacitor C2 is discharged by resistor R4, is opened at the time of disappearance from pumping signal
Begin, the cathode voltage D2_cathode of D2 is from Vs rapid decrease, when in t=t2, D2 cathode voltage D2_cathode become Vm2
(Vm2For the pressure stabilizing value of zener diode D2 and the sum of the threshold voltage of MOS field effect transistor Q3) when, MOS field effect transistor
The grid voltage of Q3 is lower than its threshold voltage, therefore MOS field effect transistor Q3 is disconnected, and MOS field effect transistor Q4 is led
Logical, Enable, which is pulled low rapidly, becomes low level, thus the shutdown of synchronous rectification unit 503 works under Schottky state.
When capacitor C2 is discharged by resistor R4, shown in the cathode voltage D2_cathode such as equation (4) of D2.
Vm2Formula such as equation (5) shown in.
Vm2=Vz+VG(th) (5)
With the V in formula (5)m2For the D2_cathode in formula (4), so that it may calculate the second predetermined time t2。
Incidentally, in Fig. 5, other than device above-mentioned, there is also resistor R1, resistor R2, resistance
Device R3, resistor R7 and resistor R8 do not carry out tired state to these devices here.
Fig. 7 is the timing for being illustrated in signal waveform when closing according to the DC-to-dc converter 50 of the embodiment of the present disclosure
Figure.
As shown in Figure 7, it is assumed that at the time of time t=0, DC-to-dc converter 50 receives off signal, then switchs list
The driving signal PWM_p of MOS field effect transistor in member 502 disappears or continues for some time, the input of driving unit 505
Signal PWM_in is also rapidly disappeared or is continued for some time or be continued for.In Fig. 7, clearly illustrated.?
Since disappearing pumping signal, the cathode voltage D2_cathode of D2 is from VsIt begins to decline.In t=t2In the past, Enable was height
Level, PWM_out have output, i.e. PWM_out is identical as PWM_in.When in t=t2(the i.e. cathode voltage D2_cathode of D2
Become Vm2) after, Enable becomes low level, and PWM_out is not exported.
As seen from the above description, in the DC-to-dc converter 50 according to the embodiment of the present disclosure, it is adjustable synchronize it is whole
The delay time of the turn-on and turn-off of unit 503 is flowed, and will not be interfered with each other, therefore overcomes existing DC-DC conversion
The big defect of the occupied space of device, and improve the efficiency of DC-to-dc converter 50.
Other than embodiment described above, DC-to-dc converter can also be realized otherwise.
Fig. 8 is to illustrate the schematic circuit of DC-to-dc converter 80 according to another embodiment of the present disclosure.
The DC-to-dc converter 50 in DC-to-dc converter 80 and Fig. 5 in Fig. 8 the difference is that only control
Unit 804 is different from the particular circuit configurations of control unit 504, omits the description to its repeating part here.In addition, such as Fig. 8
Shown, control unit 804 includes pumping signal generating subunit 8041 and delay time controlling subelement 8042.Delay time control
The circuit structure of subunit 8042 and the circuit structure of delay time control subelement 5042 are essentially identical, to omit here
To the specific descriptions of delay time control subelement 8042.
In the DC-to-dc converter 80 according to the embodiment of the present disclosure, the secondary side of transformer 501 has the first winding
Ns1, wherein the first winding Ns1 is connected to synchronous rectification unit 503, and pumping signal generating subunit 8041 may include series connection
The first winding Ns1, first diode D1 and the capacitor C1 of connection, wherein the positive ends and the one or two of the first winding Ns1
The anode of pole pipe D1 connects, and the negative polarity end of the first winding Ns1 is connect with one end of capacitor C1, the yin of first diode D1
Pole is connect with the other end of capacitor C1 and pumping signal generating subunit 8041 may be configured to turn in DC-DC
When parallel operation 80 is opened, pumping signal is generated by the first winding Ns1.
Fig. 9 is to illustrate the schematic circuit of DC-to-dc converter 90 according to another embodiment of the present disclosure.
The DC-to-dc converter 50 in DC-to-dc converter 90 and Fig. 5 in Fig. 9 the difference is that only control
Unit 904 is different from the particular circuit configurations of control unit 504, omits the description to its repeating part here.In addition, such as Fig. 9
Shown, control unit 904 includes pumping signal generating subunit 9041 and delay time controlling subelement 9042.Delay time control
The circuit structure of subunit 9042 and the circuit structure of delay time control subelement 5042 are essentially identical, to omit here
To the specific descriptions of delay time control subelement 9042.
In the DC-to-dc converter 90 according to the embodiment of the present disclosure, the secondary side of transformer 501 has the first winding
Ns1 and the second winding Ns3, wherein the first winding Ns1 is connected to synchronous rectification unit 503, pumping signal generating subunit 9041
It may include the second winding Ns3, first diode D1 and capacitor C1, wherein the positive ends of the second winding Ns3 connect
To first diode D1 anode and be also connected to secondary side accessory power supply VCC anode, the negative polarity of the second winding Ns3
End is connected to one end of capacitor C1 and is also connected to the cathode of accessory power supply VCC, the cathode and capacitor of first diode D1
The other end of device C1 connects and pumping signal generating subunit 9041 may be configured to open in DC-to-dc converter 90
When logical, pumping signal is generated by the second winding Ns3.
Figure 10 is to illustrate the schematic circuit of DC-to-dc converter 10 according to another embodiment of the present disclosure.
The DC-to-dc converter 50 in DC-to-dc converter 10 and Fig. 5 in Figure 10 the difference is that only control
Unit 104 is different from the particular circuit configurations of control unit 504, omits the description to its repeating part here.In addition, such as Figure 10
Shown, control unit 104 includes pumping signal generating subunit 1041 and delay time controlling subelement 1042.Delay time control
The circuit structure of subunit 1042 and the circuit structure of delay time control subelement 5042 are essentially identical, to save here
Slightly to the specific descriptions of delay time control subelement 1042.
In the DC-to-dc converter 10 according to the embodiment of the present disclosure, transformer 501 has isolated location 1011, swashs
Encouraging signal generating subunit 1041 may include isolated location 1011, first diode D1 and capacitor C1, wherein isolation is single
Member 1011 is connect with the anode of first diode D1, and the cathode of first diode D1 is connect with one end of capacitor C1, primary side
Enabling signal can be matched for the driving signal PWM_p and pumping signal generating subunit 1041 of switch unit 502
It is set to when DC-to-dc converter 10 is opened, pumping signal is generated by isolated location 1011.
Figure 11 is to illustrate the schematic circuit of DC-to-dc converter 11 according to another embodiment of the present disclosure.
The DC-to-dc converter 50 in DC-to-dc converter 11 and Fig. 5 in Figure 11 the difference is that only control
Unit 114 is different from the particular circuit configurations of control unit 504, omits the description to its repeating part here.In addition, such as Figure 11
Shown, control unit 114 includes pumping signal generating subunit 1141 and delay time controlling subelement 1142.Delay time control
The circuit structure of subunit 1142 and the circuit structure of delay time control subelement 5042 are essentially identical, to save here
Slightly to the specific descriptions of delay time control subelement 1142.
In the DC-to-dc converter 11 according to the embodiment of the present disclosure, transformer 501 has isolated location 1111, swashs
Encouraging signal generating subunit 1141 may include isolated location 1111, first diode D1 and capacitor C1, wherein isolation is single
Member 1111 is connect with the anode of first diode D1, and the cathode of first diode D1 is connect with one end of capacitor C1, primary side
Enabling signal can may be configured to for the starting-up signal S-On/Off and pumping signal generating subunit 1141 of primary side
When DC-to-dc converter 11 is opened, pumping signal is generated by isolated location 1111.
Figure 12 is to illustrate the illustrative circuitry of the starting in parallel of DC-to-dc converter according to an embodiment of the present disclosure
Figure.Converter #1 and converter #2 in parallel are shown in Figure 12.In starting up, due to the effect in control unit 504
Under, converter #1 and converter #2 reach predetermined value Vo i.e. from pumping signal (t=0) is generated to the first pre- timing in output voltage
Between point t1Before, the devices in synchronous rectification unit 503 are all work in body diode rectification state, so i.e.
Make since Startup time is different to flow backward to other conversions so that one of converter first starts when reaching Vo
Device and damage other converters, to realize multiple open loop DCs-direct current transducer parallel connection startup function.
The disclosure is described referring to specific embodiment in specification in front.However those skilled in the art manage
Solution, various modifications can be carried out under the premise of the scope of the present disclosure limited without departing from such as claims and changes.
Claims (11)
1. a kind of DC-to-dc converter (50,80,90,10,11), comprising:
Transformer (501)；
Positioned at the switch unit (502) of the primary side of the transformer (501)；
Synchronous rectification unit (503) positioned at the secondary side of the transformer (501)；And
Control unit (504,804,904,104,114) is configured to control synchronous rectification unit (503) turn-on and turn-off
At the time of；
Wherein, described control unit (504,804,904,104,114) includes:
Pumping signal generating subunit (5041,8041,9041,1041,1141) is configured to convert in the DC-DC
When device (50,80,90,10,11) is opened, pumping signal relevant to the enabling signal of the primary side is generated；And
Delay time controls subelement (5042,8042,9042,1042,1142), is configured to believe by using the excitation
Number so that the synchronous rectification unit (503) relative to the DC-to-dc converter (50,80,90,10,11) open when
It carves the first predetermined time of delay and is connected.
2. DC-to-dc converter (50,80,90,10,11) according to claim 1, wherein
Delay time control subelement (5042,8042,9042,1042,1142) is further configured in response to described
The disappearance of pumping signal so that the synchronous rectification unit (503) relative to the DC-to-dc converter (50,80,90,
10,11) postponed for the second predetermined time at the time of closing and turn off.
3. DC-to-dc converter (50,80,90,10,11) according to claim 2, wherein
Delay time control subelement (5042,8042,9042,1042,1142) includes accessory power supply (VCC), pressure stabilizing two
Pole pipe (D2), first capacitor device (C2) and MOS field effect transistor (Q3),
The zener diode (D2) is in parallel with first capacitor device (C2),
The grid of the MOS field effect transistor (Q3) is connected to the zener diode (D2), drain electrode is connected to the control
The output end and source electrode of unit (504,804,904,104,114) are grounded, and
Delay time control subelement (5042,8042,9042,1042,1142) is configured in the pumping signal
Under excitation, the accessory power supply (VCC) is made to give the first capacitor device (C2) charging so that from generate the pumping signal to
At time point by first predetermined time, the charging voltage of the first capacitor device (C2) is equal to the zener diode
(D2) the sum of the threshold voltage of pressure stabilizing value and the MOS field effect transistor (Q3).
4. DC-to-dc converter (50,80,90,10,11) according to claim 3, wherein predetermined described first
After time, the output voltage of the DC-to-dc converter (50,80,90,10,11) is higher than pre-bias voltage.
5. DC-to-dc converter (50,80,90,10,11) according to claim 3, wherein
Delay time control subelement (5042,8042,9042,1042,1142) is configured to disappear in the pumping signal
When mistake, the first capacitor device (C2) is made to discharge, so that disappearing from the pumping signal to by the described second pre- timing
Between time point at, the discharge voltage of the first capacitor device (C2) equal to the pressure stabilizing value of the zener diode (D2) with it is described
The sum of the threshold voltage of MOS field effect transistor (Q3).
6. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, wherein
The secondary side of the transformer (501) has the first winding (Ns1) and the second winding (Ns2), wherein first winding
(Ns1) it is connected to the synchronous rectification unit (503),
The pumping signal generating subunit (5041) includes second winding (Ns2) being connected in series, first diode
(D1) and the second capacitor (C1), wherein the positive ends of second winding (Ns2) and the first diode (D1's)
Anode connection, the negative polarity end of second winding (Ns2) are connect with one end of second capacitor (C1), and described first
The cathode of diode (D1) is connect with the other end of second capacitor (C1), and
The pumping signal generating subunit (5041) is further configured to open-minded in the DC-to-dc converter (50)
When, it is coupled using second winding (Ns2) to generate the pumping signal.
7. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, wherein
The secondary side of the transformer (501) has the first winding (Ns1), wherein first winding (Ns1) is connected to described same
It walks rectification unit (503),
The pumping signal generating subunit (8041) includes first winding (Ns1) being connected in series, first diode
(D1) and the second capacitor (C1), wherein the positive ends of first winding (Ns1) and the first diode (D1's)
Anode connection, the negative polarity end of first winding (Ns1) are connect with one end of second capacitor (C1), and the described 1st
The cathode of pole pipe (D1) is connect with the other end of second capacitor (C1), and
The pumping signal generating subunit (8041) is further configured to open-minded in the DC-to-dc converter (80)
When, the pumping signal is generated by first winding (Ns1).
8. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, wherein
The secondary side of the transformer (501) has the first winding (Ns1) and the second winding (Ns3), wherein first winding
(Ns1) it is connected to the synchronous rectification unit (503),
The pumping signal generating subunit (9041) includes second winding (Ns3), first diode (D1) and second
Capacitor (C1), wherein the positive ends of second winding (Ns3) be connected to the anode of the first diode (D1) and
It is also connected to the anode of the accessory power supply (VCC) on the secondary side, the negative polarity end of second winding (Ns3) is connected to described the
One end of two capacitors (C1) and the cathode for being also connected to the accessory power supply (VCC), the yin of the first diode (D1)
Pole is connect with the other end of second capacitor (C1), and
The pumping signal generating subunit (9041) is further configured to open-minded in the DC-to-dc converter (90)
When, the pumping signal is generated by second winding (Ns3).
9. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, wherein
The transformer (501) has isolated location,
The pumping signal generating subunit (1041) includes the isolated location, first diode (D1) and the second capacitor
(C1), wherein the isolated location is connect with the anode of the first diode (D1), the cathode of the first diode (D1)
It is connect with one end of second capacitor (C1),
The enabling signal of the primary side is the driving signal of the switch unit (502), and
The pumping signal generating subunit (1041) is further configured to open-minded in the DC-to-dc converter (10)
When, the pumping signal is generated by the isolated location.
10. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, wherein
The transformer (501) has isolated location,
The pumping signal generating subunit (1141) includes the isolated location, first diode (D1) and the second capacitor
(C1), wherein the isolated location is connect with the anode of the first diode (D1), the cathode of the first diode (D1)
It is connect with one end of second capacitor (C1),
The enabling signal of the primary side is the starting-up signal of the primary side, and
The pumping signal generating subunit (1141) is further configured to open-minded in the DC-to-dc converter (11)
When, the pumping signal is generated by the isolated location.
11. DC-to-dc converter (50,80,90,10,11) according to claim 1 or 2, further includes:
Driving unit (505) is configured to drive the synchronous rectification unit (503), so that the synchronous rectification unit (503)
Turn-on and turn-off,
Wherein, described control unit (504,804,904,104,114) via the driving unit (505) control it is described synchronize it is whole
At the time of flowing unit (503) turn-on and turn-off.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111654010A (en) * | 2019-12-17 | 2020-09-11 | 联合汽车电子有限公司 | Method for preventing back-flow current |
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| CN111654010A (en) * | 2019-12-17 | 2020-09-11 | 联合汽车电子有限公司 | Method for preventing back-flow current |
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