CN208401847U - A kind of novel digital satellite beacon receiver - Google Patents

Abstract

The utility model relates to a kind of novel digital satellite beacon receivers, including the first amplifier and the first frequency mixer processing unit being connected with first amplifier, the second frequency mixer processing unit, the second amplifier, height AD and FPGA digital processing chip.FPGA digital processing chip is used to be handled satellite beacon and tracked, it can be achieved that tracking bandwidth automatically switches to reach and improve the signal-to-noise ratio beacon signal faint so as to more preferable more stable tracking.

Description

A kind of novel digital satellite beacon receiver

Technical field

The utility model relates to satellite communication field more particularly to a kind of novel digital satellite beacon receivers.

Background technique

Domestic satallite communication earth station automatic tracking system uses satellite beacon signals always for a long time to automatically track Foundation, and this kind of beacon receiver mostly uses analog circuit to control and receive the capture and tracking of machine, and analog circuit category In high-frequency microwave circuit, design and produce difficult.Traditional Radio Beacon goes to detect expected beacon signal using fixed bandwidth Range signal, but again in practical application, the range signal often detected is not the beacon signal of true target, it is possible to It is co-channel interference signal because traditional beacon does not go qualitatively to discriminate whether to be beacon signal.Traditional Radio Beacon may not be used The tracking bandwidth of variation, can not achieve tracking bandwidth can be changed the advantage of raising of bring tracking signal-to-noise ratio, and high in modernization Under the requirement of integrated level, the smaller and smaller signal-to-noise ratio of requirement to antenna surface worse and worse under the premise of, traditional Radio Beacon is consolidated Determining bandwidth makes it especially prominent using limitation.

Utility model content

The purpose of this utility model is to provide a kind of novel digital satellite beacon receiver, by beacon receiver with The adaptive-bandwidth of track beacon, it can be achieved that automatically tracking beacon frequency after Radio Beacon traces into target beacon.

To achieve the above object, the technical solution of the utility model is as follows:

A kind of novel digital satellite beacon receiver, to be connected including the first amplifier and with first amplifier One frequency mixer processing unit, the second frequency mixer processing unit, the second amplifier, height AD and FPGA digital processing chip；First Amplifier exports after amplification for receiving satellite beacon signals；First frequency mixer processing unit, including the first frequency mixer, first Local oscillator unit and first filter, the carrier wave that the first frequency mixer exports the output signal of the first amplifier and the first local oscillator unit Signal carries out frequency conversion, exports after first filter filters；Second frequency mixer processing unit, including the second frequency mixer, second Vibration unit and second filter, the second frequency mixer believe the carrier wave that the output signal of first filter and the second local oscillator unit export Number carry out frequency conversion, exported after second filter filters；Second amplifier, it is defeated after receiving second filter output signal and amplifying Out；Height AD, the output signal for receiving the second amplifier are passed to FPGA digital processing chip, the FPGA after height AD sampling It is exported after the filtering and calculation process of digital processing chip completion signal by digital signal.

In above scheme, the FPGA digital processing chip includes FIR filter unit and FFT converting unit, FIR filtering Unit is connect with FFT converting unit；FIR filter unit is automatically tracked for wide band scan and narrowband；FFT converting unit is used for Calculating digital beacon signal becomes frequency domain output from time domain.

In above scheme, it is the FPGA of EP3C40Q240 that the FPGA, which selects ALTERLA company model,.

In above scheme, the model AD9281 of the height AD.

The utility model handles satellite beacon and is tracked, it can be achieved that tracking bandwidth using FPGA digital processing chip Automatically switch to reach and improve the signal-to-noise ratio beacon signal faint so as to more preferable more stable tracking.

Detailed description of the invention

Fig. 1 is the functional block diagram of the utility model novel digital satellite beacon receiver.

Specific embodiment

With reference to the accompanying drawings and examples, specific embodiment of the present utility model is described in further detail.Below Embodiment is not intended to limit the scope of the present invention for illustrating the utility model.

As shown in Figure 1, a kind of novel digital satellite beacon receiver of the utility model, including the first amplifier and with The first connected frequency mixer processing unit of first amplifier, the second frequency mixer processing unit, the second amplifier, height AD and FPGA digital processing chip, the first frequency mixer processing unit include the first frequency mixer, the first local oscillator unit and first filter, the Two frequency mixer processing units include the second frequency mixer, the second local oscillator unit and second filter.

First amplifier receives the satellite beacon signals from antenna system, and signal is amplified into the through the first amplifier One frequency mixer is mixed to obtain an intermediate-freuqncy signal with the carrier signal of the first local oscillator unit output, frequency point 838MHz, through the Enter first filter after primary mixing；Signal enters the second frequency mixer after the first filtering, with the output of the second local oscillator unit Carrier signal is mixed to obtain two intermediate-freuqncy signals, frequency point 50MHz, and two intermediate-freuqncy signals are passed to after second filter filters again Second amplifier is passed to height AD after the amplification of the second amplifier, is passed to FPGA digital processing chip after height AD sampling, It is exported after the filtering and calculation process of FPGA digital processing chip completion signal by digital signal.

FPGA digital processing chip includes FIR filter unit and FFT converting unit, and FIR filter unit and FFT conversion are single Member connection；FIR filter unit is automatically tracked for wide band scan and narrowband；FFT converting unit is for calculating digital beacon signal Become frequency domain output from time domain.

The received analog signal of the utility model beacon receiver is completed high speed by the sampler of model AD9281 and is adopted Sample then inputs the bootstrap information after sampling in FPGA digital processing chip, the complete pair signals of FPGA digital processing chip Filtering and FFT are calculated, and wherein FIR filter unit carries out digital low-pass filtering to it, and the spurious signal of high frequency is filtered out, and FFT turns It changes unit and calculates and digital beacon signal is changed into frequency domain from time domain, since FPGA digital processing chip receives digital beacon The importance of machine, the FPGA for the model EP3C40Q240 for having selected ALTERLA company to produce here, and select ALTERLA public The existing filtering of the soft verification of the IP provided and FFT computing function are provided, the soft core of IP, which has, to be stablized, reliably, fireballing advantage.

Part signal is difficult to find out feature in the time domain, and after transforming to frequency domain, change is readily seen feature.Beacon signal exists Frequency domain representation is tone signal, it is first determined whether in frequency domain receives the qualitative analysis that tone signal is beacon signal, analyzes Out after tone signal, quantitative analysis goes out the actual margin and real power of signal, at this point, the detection bandwidth of switching Radio Beacon is to reach To raising signal-to-noise ratio.It may be implemented relatively to be easy to capture beacon signal using relatively wide detection bandwidth, and capture Very high signal-to-noise ratio can be improved in the bandwidth that relatively narrow detection bandwidth (1KHz) is switched to after to beacon signal, is more conducive to The tracking of small-signal, and under the operating mode of the filter of narrowband, it is realized with programmable FIR filter unit and beacon is believed Number tracking, the dynamically track of bandwidth is realized on the basis of the signal-to-noise ratio remained unchanged.

In general, sample frequency is greater than twice of signal frequency.N number of sampled point is converted by FFT to get N number of point is arrived FFT result.For convenience of FFT operation is carried out, usual N takes 2 integer power.Assuming that sample frequency is Fs, signal frequency F, sampling Points are N.Then FFT transformation result is the plural number of N point.Each point just corresponds to a Frequency point.The modulus value of this point, for this Amplitude characteristic under frequency values.For example, it is assumed that the peak value of original signal is A, then each point of FFT transformation result, in addition to first Modulus value except a DC component is N/2 times of A.First point is DC component, its modulus value is exactly the N of DC component Times.First point indicates DC component (i.e. 0Hz), next one point of the last one point N then indicates sample frequency Fs, among this N equal portions are divided by N-1 point, the frequency of each point successively increases.Such as frequency represented by certain point n are as follows: Fn=(n- 1) it is Fs/N that * Fs/N, Fn, which can be differentiated to frequency, if sample frequency Fs is 1024Hz, sampling number is 1024 points, then may be used 1Hz is arrived to differentiate.1024 points of the sample rate of 1024Hz is just 1 second, then samples the signal of 1 second time and be FFT, then As a result it can analyze 1Hz, if sampling the signal of 2 second time and being FFT, result can analyze 0.5Hz.If mentioned High-frequency resolving power must then increase sampling number namely sampling time.Frequency resolution and sampling time are reciprocal relations.

Assuming that certain point n is indicated with plural number a+bi after FFT, then the mould of this plural number is An=radical sign a*a+b*b, phase Pn =atan2 (b, a).According to the above results, the expression formula of the corresponding signal of n point (n ≠ 1, and n≤N/2) can be calculated Are as follows: An/ (N/2) * cos (2*pi*Fn*t+Pn), i.e. 2*An/N*cos (2*pi*Fn*t+Pn).Signal for n=1 point is DC component, amplitude are A1/N.

Due to the symmetry of FFT transformation result, usually using first half as a result, i.e. less than the knot of sample frequency half Fruit, the mode unified quantization output of the result parallel port of amplitude, realizes that the corresponding time is fast, precision is high, the purpose of high sensitivity.

Above embodiments are only to illustrate the technical idea of the utility model, and the protection model of the utility model cannot be limited with this Enclose, it is all according to the utility model proposes technical idea, be made any change, each falls within this reality on the basis of technical solutions With in novel protected range.

Claims (4)

1. a kind of novel digital satellite beacon receiver, it is characterised in that: amplify including the first amplifier and with described first The first connected frequency mixer processing unit of device, the second frequency mixer processing unit, the second amplifier, height AD and FPGA digital processing Chip；

First amplifier, for being exported after receiving satellite beacon signals and amplification；

First frequency mixer processing unit, including the first frequency mixer, the first local oscillator unit and first filter, the first frequency mixer is by The output signal of one amplifier is mixed to obtain an intermediate-freuqncy signal with the carrier signal that the first local oscillator unit exports, and frequency point is 838MHz is exported after first filter filters；

Second frequency mixer processing unit, including the second frequency mixer, the second local oscillator unit and second filter, the second frequency mixer is by The output signal of one filter is mixed to obtain two intermediate-freuqncy signals with the carrier signal that the second local oscillator unit exports, and frequency point is 50MHz is exported after second filter filters；

Second amplifier after receiving second filter output signal and amplification for exporting, and height AD is for receiving the second amplifier Output signal exported after height AD sampling, FPGA digital processing chip leads to after being used to complete the filtering and calculation process of signal Cross digital signal output.

2. novel digital satellite beacon receiver as described in claim 1, which is characterized in that the FPGA digital processing core Piece includes FIR filter unit and FFT converting unit, and FIR filter unit is connect with FFT converting unit；FIR filter unit is for width Band search and narrowband automatically track；FFT converting unit becomes frequency domain output from time domain for calculating digital beacon signal.

3. novel digital satellite beacon receiver as described in claim 1, which is characterized in that the FPGA is selected ALTERLA company model is the FPGA of EP3C40Q240.

4. novel digital satellite beacon receiver as described in claim 1, which is characterized in that the model of the height AD AD9281。