CN208257983U - Mute control circuit for power failure - Google Patents
Mute control circuit for power failure Download PDFInfo
- Publication number
- CN208257983U CN208257983U CN201820902915.5U CN201820902915U CN208257983U CN 208257983 U CN208257983 U CN 208257983U CN 201820902915 U CN201820902915 U CN 201820902915U CN 208257983 U CN208257983 U CN 208257983U
- Authority
- CN
- China
- Prior art keywords
- resistance
- voltage
- power
- voltage output
- output port
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The utility model discloses a kind of mute control circuit for power failure comprising at least two voltage output ports, AND gate circuit, mute control port and exports high level for the high level according to input and exports low level power-fail detection circuit according to the low level of input；At least two voltage output port and at least two input terminals of the AND gate circuit connect one to one, the output end of the AND gate circuit is connect with the input terminal of the power-fail detection circuit, and the output end of the power-fail detection circuit is connect with the mute control port.The mute control circuit for power failure of the utility model can carry out power down monitoring to plurality of voltages simultaneously.
Description
Technical field
The utility model relates to power down quietness technology fields, more particularly, to a kind of mute control circuit for power failure.
Background technique
The existing electronic product (such as television set, set-top box) with sound-playing function during shutdown, electronic product
CPU can not to the power amplifier of electronic product carry out mute operation；And in electronic product shutdown, it is input to power amplifier electricity
The voltage signal on road can generate mutation (i.e. voltage reduces rapidly, such as voltage drops to 0V by 5V), such power amplifier it is defeated
Signal generates mutation out, and the mutation of this output signal will allow loudspeaker to generate the abnormal sound, to form noise.In order to keep away
Exempt from the generation of above situation, existing way is used for by designing a mute control circuit for power failure in electronic product
When detecting electronic product shutdown and power down occur, control power amplifier stops working immediately.
Currently, mute control circuit for power failure can only generally monitor voltage all the way, power down cannot be carried out to plurality of voltages simultaneously
Monitoring.
Utility model content
In view of the above-mentioned problems, the purpose of this utility model is to provide a kind of mute control circuit for power failure, it can be simultaneously
Power down monitoring is carried out to plurality of voltages.
To achieve the goals above, the utility model embodiment provides a kind of mute control circuit for power failure comprising extremely
Lack two voltage output ports, AND gate circuit, mute control port and exports high level for the high level according to input
And low level power-fail detection circuit is exported according to the low level of input；
At least two voltage output port and at least two input terminals of the AND gate circuit connect one to one, institute
The output end for stating AND gate circuit is connect with the input terminal of the power-fail detection circuit, the output end of the power-fail detection circuit and institute
State mute control port connection.
The mute control circuit for power failure provided by the embodiment of the utility model, in non-power down, (electronic product also exists
Normal power-up work), at least two voltage output port is (at least two voltage output port and electronic product
At least two operating circuits connect one to one) the equal output high level voltage of meeting, therefore the AND gate circuit can export high level
Voltage, the in this way power-fail detection circuit can output high level voltage give the mute control port, at this time electronic product with
The power amplifier module of the mute control port connection works normally；(i.e. electronic product disconnection power supply) during power down, it is described at least
The output voltage of two voltage output ports, can be dropped to low level voltage by high level voltage until for 0, in this way described in and door
Circuit can export low level voltage, and the power-fail detection circuit can export low level voltage to the mute control port, this
Sample just triggers the power amplifier module and stops working immediately, to avoid the generation of noise.By upper analysis it is found that the utility model is real
Power down monitoring can be carried out to plurality of voltages simultaneously by applying example.
Preferably, the power-fail detection circuit includes PMOS tube, N-type triode, first voltage output port, second voltage
Output port and first resistor；
The grid of the PMOS tube is connect with the output end of the AND gate circuit, the source electrode of the PMOS tube and described first
The connection of voltage output port, the drain electrode of the PMOS tube are connect with the base stage of the N-type triode, the hair of the N-type triode
The collector of emitter grounding, the N-type triode is connect by the first resistor with the second voltage output port；It is described
Mute control port is connected between the collector and the first resistor of the N-type triode；
In non-power down, the output voltage of the AND gate circuit is higher than the voltage of the first voltage output port.
Preferably, the power-fail detection circuit further includes second resistance；The grid of the PMOS tube passes through second electricity
Resistance is connect with the output end of the AND gate circuit.
Preferably, the power-fail detection circuit further includes first capacitor；It is in parallel between the grid of the PMOS tube and source electrode
There is the first capacitor.
Preferably, the power-fail detection circuit further includes the second capacitor；One end of second capacitor is connected to described
Between the drain electrode of PMOS tube and the base stage of the N-type triode, the other end of second capacitor is grounded.
Preferably, the power-fail detection circuit further includes 3rd resistor；One end of the 3rd resistor is connected to described
Between the drain electrode of PMOS tube and the base stage of the N-type triode, the other end of 3rd resistor is grounded.
Preferably, the power-fail detection circuit further includes third capacitor；One end of the third capacitor is connected to the N-type
Between the collector of triode and the first resistor, the other end of the third capacitor is grounded.
Preferably, the quantity of the voltage output port is four, respectively tertiary voltage output port, the 4th voltage is defeated
Exit port, the 5th voltage output port and the 6th voltage output port.
Preferably, the AND gate circuit includes first diode, the second diode, third diode, the 4th diode,
Four resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, eleventh resistor, the tenth
Two resistance, thirteenth resistor and the 7th voltage output port；
The tertiary voltage output port is connect by the 4th resistance with the cathode of the first diode, and described
One end of five resistance is connected between the 4th resistance and the cathode of the first diode, the other end of the 5th resistance
Ground connection；
The 4th voltage output port is connect by the 6th resistance with the cathode of second diode, and described the
One end of seven resistance is connected between the 6th resistance and the cathode of second diode, the other end of the 7th resistance
Ground connection；
The 5th voltage output port is connect by the 8th resistance with the cathode of the third diode, and described
One end of nine resistance is connected between the 8th resistance and the cathode of the third diode, the other end of the 9th resistance
Ground connection；
The 6th voltage output port is connect by the tenth resistance with the cathode of the 4th diode, and described the
One end of 11 resistance is connected between the tenth resistance and the cathode of the 4th diode, the eleventh resistor it is another
One end ground connection；
The 7th voltage output port passes sequentially through the twelfth resistor and thirteenth resistor ground connection；
The input terminal of the positive and described power-fail detection circuit of four diodes is all connected to the twelfth resistor
Between the thirteenth resistor；
In non-power down, the sum of the voltage of the respective conducting voltage of four diodes and respective cathode is all larger than respectively
From anode voltage.
Preferably, in non-power down, the voltage of the voltage and respective anode of the respective cathode of four diodes
Difference is less than preset threshold value.
Detailed description of the invention
It, below will be to attached needed in embodiment in order to illustrate more clearly of the technical solution of the utility model
Figure is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the utility model, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of mute control circuit for power failure provided by the embodiment of the utility model.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
Every other embodiment obtained, fall within the protection scope of the utility model.
Referring to Figure 1, the utility model embodiment provides a kind of mute control circuit for power failure, broadcasts applied to sound
In the electronic product of playing function comprising at least two voltage output port Vn3, Vn4, Vn5, Vn6, AND gate circuit 1, power down inspection
Slowdown monitoring circuit 2 and mute control port Vo；At least two voltage output port Vn3, Vn4, Vn5, Vn6 and the electronic product
At least two-way operating circuit be correspondingly connected with (when the electronic product power-off when, at least two-way operating circuit is output to institute
The high level voltage for stating at least two voltage output port Vn3, Vn4, Vn5, Vn6 can be decreased up to quickly as 0), and it is described extremely
Few two voltage output ports Vn3, Vn4, Vn5, Vn6, which are also corresponded at least two input terminals of the AND gate circuit 1, to be connected
It connects；The output end of the AND gate circuit 1 is connect with the input terminal of the power-fail detection circuit 2, the power-fail detection circuit 2 it is defeated
Outlet is connect with the mute control port Vo；The power-fail detection circuit 2, the height for being exported according to the AND gate circuit 1
Level and export high level to the mute control port Vo, and for according to the low level that the AND gate circuit 1 exports and to
The mute control port Vo exports low level.
The working principle of the embodiment of the present invention mute control circuit for power failure are as follows: (electronic product also exists in non-power down
Normal power-up work), at least two-way operating circuit of the electronic product can output high level voltage, in this way described at least
Two voltage output ports Vn3, Vn4, Vn5, Vn6 can equal output high level voltage, therefore the AND gate circuit 1 can export high electricity
Ordinary telegram pressure, and the power-fail detection circuit 2 can output high level voltage give the mute control port Vo, electronic product at this time
The power amplifier module connecting with the mute control port Vo works normally；(i.e. electronic product disconnection power supply) during power down, it is described
At least two-way operating circuit high level voltage that is output at least two voltage output port Vn3, Vn4, Vn5, Vn6, meeting
Low level voltage is rapidly dropped to until for 0 (the voltage decrease speed of at least two-way operating circuit can it is identical can also be with
It is different), the AND gate circuit 1 described in this way can export low level voltage, and the power-fail detection circuit 2 can export low level voltage to
The mute control port Vo, thus triggers the power amplifier module and stops working immediately, to avoid the generation of noise.
When the voltage decrease speed difference of at least two-way operating circuit (due at least two-way operating circuit
Circuit structure and load are different, therefore the voltage decrease speed of at least two-way operating circuit can be different), described at least two
The voltage decrease speed of the output voltage of voltage output port Vn3, Vn4, Vn5, Vn6 also can be different；And voltage most drops to fastly
That voltage output port of low level voltage is understood before other voltage output ports also do not drop to low level voltage,
Low level voltage is exported with regard to triggering the AND gate circuit 1, to finally make the mute control port Vo output low level electricity
It presses and the power amplifier module is stopped working immediately.Therefore, the embodiment of the present invention mute control circuit for power failure, can be automatic
Selection voltage declines most fast that, and operating circuit triggers mute work all the way, so as to improve circuit mute triggering sound
Answer speed.
For the ease of the understanding to the utility model, some specific embodiments of the utility model are provided herein:
In the present embodiment, specifically, referring to Figure 1, the power-fail detection circuit 2 wraps
Include PMOS tube Q1, N-type triode Q2, first voltage output port Vn1, second voltage output port Vn2 and first
Resistance R1；The grid of the PMOS tube Q1 is connect with the output end of the AND gate circuit 1, the source electrode of the PMOS tube Q1 with it is described
The drain electrode of the Vn1 connection of first voltage output port, the PMOS tube Q1 is connect with the base stage of the N-type triode Q2, the N-type
The emitter of triode Q2 is grounded, and the collector of the N-type triode Q2 passes through the first resistor R1 and the second voltage
Output port Vn2 connection；The mute control port Vo be connected to the N-type triode Q2 collector and the first resistor
Between R1；In non-power down, the output voltage of the AND gate circuit 1 is higher than the voltage of the first voltage output port Vn1.Its
In, the course of work of the power-fail detection circuit 2 are as follows:
In non-power down, due to 1 output high level voltage of AND gate circuit and it is higher than the first voltage output port
The voltage of Vn1, the voltage of the grid of such PMOS tube Q1 is greater than the voltage of source electrode, therefore the PMOS tube Q1 ends, such institute
The voltage for stating the base stage of N-type triode Q2 is very low, so that the N-type triode Q2 ends, therefore the second voltage output end
Mouth Vn2 can be to the mute control port Vo output high level voltage, and the power amplifier module of the electronic product is normal at this time
Work；When power down occurs, since the AND gate circuit 1 exports low level voltage, the electricity of the source electrode of the PMOS tube Q1 described in this way
Pressure is greater than the voltage of grid, therefore the PMOS tube Q1 is connected, and the voltage of the base stage of the N-type triode Q2 described in this way gets higher, makes
The N-type triode Q2 conducting is obtained, the second voltage output port Vn2 described in this way can be low to the mute control port Vo output
Level voltage, to trigger the generation that the power amplifier module stopped working immediately and avoided noise.
In order to improve the circuit performance of the power-fail detection circuit 2, corrective measure as follows is provided herein:
Referring to Figure 1, the power-fail detection circuit 2 further includes second resistance R2；The grid of the PMOS tube Q1 passes through institute
Second resistance R2 is stated to connect with the output end of the AND gate circuit 1.Wherein, the second resistance R2 can change the PMOS tube
The front and back of the pulse of the input of Q1 is along steepness, to reduce due to voltage spikes, and can be formed to avoid because of parasitic capacitance and inductance
Oscillation, so that the work of the PMOS tube Q1 is more reliable.
Referring to Figure 1, the power-fail detection circuit 2 further includes first capacitor C1；The grid and source electrode of the PMOS tube Q1
Between be parallel with the first capacitor C1, the PMOS tube Q1 due to voltage spikes occurred can be absorbed in this way, so as to
Influence to avoid due to voltage spikes to the work of the PMOS tube Q1.
Referring to Figure 1, the power-fail detection circuit 2 further includes the second capacitor C2；One end of the second capacitor C2 connects
Between the drain electrode of the PMOS tube Q1 and the base stage of the N-type triode Q2, the other end of the second capacitor C2 is grounded.Its
In, the effect of the second capacitor C2 is: absorbing the voltage point occurred between the PMOS tube Q1 and the N-type triode Q2
Peak avoids unstable voltage signal from being input to the base stage of the N-type triode Q2 and makes the work of the N-type triode Q2
Occur abnormal.
Referring to Figure 1, the power-fail detection circuit 2 further includes 3rd resistor R3；One end of the 3rd resistor R3 connects
Between the drain electrode of the PMOS tube Q1 and the base stage of the N-type triode Q2, the other end of 3rd resistor R3 is grounded.Wherein,
The effect of the 3rd resistor R3 is: effectively eliminating the voltage occurred between the PMOS tube Q1 and the N-type triode Q2
Spike avoids unstable voltage signal from being input to the base stage of the N-type triode Q2 and makes the work of the N-type triode Q2
Make to occur abnormal.
Referring to Figure 1, the power-fail detection circuit 2 further includes third capacitor C3；One end of the third capacitor C3 connects
Between the collector and the first resistor R1 of the N-type triode Q2, the other end of the third capacitor C3 is grounded.It is described
The effect of third capacitor C3 is: so that the voltage signal for being output to the mute control port Vo is more stable.
It should be noted that the power-fail detection circuit 2 can also be to be made of multiple triodes either multiple metal-oxide-semiconductors
Circuit, " export high level according to the high level of input as long as can be realized and low electricity exported according to the low level of input
It is flat ", it is not specifically limited herein.
In the above-described embodiments, preferably, referring to Figure 1, the quantity of described voltage output port Vn3, Vn4, Vn5, Vn6
It is four, respectively tertiary voltage output port Vn3, the 4th voltage output port Vn4, the 5th voltage output port Vn5 and
Six voltage output port Vn6, described four voltage output ports Vn3, Vn4, Vn5, Vn6 respectively with four tunnels of the electronic product
Operating circuit connection, such the embodiment of the present invention mute control circuit for power failure can simultaneously to the power down of No. four operating circuits into
Row monitoring.
Further, referring to Figure 1, the AND gate circuit 1 includes first diode D1, the second diode D2, the three or two
Pole pipe D3, the 4th diode D4, the 4th resistance R4, the 5th resistance R5, the 6th resistance R6, the 7th resistance R7, the 8th resistance R8,
Nine resistance R9, the tenth resistance R10, eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13 and the 7th voltage output
Port Vn7.Wherein, these components are connected with each other in the following manner:
The tertiary voltage output port Vn3 is connected by the cathode of the 4th resistance R4 and first diode D1
It connects, one end of the 5th resistance R5 is connected between the 4th resistance R4 and the cathode of the first diode D1, described
The other end of 5th resistance R5 is grounded.Wherein, the 4th resistance R4 and the 5th resistance R5 constitutes a bleeder circuit, makes
The voltage for obtaining the cathode that the tertiary voltage output port Vn3 is output to the first diode D1 is first voltage.
The 4th voltage output port Vn4 is connected by the cathode of the 6th resistance R6 and the second diode D2
It connects, one end of the 7th resistance R7 is connected between the 6th resistance R6 and the cathode of the second diode D2, described
The other end of 7th resistance R7 is grounded.Wherein, the 6th resistance R6 and the 7th resistance R7 constitutes a bleeder circuit, makes
The voltage for obtaining the cathode that the 4th voltage output port Vn4 is output to the second diode D2 is second voltage.
The 5th voltage output port Vn5 is connected by the cathode of the 8th resistance R8 and third diode D3
It connects, one end of the 9th resistance R9 is connected between the 8th resistance R8 and the cathode of the third diode D3, described
The other end of 9th resistance R9 is grounded.Wherein, the 8th resistance R8 and the 9th resistance R9 constitutes a bleeder circuit, makes
The voltage for obtaining the cathode that the 5th voltage output port Vn5 is output to the third diode D3 is tertiary voltage.
The 6th voltage output port Vn6 is connected by the cathode of the tenth resistance R10 and the 4th diode D4
It connecing, one end of the eleventh resistor R11 is connected between the tenth resistance R10 and the cathode of the 4th diode D4,
The other end of the eleventh resistor R11 is grounded.Wherein, the tenth resistance R10 and eleventh resistor R11 constitutes one
Bleeder circuit, so that the voltage that the 6th voltage output port Vn6 is output to the cathode of the 4th diode D4 is the 4th
Voltage.
The 7th voltage output port Vn7 passes sequentially through the twelfth resistor R12 and the thirteenth resistor R13 connects
The input terminal on ground, the positive and described power-fail detection circuit 2 of described four diodes D1, D2, D3, D4 is all connected to the described tenth
Between two resistance R12 and the thirteenth resistor R13.Wherein, the twelfth resistor R12 and the thirteenth resistor R13 structure
At a bleeder circuit, so that the 7th voltage output port Vn7 is being output to described four diodes D1, D2, D3, D4 just
The voltage of pole is that the 5th voltage (certainly, also makes the 7th voltage output port Vn7 be output to the power-fail detection circuit 2
The disconnected voltage of input be the 5th voltage).When the power-fail detection circuit 2 includes the PMOS tube Q1 and the N-type three
When pole pipe Q2, if non-power down, the 5th voltage can be greater than the output voltage of the first voltage output port Vn1.
In non-power down, the voltage of four diodes D1, D2, D3, D4 respective conducting voltage and respective cathode
The sum of be all larger than the voltage of respective anode, it may be assumed that in non-power down, the conducting voltage of first voltage and the first diode D1
The sum of, the sum of second voltage and the conducting voltage of the second diode D2, tertiary voltage lead with the third diode D3's
The sum of the conducting voltage of the sum of energization pressure and the 4th voltage and the 4th diode D4, is all larger than the 5th voltage.
The course of work of the AND gate circuit 1 are as follows: in non-power down, described four diodes D1, D2, D3, D4 are not turned on,
The 5th voltage of 7th voltage output port Vn7 output is high level voltage, therefore 2 meeting of the power-fail detection circuit
Output high level voltage gives the mute control port Vo, and the power amplifier module works normally at this time.When power was lost, described four
Voltage output port Vn3, Vn4, Vn5, Vn6 can be reduced to low level voltage by high level voltage, when one of voltage output
When the output voltage of port is sufficiently low, corresponding diode current flow, the electric current of the 7th voltage output port Vn7 at this time
Ground can be output to via the diode, so that the 5th voltage becomes low level voltage from high level voltage, in this way
The power-fail detection circuit 2 can export low level voltage to the mute control port Vo, to trigger mute work.
It should be noted that the AND gate circuit 1 can also be other circuit structures, the prior art can be specifically referred to,
This will not be repeated here.
Preferably, in non-power down, the voltage of the voltage and respective anode of the respective cathode of four diodes
Difference is less than preset threshold value (that is: the respective difference with the 5th voltage of first voltage, second voltage, tertiary voltage and the 4th voltage
Value is less than preset threshold value, is, for example, less than 0.5V or 0.3V etc.), the voltage of the respective cathode of four diodes and each in this way
From anode voltage relatively, thus during power down, the voltage of the cathode of diode, which only needs to decline, more by a small margin can
To trigger the conducting of the diode, the response for the mute triggering for improving circuit so as to quickly trigger the mute work of power down
Speed.
In conclusion the mute control circuit for power failure provided by the embodiment of the utility model, during power down, Neng Gougen
Mute work is triggered, according to the power down of multiplex operation circuit so as to carry out power down monitoring to plurality of voltages simultaneously.And
The voltage decrease speed of multiplex operation circuit does not decline most fast that operating circuit touches all the way meanwhile, it is capable to automatically select voltage
Send out work mute, so as to improve circuit mute triggering response speed.
Above description is only a specific implementation of the present invention, but the protection scope of the utility model is not limited to
In this, any those skilled in the art is in technical scope disclosed by the utility model, the change that can readily occur in
Change or replace, should be covered within the scope of the utility model.Therefore, the protection scope of the utility model should be with described
Subject to scope of protection of the claims.
Claims (10)
1. a kind of mute control circuit for power failure, which is characterized in that including at least two voltage output ports, AND gate circuit, mute
Control port and high level is exported for the high level according to input and is exported low level according to the low level of input
Power-fail detection circuit；
At least two voltage output port and at least two input terminals of the AND gate circuit connect one to one, it is described with
The output end of gate circuit is connect with the input terminal of the power-fail detection circuit, the output end of the power-fail detection circuit with it is described quiet
The connection of sound control port.
2. mute control circuit for power failure according to claim 1, which is characterized in that the power-fail detection circuit includes PMOS
Pipe, N-type triode, first voltage output port, second voltage output port and first resistor；
The grid of the PMOS tube is connect with the output end of the AND gate circuit, the source electrode of the PMOS tube and the first voltage
Output port connection, the drain electrode of the PMOS tube are connect with the base stage of the N-type triode, the emitter of the N-type triode
Ground connection, the collector of the N-type triode are connect by the first resistor with the second voltage output port；It is described mute
Control port is connected between the collector and the first resistor of the N-type triode；
In non-power down, the output voltage of the AND gate circuit is higher than the voltage of the first voltage output port.
3. mute control circuit for power failure according to claim 2, which is characterized in that the power-fail detection circuit further includes
Two resistance；The grid of the PMOS tube is connect by the second resistance with the output end of the AND gate circuit.
4. mute control circuit for power failure according to claim 2, which is characterized in that the power-fail detection circuit further includes
One capacitor；The first capacitor is parallel between the grid and source electrode of the PMOS tube.
5. mute control circuit for power failure according to claim 2, which is characterized in that the power-fail detection circuit further includes
Two capacitors；One end of second capacitor is connected between the drain electrode of the PMOS tube and the base stage of the N-type triode, described
The other end of second capacitor is grounded.
6. mute control circuit for power failure according to claim 2, which is characterized in that the power-fail detection circuit further includes
Three resistance；One end of the 3rd resistor is connected between the drain electrode of the PMOS tube and the base stage of the N-type triode, third
The other end of resistance is grounded.
7. mute control circuit for power failure according to claim 2, which is characterized in that the power-fail detection circuit further includes
Three capacitors；One end of the third capacitor is connected between the collector and the first resistor of the N-type triode, and described
The other end of three capacitors is grounded.
8. mute control circuit for power failure according to any one of claims 1 to 7, which is characterized in that the voltage output end
The quantity of mouth is four, respectively tertiary voltage output port, the 4th voltage output port, the 5th voltage output port and the 6th
Voltage output port.
9. mute control circuit for power failure according to claim 8, which is characterized in that the AND gate circuit includes the one or two pole
Pipe, the second diode, third diode, the 4th diode, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th
Resistance, the 9th resistance, the tenth resistance, eleventh resistor, twelfth resistor, thirteenth resistor and the 7th voltage output port；
The tertiary voltage output port is connect by the 4th resistance with the cathode of the first diode, the 5th electricity
One end of resistance is connected between the 4th resistance and the cathode of the first diode, another termination of the 5th resistance
Ground；
The 4th voltage output port is connect by the 6th resistance with the cathode of second diode, the 7th electricity
One end of resistance is connected between the 6th resistance and the cathode of second diode, another termination of the 7th resistance
Ground；
The 5th voltage output port is connect by the 8th resistance with the cathode of the third diode, the 9th electricity
One end of resistance is connected between the 8th resistance and the cathode of the third diode, another termination of the 9th resistance
Ground；
The 6th voltage output port is connect by the tenth resistance with the cathode of the 4th diode, and the described 11st
One end of resistance is connected between the tenth resistance and the cathode of the 4th diode, the other end of the eleventh resistor
Ground connection；
The 7th voltage output port passes sequentially through the twelfth resistor and thirteenth resistor ground connection；
The input terminal of the positive and described power-fail detection circuit of four diodes is all connected to the twelfth resistor and institute
It states between thirteenth resistor；
In non-power down, the sum of the respective conducting voltage of four diodes and the voltage of respective cathode are all larger than respective
The voltage of anode.
10. mute control circuit for power failure according to claim 9, which is characterized in that in non-power down, four two poles
The difference for managing the voltage of respective cathode and the voltage of respective anode is less than preset threshold value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820902915.5U CN208257983U (en) | 2018-06-11 | 2018-06-11 | Mute control circuit for power failure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820902915.5U CN208257983U (en) | 2018-06-11 | 2018-06-11 | Mute control circuit for power failure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208257983U true CN208257983U (en) | 2018-12-18 |
Family
ID=64654113
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820902915.5U Active CN208257983U (en) | 2018-06-11 | 2018-06-11 | Mute control circuit for power failure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208257983U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112462291A (en) * | 2020-11-08 | 2021-03-09 | 中国航空工业集团公司洛阳电光设备研究所 | Power-on detection circuit for multiple power supplies |
| CN116055955A (en) * | 2023-01-10 | 2023-05-02 | 富满微电子集团股份有限公司 | Silencing circuit and chip |
-
2018
- 2018-06-11 CN CN201820902915.5U patent/CN208257983U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112462291A (en) * | 2020-11-08 | 2021-03-09 | 中国航空工业集团公司洛阳电光设备研究所 | Power-on detection circuit for multiple power supplies |
| CN116055955A (en) * | 2023-01-10 | 2023-05-02 | 富满微电子集团股份有限公司 | Silencing circuit and chip |
| CN116055955B (en) * | 2023-01-10 | 2023-10-27 | 富满微电子集团股份有限公司 | Silencing circuit and chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN208257983U (en) | Mute control circuit for power failure | |
| CN103166444B (en) | Remote turn-off control signal receiving circuit | |
| CN202634566U (en) | Reset control circuit and television | |
| CN104122970A (en) | Power circuit | |
| CN204761290U (en) | Single bond the low voltage power supply ON -OFF control circuit | |
| CN207398814U (en) | Under-voltage overvoltage crowbar and electric power system | |
| CN207265645U (en) | A kind of short-circuit protection circuit of driving load | |
| CN208508514U (en) | A kind of short-circuit protection circuit of switching circuit | |
| CN201122942Y (en) | Reset circuit | |
| CN203313051U (en) | Efficient release circuit structure | |
| CN101179185A (en) | USB interface short-circuit protection circuit and power supply with USB interface short-circuit protection function | |
| CN209249052U (en) | A kind of low back-pressure circuit of LED display, device and LED display | |
| CN203405751U (en) | Novel voltage stabilizer circuit structure | |
| CN208923813U (en) | A kind of undervoltage lockout circuit with dynamic filter function | |
| CN103904630A (en) | Discharging circuit | |
| CN206147508U (en) | Reset circuit and intelligent system | |
| CN201570848U (en) | Power supply protection circuit and household electric appliance | |
| CN208258050U (en) | Mute control circuit for power failure | |
| CN205265655U (en) | Stand -by power consumption is zero single bond switching on and shutting down circuit | |
| CN204390095U (en) | A kind of novel under-voltage protecting circuit | |
| CN201966879U (en) | Reset circuit | |
| CN202798970U (en) | HDMI (high-definition multimedia interface) device | |
| CN203708369U (en) | Control circuit shared by MHL interface and HDMI interface, and display device | |
| CN202496004U (en) | Reset circuit and television | |
| CN202551203U (en) | Singlechip microcomputer power supply management circuit and television constant-current driving plate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |