CN208172260U - A kind of Timing Receiver - Google Patents

Abstract

The utility model discloses a kind of Timing Receivers, including：Independent power supply module, for the navigation module of outputting standard 1PPS and TOD, and for the time-frequency generation module according to standard 1PPS and TOD generation time frequency information；Wherein：Power supply module is connect with navigation module and time-frequency generation module respectively；Navigation module is connect with time-frequency generation module.Timing Receiver disclosed by the utility model, power supply module individually isolate, convenient to carry out troubleshooting to each module of Timing Receiver.

Description

A kind of Timing Receiver

Technical field

The utility model relates to the communication technology, espespecially a kind of Timing Receiver.

Background technique

The timing code (InterRange Intrumentation Group B, abbreviation B code) of IRIG-B, is U.S. target range The abbreviation of instrument group is all made of B code as time synchronizing standard in test equipments such as target range measurement, aerospace and meteorologies.So And the power supply for providing the module for generating B code at present is integrated in the module, is not easy troubleshooting.

Utility model content

In order to solve the above-mentioned technical problem, the utility model provides a kind of Timing Receiver, and power supply module is individually isolated Out, convenient that troubleshooting is carried out to each module of Timing Receiver.

In order to reach the utility model aim, the utility model provides a kind of Timing Receiver, including：Independent power supply Module, for the navigation module of outputting standard 1PPS and TOD, and when for being generated according to the standard 1PPS and the TOD Between frequency information time-frequency generation module；Wherein：

The power supply module is connect with the navigation module and the time-frequency generation module respectively；The navigation module with The time-frequency generation module connection.

Further, the temporal frequency information includes：AC code and DC code；

The time-frequency generation module includes：

For receiving the TOD, and export the ARM chip of time useful signal；

For providing the crystal oscillator of clock pulses；

For obtaining the standard 1PPS and the clock pulses, have in the time for receiving the ARM chip transmission Imitate signal when, the clock pulses is divided, clock pulses and the standard 1PPS after output frequency division, generate the AC code with The FPGA of the DC code；

The clock pulses and standard 1PPS progress second difference measurements after frequency dividing for exporting the FGPA, and will survey Second difference after amount issues the time interval measurement chip that the ARM chip is handled；And

For the second difference signal after the ARM chip processing to be converted to voltage-controlled voltage to adjust the conversion core of the crystal oscillator Piece；Wherein：

The FPGA is connect with the ARM chip and the crystal oscillator respectively, the time interval measurement chip respectively with institute It states FPGA to connect with the ARM chip, the conversion chip is connected with the crystal oscillator.

Further, the ARM chip is STM32 single-chip microcontroller；The crystal oscillator is constant temperature high stability crystal oscillator；The time interval Measurement chip is TDC-GP22；The conversion chip is DA conversion chip.

Further, the navigation module uses GPS/BD double mode.

Further, the Timing Receiver further includes：

The TOD sent for receiving the navigation module, and the TOD is dumped to CF card, and by the time-frequency The TOD that generation module is sent is converted and is exported the data processing and logging modle of transitional information；And

The location status that conversion signal is exported for receiving the transitional information, and after the transitional information is arranged is handled Module；Wherein：

The data processing and logging modle and the location status processing module are connected with each other.

Further, the conversion signal includes：429 protocol datas and serial data.

Further, the data processing and logging modle use technical grade ARM chip.

Further, the power supply module uses DC/DC conversion chip.

The utility model compared with prior art, has the advantages that：Power supply module individually isolates, and convenient pair Each module of Timing Receiver carries out troubleshooting.Use the time-frequency generation module built based on FPGA+STM32 framework, including constant temperature height After the module of steady crystal oscillator, FPGA, STM32, GP22, DA conversion chip etc., provide accurately meet customer requirement position, when Between, course, B code, the contents such as initial data.High Precision Crystal Oscillator is adjusted by high speed FPGA and the cooperation of high-performance ARM chip, is being led After model plane block losing lock in 4 hours, it still is able to provide the high-precision frequency of 5E-10 magnitude.And using large bulk capacitance storage foot Enough quantities of electric charge, equipment remains to continue normal work within the power-off 50ms time；Real-time data information is stored using CF card, is protected High reliability and strong anti-interference ability are hindered.

Other features and advantages of the utility model will illustrate in the following description, also, partly from specification In become apparent, or understood and implementing the utility model.The purpose of this utility model and other advantages can pass through Specifically noted structure is achieved and obtained in the specification, claims and drawings.

Detailed description of the invention

Attached drawing is used to provide to further understand technical solutions of the utility model, and constitutes part of specification, It is used to explain the technical solution of the utility model together with embodiments herein, not constitute to technical solutions of the utility model Limitation.

Fig. 1 is the structure chart for the Timing Receiver that the utility model embodiment one provides；

Fig. 2 is the structural schematic diagram of time-frequency generation module provided by the embodiment of the utility model；

Fig. 3 is the structure chart for the Timing Receiver that the utility model embodiment two provides.

Specific embodiment

For the purpose of this utility model, technical solution and advantage is more clearly understood, below in conjunction with attached drawing to this The embodiment of utility model is described in detail.It should be noted that in the absence of conflict, embodiment in the application and Feature in embodiment can mutual any combination.

Step shown in the flowchart of the accompanying drawings can be in a computer system such as a set of computer executable instructions It executes.Also, although logical order is shown in flow charts, and it in some cases, can be to be different from herein suitable Sequence executes shown or described step.

Fig. 1 is the structure chart for the Timing Receiver that the utility model embodiment one provides, as shown in Figure 1, the utility model Embodiment provide Timing Receiver include：Independent power supply module 1, for the navigation of outputting standard pulse per second (PPS) and temporal information Module 2, and for the time-frequency generation module 3 according to standard pulse per second (PPS) and temporal information generation time frequency information；Wherein：

Power supply module 1 is connect with navigation module 2 and time-frequency generation module 3 respectively, for producing for navigation module 2 and time-frequency Raw module 3 is powered；Navigation module 2 is connect with time-frequency generation module 3.

Specifically, independent power supply module 1 refers to that power supply module 1 individually isolates, it is only with modules Vertical, rather than be integrated in some module.Power supply module 1, connect with modules, for powering for modules.Power supply Module 1, which is connect with navigation module 2 and time-frequency generation module 3 by winding displacement, can be realized power supply.The utility model embodiment provides Timing Receiver, power supply module individually isolates, for generate include B code temporal frequency information the confession of time-frequency generation module Electricity, convenient to carry out troubleshooting to each module of Timing Receiver, the module for power supply for avoiding offer B code in the prior art is not isolated individually Out, it is not easy the problem of troubleshooting.

Optionally, power supply module uses DC/DC conversion chip, and what DC/DC was indicated is the transformation of high pressure (low pressure) DC power supply For low pressure (high pressure) DC power supply, the DC to DC of voltage can be realized.In the example of the utility model, supply voltage threshold value is 18~36V generally takes 28V to power, and power supply module can generate after using 28V direct current supply and meet rear end modules need Voltage, the power wanted.Electricity needed for the voltage value of supply voltage is converted to rear end modules chip using DC-DC converter Pressure value, for example, 18~36V turns 12V, 18~36V turns 5V, and 5V turns 3.3V, and 5V turns 2.5V, and 5V turns 1.2V etc..After wherein 12V can be The crystal oscillator power supply that face embodiment refers to, the data record that 5V, 3.3V, 1.2V are referred in time-frequency generation module and Examples hereinafter Each chip is used in module and location status processing module.Meanwhile the additional large bulk capacitance storage of power supply module is enough The quantity of electric charge guarantees that Timing Receiver can still work normally in power-off 50ms.

Specifically, temporal information (TimeofDay, abbreviation TOD) is that location information state sentence is composed, including The sentences such as corresponding GGA, RMC contain the temporal informations such as various information, including current time, position and speed in every sentence. 1PPS is pulse per second (PPS), and the 1PPS of navigation module output sends out data parsing by interpreting base station inside navigation module, navigating It is considered as its standard pulse per second (PPS) under module lock state.Navigation module has 4 using high-precision, highly sensitive navigation module Frequency point GPS (L1), GPS (L2), BDS (B1), BDS (B2)：120 channel configurations.In the state of power supply, high-precision, Gao Ling The navigation module of sensitivity needs external satellite antenna, and in the state that device screen shows satellite locking, navigation module is in locking State, the information sent by collecting satellite, cooperate receiver internal algorithm, calculate the current position of receiver, speed and The temporal informations such as time can provide real-time temporal information, for the use of time-frequency generation module.Wherein, navigation module passes through The information that satellite is sent is collected, cooperates receiver internal algorithm, calculates the times such as the current Position, Velocity and Time of receiver Information is same as the prior art, and the utility model embodiment is herein without repeating.

Further, the temporal frequency information of the utility model includes：AC code and DC code.B code principle is solid for the prior art Determine agreement, the prior art generates B code method and has nothing in common with each other, and the utility model increases AC code function on the basis of generating B code, and defeated It is feature-rich out, it is suitable for all trades and professions outputting standard, meets needed for exhausted big customer.

Fig. 2 is the structural schematic diagram of time-frequency generation module provided by the embodiment of the utility model, as shown in Fig. 2, time-frequency produces Giving birth to module 3 includes：

For receiving TOD, and export the ARM chip 31 of time useful signal；

For providing the crystal oscillator 32 of clock pulses；

For obtaining standard 1PPS and clock pulses, when receiving the time useful signal of ARM chip transmission, by clock arteries and veins Punching divides, and clock pulses and standard 1PPS after output frequency division generate the field programmable gate array 33 of AC code and DC code (Field-Programmable Gate Array, abbreviation FPGA)；

Clock pulses after frequency dividing and standard PPS for exporting FGPA carry out second difference measurements, and by the second after measurement Difference issues the time interval measurement chip 34 that ARM chip is handled；And

For the second difference signal after ARM chip processing to be converted to voltage-controlled voltage to adjust the conversion chip 35 of crystal oscillator；Its In：

FPGA is connect with ARM chip and crystal oscillator respectively, and time interval measurement chip is connect with FPGA and ARM chip respectively, Conversion chip is connected with crystal oscillator.

Optionally, crystal oscillator 32 provides 10M clock pulses.

Specifically, for the prior art has the technical pattern of high-precision receiver navigator fix, receiver locking The data such as current correct time, longitude, dimension, course angle need to be used cooperatively with positioning antenna, a certain number of fixed searching After the satellite of position, data just can normal use.But in some specific cases, as certain areas search of satellite is of poor quality, nothing Method navigates to effective temporal information, just can not obtain its accurate time in this condition.The utility model module time-frequency produces Raw module is used as key components using high speed FPGA33, high-performance ARM chip 31 and High Precision Crystal Oscillator 32, in satellite positioning Afterwards, de-regulation High Precision Crystal Oscillator 32 is cooperated by high speed FPGA33 and high-performance ARM chip 31, in 4 hours feelings of satellite losing lock Under condition, High Precision Crystal Oscillator may continue to provide the frequency for being better than 5E-10 magnitude.Timing Receiver is sustainable by its high-frequency High-precision temporal information is provided.

High speed FPGA33, which is received, to be cooperated after the signal of navigation module with ARM chip 31 whens generating AC code, DC code, 1PPS etc. Between frequency information, signal provided by navigation module 2 is divided into TOD and standard 1PPS, ARM chip 31 and worked as by reading TOD acquisition Preceding temporal information, such as the moon, day, Hour Minute Second.And it integrates the temporal information and generates corresponding flag bit.High speed FPGA33 passes through crystal oscillator 32 Provided 10M clock frequency does frequency dividing operation and obtains 1PPS, and is cooperated by the corresponding flag bit that ARM chip 31 generates and generated Required DC code.Chip, which is generated, using AC code by its DC code and flag bit generates corresponding A C code.It should be noted that this is practical It is novel that flag bit is generated according to temporal information, and required DC timing code is generated by flag bit cooperation, and pass through DC code Chip is generated using AC code with flag bit and generates corresponding A C code, and identical as the realization principle of the prior art, the present embodiment is herein Without repeating.

The standard 1PPS and temporal information of the output of navigation module 2 of the reception of time-frequency generation module 3 simultaneously simultaneously are used to correct high-precision Spend crystal oscillator 32, make Timing Receiver time-frequency output it is more accurate, while it is corrected after crystal oscillator 32 can be in navigation module losing lock Continue to provide the frequency for being better than 5E-10 magnitude in 4 hours afterwards.The own frequency without any correction of crystal oscillator 32 is lower (frequency magnitude is determined by crystal oscillator itself), and after correcting in the case where no subsequent correction crystal oscillator frequency can increase at any time and Frequency shift (FS).Crystal oscillator used in the utility model itself 10M frequency is about 1E-6 magnitude, and by the clock frequency, FPGA33 passes through 1PPS obtained by this clock is divided, the 1PPS after time interval measurement chip 34 divides FPGA33 is led with what is forwarded by FPGA33 The standard 1PPS that model plane block 2 exports does second range measurer calculation, is persistently exported the voltage value of correcting clock frequency needed for it by operation To crystal oscillator 32 to correct crystal oscillator clock frequency.Under the conditions of 2 losing lock of navigation module, the voltage value persistently corrected after exporting is utilized Crystal oscillator frequency is maintained, remains to continue to provide the frequency for being better than 5E-10 magnitude in 4 hours.

Optionally, ARM chip is STM32 single-chip microcontroller；Crystal oscillator is constant temperature high stability crystal oscillator；Time interval measurement chip is TDC- GP22 (abbreviation GP22)；Conversion chip is DA conversion chip.

Specifically, the utility model is built using a kind of based on FPGA+STM32 framework, including constant temperature high stability crystal oscillator, The time-frequency generation module of FPGA, STM32, GP22, DA conversion chip etc. remains to continue to mention in 4 hours after navigation module losing lock It is lasting that the position for meeting customer requirement is provided under the premise of being based on higher precision receiver navigator fix for high-precision frequency It sets, time, course, B code, the contents such as initial data.Wherein, ARM chip has stronger transaction management ability, and advantage is control System aspect, it is a cup framework, is suitble to make Embedded processor, and at low cost, feature-rich, exploitation is simply.FPGA can Various logic function is designed for it, parallel processing speeds are fast, are suitble to high speed situation such as data acquisition and procession.Comprehensive required function Energy FPGA and ARM chip collocation is more reasonable, and the collocation framework is the cooperation framework that applicant company is used for a long time, and technology is more It is mature.

Timing Receiver provided by the embodiment of the utility model provides high-precision location information under satellite lock condition It is adjusted using the location information etc. under its positioning states by high speed FPGA and the cooperation of high-performance ARM chip with time service signal Whole High Precision Crystal Oscillator, by its high-precision frequency, persistently provides high-precision temporal information letter under conditions of satellite losing lock Number, for client's use.

Fig. 3 is the structure chart for the Timing Receiver that the utility model embodiment two provides, as shown in figure 3, the utility model Embodiment provide Timing Receiver further include on the basis of the above embodiments：For receiving the TOD of navigation module transmission, And TOD is dumped to CF card, and the TOD that time-frequency generation module is sent is converted and export the data processing of transitional information with Logging modle 4；And

The location status processing module 5 of conversion signal is exported for receiving transitional information, and after transitional information is arranged；Its In：

Data processing and logging modle 4 and location status processing module 5 are connected with each other.

Optionally, navigation module 2 uses GPS/BD double mode.Data processing and logging modle 4 use technical grade ARM core Piece.

Specifically, time-frequency generation module be built based on FPGA+STM32 framework, including constant temperature high stability crystal oscillator, FPGA, STM32, GP22, DA conversion chip etc..Wherein high-precision navigation module is that GPS, BD are two-in-one, and navigation module connect with radio station and connects Packet receiving includes the navigation data of temporal information, and navigation module can send 1PPS signal to FPGA, send TOD information to STM32；It is permanent Warm high stability crystal oscillator can generate high-precision 10M clock pulses, and the accuracy for the temporal information of receiver board provides safeguard, Clock pulses is provided for the normal work of FPGA simultaneously, is essential important component.Wherein, constant-temperature crystal oscillator is to utilize The temperature for the quartz-crystal resonator that thermostat keeps it internal is kept constant, and oscillator caused by exterior ambient temperatures are changed is defeated Frequency variation is cut to minimum out, and high stability crystal oscillator frequency stability is more preferable and more reliable, and the utility model is using fusion constant temperature The constant temperature high temperature crystal oscillator of crystal oscillator and high temperature crystal oscillator advantage, more preferably can more meet design requirement and constant temperature high temperature crystal oscillator is transported at home With more universal.

STM32 interprets it after receiving the TOD that navigation module is sent, and whether acknowledging time information is effective. Whether STM32 acknowledging time information effectively specifically includes：The lock flag of correlative is read by TOD transmitted by navigation module Position judges, locks sentence if it is satellite in current TOD information, and acknowledging time information is effectively usable.Due to navigation module Provided TOD is the TOD of losing lock in the state of losing lock, and does not contain its correct time and location information.Under losing lock TOD information can still be sent to STM32 by its communication serial port, and the utility model STM32 can be sent to navigation module is received The TOD come is effectively judged that, when the TOD that navigation module is sent is the TOD of losing lock, STM32 will not do respective handling, FPGA will not do respective handling to its 1PPS.When STM32 acknowledging time information is effective, it will effective to FPGA sending time Signal；STM32 can extract TOD, be subsequently sent in the RAM of FPGA, and FPGA arbitrarily can take out and be stored on demand.

FPGA is that the 10M pulse provided using constant temperature high stability crystal oscillator works as clock pulses；FPGA is being received After the time useful signal that STM32 is sent, the standard 1PPS signal that navigation module is sent is transmitted to GP22；Meanwhile The 10M signal frequency split that constant temperature high stability crystal oscillator is sent is sent to GP22 at pulse per second (PPS) by FPGA；GP22 can carry out FPGA forwarding Standard pulse per second (PPS) and constant temperature high stability crystal oscillator 10M frequency dividing after the pulse per second (PPS) that generates carry out second difference measurements, and second difference is issued STM32, STM32 carry out processing calculating to second difference.Wherein, STM32 is based on core inner algorithm for the calculating of second difference, passes through meter It calculates known to second difference by the difference between the 10M 1PPS distributed and the standard 1PPS of navigation module output, is passed through by difference interior Corresponding adjustment crystal oscillator voltage value is calculated in portion's core algorithm, keeps its crystal oscillator clock 10Mhz frequency more accurate.It needs to illustrate It is that STM32 is based on core inner algorithm and difference is calculated in the utility model embodiment, and passes through internal core by difference Corresponding adjustment crystal oscillator voltage value is calculated in algorithm, is the same as those in the prior art, the utility model embodiment herein without It repeats.

DA conversion chip can treated that second difference signal is converted to voltage-controlled voltage by STM32, to realize to constant temperature height The control of steady crystal oscillator, in order to which constant temperature high stability crystal oscillator exports high-precision 10M clock pulses.Wherein, the voltage-controlled end of crystal oscillator is having It can change the frequency of its crystal oscillator in the case where voltage, the utility model can make crystal oscillator frequency more by controlling the voltage at voltage-controlled end Precisely.

It should be noted that the LCD display output that time-frequency generation module exports in Fig. 3 is connect with liquid crystal display, pass through liquid crystal Screen is shown to client and more intuitively embodies.PPM indicates the frequency departure of crystal oscillator.For the crystal oscillator of 1MHz, 1PPM is exactly 1Hz, for the crystal oscillator of 10MHz, 1PPM is exactly 10Hz.Other 1PPS, 1PPM, AC codes and DC code are used as output to be supplied to client It uses, according to client's needs, outside can connect all kinds of the service of connection devices, without can not then dock.

Data processing and logging modle are using the reception of high stability technical grade ARM chip come to the time of navigation module, position The temporal informations such as set, and in real time the data conversion storage received into pluggable CF card, for the data analysis after use. Meanwhile the parsing of technical grade ARM chip come the temporal information as navigation module and is converted into letter required for serial ports, 429 agreements Breath is sent to location status processing module.In Fig. 2 in the CF card of data processing and logging modle record data write-in CF card；Network Output system state is used to be sent to the monitoring software of client by network interface, and monitoring software is worked as by reading system mode and showing Preceding system mode, it is to send configuration order by the upper computer software of client that network interface, which receives external command, to realize that client is available Upper computer software configures the utility model device correlated condition.It should be noted that the technical grade ARM core that the utility model uses Piece has more high stability than civil, and system stability will not change as external environment changes.

It should be noted that time-frequency generation module is to data processing and logging modle transmission time information, and number in Fig. 3 Control command and information are sent to time-frequency generation module according to processing and logging modle, is one in order to keep respective state constantly The change of cause and modules to state, the interaction of the information of two modules are coordinated to guarantee that equipment operates normally.

Location status processing module receive the content needed in 429 agreements that data processing and logging modle are brought and Content required for serial ports exports passes through various conversion signals required for protocol conversion chip exports after arranging format.It is optional , conversion signal includes：429 protocol datas and serial data.Location status processing module to data processing and records mould in Fig. 2 Block sends 429 level agreements of triggering and sends request, and data processing and logging modle issue transmission instruction, position shape after agreeing to request State processing module just sends information required for serial ports, 429 agreements.Data processing and logging modle and location status processing module Information interaction, ensure that the consistency and stability of Timing Receiver.Location status processing module output end and client institute The output of the data such as 429 data and serial data is given client institute by the external the service of connection devices connection needed, location status processing module The external the service of connection devices needed, to meet needed for client.

With existing product, majority is that time service method is single, and when can not continue to provide high-precision under the conditions of losing lock Between information.There are many output type provided by the utility model, there is IRIG-B (DC), IRIG-B (AC), 1PPS, 1PPM, 429 agreements The content and serial ports of middle needs export required content, pass through required for the output of protocol conversion chip respectively after arranging format Kind signal and common some level standards, such as 232 level, 422 level, TTL/LVTTL level.And data processing and record mould Block is received using high stability technical grade ARM chip come to temporal informations such as the time of navigation module plate, positions, and handle in real time The data conversion storage received is into pluggable CF card, for the data analysis after use.

Further, navigation module provides real-time temporal information in the utility model embodiment, and all kinds of output signals can Use is voluntarily connected according to user demand.If you need to the later period to the processing of its location information, it is inserted into CF card, the utility model detection Certainly it is about to data record after to CF card.It is adjusted if any specific demand, such as peak value of the change of reference source, IRIG-B (AC), 1PPS, The adjusting of 1PPM pulsewidth and positive-negative polarity, connectable device network interface, is modified by upper computer software.Specifically, user is logical Upper computer software configuration is crossed, sends work in the utility model for its relevant configuration information with the network service function of industrial personal computer Control machine module, the communication serial port of the industrial personal computer are connected with the communication serial port of navigation module, pass through ginseng needed for reading client It is configured after examining source configuration integration by serial ports transmission corresponding receiver, receiver reads regulating allocation by serial ports and voluntarily changes it Corresponding reference source (GPS, BD or GPS BD) mode.Information is compiled into relevant configuration position information by industrial personal computer module by two to be transmitted to ARM chip processing, ARM chip are read into register to FPGA according to its relevant configuration bit information preservation, and FPGA reads phase The peak value for exporting correlation IRIG-B (AC) is voluntarily adjusted according to algorithm after closing information, the positive-negative polarity of 1PPS, IPPM and pulse are wide Degree realizes the purpose that client is changed by upper computer software.It should be noted that the industrial personal computer module of the utility model is settable In navigation module, it is also possible to the individual module of Timing Receiver.

In order to overcome under conditions of satellite losing lock, when how can allow Timing Receiver is sustainable to provide high-precision Between information the problem of, in the case where data collector output is single, the utility model, which can provide, meets awarding for most of time service When aspect, data acquire and export while, by real-time reception to message information dump in pluggable CF card, use Data analysis after use.The utility model can be monitored in real time by the upper computer software of collocation, monitoring device state, Temporal information, serial ports message, location information etc..Can also be arranged by upper computer software current reference source (GPS, BD or GPS BD) mode, peak value 2V~6V of IRIG-B (AC) is adjustable, the positive-negative polarity and pulse width of 1PPS, 1PPM are adjustable, meet all kinds of User demand, user can voluntarily select according to their needs.

The utility model compared with prior art, has the advantages that：High-precision time-frequency generation module is built, is made With what is built based on FPGA+STM32 framework, the mould including constant temperature high stability crystal oscillator, FPGA, STM32, GP22, DA conversion chip etc. After block, provides and accurately meet the contents such as position, time, course, B code, the initial data of customer requirement.In navigation module losing lock It still is able to ensure high-precision frequency in the short time afterwards, be cooperated by high speed FPGA and high-performance ARM chip, in its high-precision frequency Under rate, still sustainable offer split-second precision information.The utility model can be monitored in real time by the upper computer software of collocation, Monitoring device state, temporal information, serial ports message, location information etc..Current reference source can also be set by upper computer software (GPS, BD or GPS BD) mode, peak value 2V~6V of IRIG-B (AC) is adjustable, the positive-negative polarity and pulse width of 1PPS, 1PPM It is adjustable.And the utility model can be to such as navigation of high other of requirement of real-time, and the fields such as aviation use, and is that other are high in real time Property equipment provide the guarantee of split-second precision frequency.

The utility model real-time performance is high, ensures that unfailing performance is good, provides the information of more pinpoint accuracy, and stability is good, The features such as good in anti-interference performance, tool have good promotion and practical value, it is ensured that respectively have the technology neck to real-time information requirements Effective progress of the work in domain.Using high-precision time-frequency generation module, after navigation module losing lock in 4 hours, it still is able to provide The high-precision frequency of 5E-10 magnitude；And enough quantities of electric charge are stored using large bulk capacitance, the equipment within the power-off 50ms time It remains to continue normal work；Real-time data information is stored using CF card, has ensured high reliability and strong anti-interference ability.

Although embodiment disclosed by the utility model is as above, the content only the utility model for ease of understanding And the embodiment used, it is not intended to limit the utility model.Technical staff in any the utility model fields, Under the premise of not departing from spirit and scope disclosed by the utility model, it can be carried out in the form and details of implementation any Modification and variation, but the scope of patent protection of the utility model, still should be subject to the scope of the claims as defined in the appended claims.

Claims (8)

1. a kind of Timing Receiver, which is characterized in that including：Independent power supply module, for outputting standard pulse per second (PPS) 1PPS and The navigation module of temporal information TOD, and for according to the standard pulse per second (PPS) 1PPS and the temporal information TOD generation time The time-frequency generation module of frequency information；Wherein：

The power supply module is connect with the navigation module and the time-frequency generation module respectively；The navigation module with it is described The connection of time-frequency generation module.

2. Timing Receiver according to claim 1, which is characterized in that the temporal frequency information includes：AC code and DC Code；

The time-frequency generation module includes：

For receiving the temporal information TOD, and export the ARM chip of time useful signal；

For providing the crystal oscillator of clock pulses；

For obtaining the standard pulse per second (PPS) 1PPS and the clock pulses, in the time for receiving the ARM chip transmission When useful signal, the clock pulses is divided, clock pulses and the standard pulse per second (PPS) 1PPS after output frequency division, generates institute State the FPGA of AC code and the DC code；

The clock pulses and standard pulse per second (PPS) 1PPS progress second difference measurements after frequency dividing for exporting the FGPA, and will Second difference after measurement issues the time interval measurement chip that the ARM chip is handled；And

For the second difference signal after the ARM chip processing to be converted to voltage-controlled voltage to adjust the conversion chip of the crystal oscillator； Wherein：

The FPGA is connect with the ARM chip and the crystal oscillator respectively, the time interval measurement chip respectively with it is described FPGA is connected with the ARM chip, and the conversion chip is connected with the crystal oscillator.

3. Timing Receiver according to claim 2, which is characterized in that the ARM chip is STM32 single-chip microcontroller；It is described Crystal oscillator is constant temperature high stability crystal oscillator；The time interval measurement chip is TDC-GP22；The conversion chip is DA conversion chip.

4. Timing Receiver according to claim 1, which is characterized in that the navigation module uses GPS/BD double mode.

5. Timing Receiver according to claim 1, which is characterized in that the Timing Receiver further includes：

The temporal information TOD sent for receiving the navigation module, and the temporal information TOD is dumped to CF card, And the temporal information TOD that the time-frequency generation module is sent is converted and exports the data processing and note of transitional information Record module；And

The location status that conversion signal is exported for receiving the transitional information, and after the transitional information is arranged handles mould Block；Wherein：

The data processing and logging modle and the location status processing module are connected with each other.

6. Timing Receiver according to claim 5, which is characterized in that the conversion signal includes：429 protocol datas and Serial data.

7. Timing Receiver according to claim 5 or 6, which is characterized in that the data processing and logging modle use Technical grade ARM chip.

8. Timing Receiver according to claim 1-6, which is characterized in that the power supply module uses DC/DC Conversion chip.