CN208128257U - A kind of vector signal generation device based on chip - Google Patents
A kind of vector signal generation device based on chip Download PDFInfo
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- CN208128257U CN208128257U CN201721722868.8U CN201721722868U CN208128257U CN 208128257 U CN208128257 U CN 208128257U CN 201721722868 U CN201721722868 U CN 201721722868U CN 208128257 U CN208128257 U CN 208128257U
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Abstract
The utility model discloses a kind of vector signal generation device based on chip, the generating device includes clock control cell, F shield GA reference clock, the first local oscillator unit, the second local oscillator unit, wide-band modulation unit, mixing and filtering unit, gain control unit, filtering control unit and matching output unit.It is provided by the utility model it is a kind of based on the vector signal generation device of chip by using phase-locked loop chip, by the different frequency of control chip mixing output, using frequency-division section filters solutions, effectively filtered out harmonic wave and spuious, improved and mutually make an uproar；Due to using chip solution while guaranteeing test index, it is greatly reduced volume, convenient for cascade and future 5G Masive MIMO test.
Description
Technical field
The utility model relates to signal of communication modulation more particularly to a kind of vector signal generation devices and side based on chip
Method.
Background technique
5G is the 5th generation mobile phone mobile communication standard, also referred to as the 5th third-generation mobile communication technology, with 5G mobile communication
Iterative method, the year two thousand twenty realizes that 5G is commercial, and MIMO test equipment increasingly receives important concern inside the communications industry.Mesh
The extensive research and development of preceding 5G mimo antenna, receiver, modularization wideband vector signal source have played extremely important effect.For
Research and development, the generation demand for meeting 5G terminal, base station and antenna, need it is a cascade, high target, the signal of small modular
Instrument occurs.
Instrument at home and abroad in the market, there are no a support while supporting common modulation signal, communication modulation at present
The wideband vector signal emitter that signal is modulated with satellite-signal, conventional vector signal source are using independent local oscillator board, solely
Fire the scheme of frequency channel board, independent clock reference and independent digit modulation board from a standing position, such instrument is not only expensive,
It is not portable, it is unfavorable for cascading, since volume is larger, 128 or 256MIMO of cascade occupies very large space, and cannot be guaranteed to survey
The stability of examination, problem above are all industry urgent problems.
Therefore, there are also to be developed for the prior art.
Utility model content
Place in view of above-mentioned deficiencies of the prior art, the purpose of this utility model is to provide a kind of vectors based on chip
Signal generation apparatus, it is intended to which realization can in real time be monitored spacing wave, analyze, and report problem clew, while can be real-time
Measurement data and fault location information are stored according to time and geographical position coordinates, so as to engineers and technicians into
Row checks the purpose of analysis.
In order to achieve the above object, the utility model takes following technical scheme：
A kind of vector signal generation device and method based on chip, the generating device include clock control cell,
FPGA reference clock, the first local oscillator unit, the second local oscillator unit, wide-band modulation unit, mixing and filtering unit, gain control are single
Member, filtering control unit and matching output unit, the output end of the clock control cell respectively with FPGA reference clock, first
The input terminal connection of local oscillator unit, the second local oscillator unit, the output end of the first local oscillator unit are defeated with wide-band modulation unit
Enter end connection, the output end of the wide-band modulation unit is connected with the input terminal of mixing and filtering unit, the mixing and filtering unit
Output end be connected with the input terminal of gain control unit, the output end of the gain control unit and filtering control unit it is defeated
Enter end to be connected, the output end of the filtering control unit is connected with the input terminal of matching output unit.
Further, the clock control cell includes TCXO and one point of three power splitter, the output end output of the TCXO
The clock of 100MHz provides clock by one point of three power splitter for FPGA, and provides for the first local oscillator unit, the second local oscillator unit
With reference to.
Further, the first local oscillator unit include the first phaselocked loop LMX2592 chip, the first fixed attenuation module,
Second fixed attenuation module, LFCN-3800, HFCN-3800, LFCN-5850, HFCN-600 and either-or switch
SP2TPE42422, the output end of the first phaselocked loop LMX2592 chip with respectively with the first fixed attenuation module, second solid
Determine the input terminal connection of attenuation module, the output end of the first fixed attenuation module is connected with the input terminal of LFCN-3800, institute
LFCN-3800 output end is stated to be connected with HFCN-3800 input terminal；
The output end of the second fixed attenuation module is connected with LFCN-5850 input terminal, the LFCN-5850 output
End is connected with HFCN-600HE input terminal；
The output end of described HFCN-3800, HFCN-600 are connected with either-or switch SP2TPE42422 respectively；
The phaselocked loop of the output end of one point of three power splitter in the clock control cell and the first local oscillator unit
LMX2592 chip input terminal is connected.
Further, so the second local oscillator unit includes the second phaselocked loop LMX2592 chip, T-type attenuation module, LFCN-
6700, HFCN-4400, X-type attenuation module and the first amplifier, the phaselocked loop LMX2592 chip output and T-type are decayed
Module input connection, the T-type attenuation module output end are connect with LFCN-6700 input terminal, the LFCN-6700 output end
It is connect with HFCN-4400 input terminal, the HFCN-4400 output end is connected with X-type attenuation module input terminal, the X-type decaying
Module output end is connected with the first amplifier in, the output end of one in the clock control cell point, three power splitter and institute
The the second phaselocked loop LMX2592 chip input terminal for stating the second local oscillator unit is connected.
Further, the wide-band modulation unit includes third fixed attenuation module, baseband signal generation module and broadband
Modulator, the third fixed attenuation module output end are connected with wideband modulator input terminal, the baseband signal generation module
Output end is connect with wideband modulator input terminal, the output end and broadband tune of the SP2TTPE42422 of the first local oscillator unit
First fixed attenuation module input of unit processed is connected.
Further, the mixing and filtering unit includes frequency mixer, HFCN-10 and LFCN-5950, the frequency mixer output
End is connected with HFCN-10 input terminal, and the HFCN-10 output end is connected with LFCN-5950 input terminal；
The mixer input phase of the wideband modulator output end of the wide-band modulation unit and the mixing and filtering unit
Even, the first amplifier out of the second local oscillator unit is connected with the mixer input of the mixing and filtering unit.
Further, the gain control unit includes the second amplifier, analog attenuator, the first numerical-control attenuator, the
Two numerical-control attenuators, third numerical-control attenuator, second amplifier out are connect with analog attenuator input terminal, the mould
Quasi- attenuator output end is connect with the first numerical-control attenuator input terminal, and the first numerical-control attenuator output end declines with the second numerical control
Subtract the connection of device input terminal, the second numerical-control attenuator output end is connect with third numerical-control attenuator input terminal；
The LFCN-5950 output end of the mixing and filtering unit and the second amplifier in of gain control unit connect
It connects.
Further, the filtering control unit selects a switch, 10-700MHz filter, 700- including the one or four
A switch is selected in 1700MHz filter, 1700-3300MHz filter, 3300-6000MHz filter and the two or four, and described first
Four select an output switching terminal respectively with 10-700MHz filter, 700-1700MHz filter, 1700-3300MHz filter,
The input terminal of 3300-6000MHz filter connects, the 10-700MHz filter, 700-1700MHz filter, 1700-
3300MHz filter, 3300-6000MHz filter output end select a switch input terminal to connect with the two or four respectively；
The output end of third numerical-control attenuator in the gain control unit and first in the filtering control unit
Four select a switch input terminal to connect.
Further, the matching output unit includes third fixed attenuation module and output module, and the third is fixed
The output end of attenuation module and the input terminal of output module connect；
An output switching terminal is selected in the two or four of the filtering control unit, with the third fixed attenuation mould for matching output unit
The connection of block input terminal.
The beneficial effect of the utility model compared with prior art：A kind of vector based on chip provided by the utility model
Signal generation apparatus is filtered by the different frequency of control chip mixing output using frequency-division section by using phase-locked loop chip
Scheme has effectively filtered out harmonic wave and spuious, has improved and mutually make an uproar；Due to using chip solution while guaranteeing test index,
It is greatly reduced volume, convenient for cascade and future 5G Masive MIMO test.
Detailed description of the invention
Fig. 1 is the schematic diagram of the vector signal generation device provided in an embodiment of the present invention based on chip；
Fig. 2 is the clock control of the vector signal generation device provided in an embodiment of the present invention based on chip；
Fig. 3 is the principle of the first local oscillator unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Figure；
Fig. 4 is the principle of the second local oscillator unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram；
Fig. 5 is the principle of the wide-band modulation unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram；
Fig. 6 is the principle of the mixing and filtering unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram；
Fig. 7 is the principle of the gain control unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram；
Fig. 8 is the principle of the filtering control unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram；
Fig. 9 is the principle of the matching output unit of the vector signal generation device provided in an embodiment of the present invention based on chip
Block diagram.
Specific embodiment
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, below in conjunction with attached drawing and implementation
Example, the present invention will be further described in detail.It should be appreciated that specific embodiment described herein is only used to explain
The utility model is not used to limit the utility model.
It should be noted that it can be directly another when element is referred to as " being fixed on " or " being set to " another element
On one element or it may be simultaneously present centering elements.When an element is known as " being connected to " another element, it can
To be directly to another element or may be simultaneously present centering elements.
It is only each other relatively it should also be noted that, the positional terms such as left and right, upper and lower in the utility model embodiment
Concept or be reference with the normal operating condition of product, and should not be regarded as restrictive.
As shown in Figure 1, be a kind of vector signal generation device based on chip of the specific embodiment of the invention,
The generating device includes clock control cell 1, FPGA reference clock 2, the first local oscillator unit 3, the second local oscillator list
Member 4, wide-band modulation unit 5, mixing and filtering unit 6, gain control unit 7, filtering control unit 8 and matching output unit 9, institute
State the output end input with FPGA reference clock 2, the first local oscillator unit 3, the second local oscillator unit 4 respectively of clock control cell 1
End connection, the output end of the first local oscillator unit 3 are connect with the input terminal of wide-band modulation unit 5, the wide-band modulation unit
5 output end is connected with the input terminal of mixing and filtering unit 6, the output end and gain control unit 7 of the mixing and filtering unit 6
Input terminal be connected, the output end of the gain control unit 7 is connected with the input terminal of filtering control unit 8, and the filtering is controlled
The output end of unit 8 processed is connected with the input terminal of matching output unit 9.
As shown in Fig. 2, specifically, the clock control cell 1 include TCXO11 and one point of three power splitter 12, it is described
The clock of the output end output 100MHz of TCXO11 provides clock by one point of three power splitter 12 for FPGA11, and is first
Shake unit 3, the offer reference of the second local oscillator unit 4.
As shown in figure 3, specifically, the first local oscillator unit 3 is solid including the first phaselocked loop LMX2592 chip 31, first
Determine attenuation module 32, the second fixed attenuation module 34, LFCN-3800, HFCN-3800, LFCN-5850, HFCN-600 and two choosings
One switch 33, the output end of the first phaselocked loop LMX2592 chip 31 with respectively with the first fixed attenuation module 32, second
The input terminal of fixed attenuation module 34 connects, the output end of the first fixed attenuation module 32 and the input terminal of LFCN-3800
It is connected, the LFCN-3800 output end is connected with HFCN-3800 input terminal；
The output end of the second fixed attenuation module 34 is connected with LFCN-5850 input terminal, and the LFCN-5850 is defeated
Outlet is connected with HFCN-600HE input terminal；
The output end of described HFCN-3800, HFCN-600 are connected with either-or switch 33 respectively；
The locking phase of the output end of one point of three power splitter 12 in the clock control cell 1 and the first local oscillator unit 3
31 input terminal of ring LMX2592 chip is connected.In first local oscillator unit 3, phase-locked loop chip LMX2592 chip 31 generates two-way letter
Number, 3.5GHz output end is connected through overdamping matching with low-pass filter LFCN3800 input terminal all the way, LFCN3800 output end
It is connected with HFCN3800 input terminal；1-6GHz output end is through overdamping matching and low-pass filter LFCN5850 input terminal phase all the way
Even, LFCN5850 output end is connected with HFCN650 input terminal.The purpose for controlling LMX2592 output two paths of signals is to reduce
The spuious and harmonic wave of carrier signal improves modulated signal quality.
As shown in figure 4, specifically, so the second local oscillator unit 4 includes the second phaselocked loop LMX2592 chip 41, T-type decaying
Module 42, LFCN-6700, HFCN-4400, X-type attenuation module 43 and the first amplifier 44, the phaselocked loop LMX2592 chip
41 output ends are connect with 42 input terminal of T-type attenuation module, and 42 output end of T-type attenuation module and LFCN-6700 input terminal connect
It connects, the LFCN-6700 output end is connect with HFCN-4400 input terminal, the HFCN-4400 output end and X type decay mode
43 input terminal of block is connected, and 43 output end of X-type attenuation module is connected with 44 input terminal of the first amplifier, the clock control list
The output end of one point of three power splitter 12 in member 1 and the second phaselocked loop LMX2592 chip 41 of the second local oscillator unit 4 input
End is connected.In second local oscillator unit 4 phase-locked loop chip LMX2592 chip 41 export 4-6.5GHz signal by 3dB decay with it is low
Bandpass filter LFCN6700 is connected, the input terminal phase of low-pass filter LFCN6700 output end and high-pass filter HFCN4400
Even, it is connected using 3dB decaying matching with the input terminal of 20dB amplifier, generates the local oscillation signal of 4-4.5GHz for being mixed.
As shown in figure 5, specifically, the wide-band modulation unit 5 includes third fixed attenuation module 51, baseband signal generation
Module 52 and wideband modulator 53,51 output end of third fixed attenuation module are connected with 53 input terminal of wideband modulator, institute
It states 52 output end of baseband signal generation module to connect with 53 input terminal of wideband modulator, the alternative of the first local oscillator unit 3
The output end of switch 33 is connected with 51 input terminal of third fixed attenuation module of wide-band modulation unit 5.In wide-band modulation unit 5,
The output end of fixed 3dB attenuator is connected with 53 input terminal of wideband modulator, the simulation I/Q data of baseband signal generation module 52
Output end is connected with 53 input terminal of wideband modulator.
As shown in fig. 6, specifically, the mixing and filtering unit 6 includes frequency mixer 61, HFCN-10 and LFCN-5950, institute
It states 61 output end of frequency mixer to be connected with HFCN-10 input terminal, the HFCN-10 output end is connected with LFCN-5950 input terminal；
53 output end of wideband modulator and the frequency mixer 61 of the mixing and filtering unit 6 of the wide-band modulation unit 5 are defeated
Enter end to be connected, 44 output end of the first amplifier and the frequency mixer 61 of the mixing and filtering unit 6 of the second local oscillator unit 4 are defeated
Enter end to be connected.The output end that end generates the intermediate-freuqncy signal of 10MHz-1GHz is mixed by frequency mixer 61 in mixing and filtering unit 6
It is connected with the input terminal of high-pass filter HFCN10, the input terminal phase of the output end and low-pass filter LFCN5950 of HFCN10
Even.
If shown in 7, specifically, the gain control unit 7 includes the second amplifier 71, analog attenuator 72, first
Numerical-control attenuator 73, the second numerical-control attenuator 74, third numerical-control attenuator 75,71 output end of the second amplifier decline with simulation
Subtracting the connection of 72 input terminal of device, 72 output end of analog attenuator is connect with 73 input terminal of the first numerical-control attenuator, and described first
73 output end of numerical-control attenuator is connect with 74 input terminal of the second numerical-control attenuator, 74 output end of the second numerical-control attenuator and
The connection of three numerical-control attenuators, 75 input terminal；
The LFCN-5950 output end of the mixing and filtering unit 6 and the second amplifier in 71 of gain control unit 7
Connection.The output end of 20dB amplifier in gain control unit 6 is connected with the input terminal of analog attenuator 72, analog attenuation
The output end of device 72 is connected with the input terminal of three-level digital pad PE43704, and gain control range is +20 ----90dB.
As shown in figure 8, specifically, the filtering control unit 8 selects a switch 81,10-700MHz filtering including the one or four
Device 82,700-1700MHz filter 83,1700-3300MHz filter 84,3300-6000MHz filter 85 and the two or four select
One switch 86, the described 1st select 81 output end of a switch respectively with 10-700MHz filter 82,700-1700MHz filter
83, the input terminal connection of 1700-3300MHz filter 84,3300-6000MHz filter 85, the 10-700MHz filter
82, the output end difference of 700-1700MHz filter 83,1700-3300MHz filter 84,3300-6000MHz filter 85
86 input terminal of a switch is selected to connect with the two or four；
In the output end of third numerical-control attenuator 75 in the gain control unit 7 and the filtering control unit 8
One or four selects 81 input terminal of a switch to connect.Four in filtering control unit 8 select 81 output end of a switch respectively with 10-
The filter input end of 700MHz, 700-1700MHz, 1700-3300MHz and 3300-6000MHz are connected, 10-700MHz,
The filter output of 700-1700MHz, 1700-3300MHz and 3300-6000MHz and another four select a switch 81 input
End is connected, to realize to the harmonic wave of different frequency range, spuious effectively filter out.
As shown in figure 9, specifically, the matching output unit 9 include third fixed attenuation module 91 and output module 92,
The output end of the third fixed attenuation module 91 is connect with the input terminal of output module 92；
86 output end of a switch is selected in the two or four of the filtering control unit 8, declines with the third fixation for matching output unit 9
Subtract the connection of 91 input terminal of module.The output end of 3dB attenuator in matching output unit 9 is connected with radio frequency output port, adds
The purpose of attenuator of fixed 3dB decaying is so that it is met standing wave less than 1.5 in order to control standing wave.
It is provided by the utility model it is a kind of based on the vector signal generation device of chip by using phase-locked loop chip, pass through
The different frequency for controlling chip mixing output has been effectively filtered out harmonic wave and spuious, has been improved phase using frequency-division section filters solutions
It makes an uproar；Due to using chip solution while guaranteeing test index, it is greatly reduced volume, convenient for cascade and future 5G
Masive MIMO test.
The above is only the preferred embodiment of the utility model only, is not intended to limit the utility model, all at this
Made any modifications, equivalent replacements, and improvements etc., should be included in the utility model within the spirit and principle of utility model
Protection scope within.
Claims (9)
1. a kind of vector signal generation device based on chip, it is characterised in that：The generating device include clock control cell,
FPGA reference clock, the first local oscillator unit, the second local oscillator unit, wide-band modulation unit, mixing and filtering unit, gain control are single
Member, filtering control unit and matching output unit, the output end of the clock control cell respectively with FPGA reference clock, first
The input terminal connection of local oscillator unit, the second local oscillator unit, the output end of the first local oscillator unit are defeated with wide-band modulation unit
Enter end connection, the output end of the wide-band modulation unit is connected with the input terminal of mixing and filtering unit, the mixing and filtering unit
Output end be connected with the input terminal of gain control unit, the output end of the gain control unit and filtering control unit it is defeated
Enter end to be connected, the output end of the filtering control unit is connected with the input terminal of matching output unit.
2. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The clock control list
Member includes TCXO and one point of three power splitter.
3. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The first local oscillator list
Member includes the first phaselocked loop LMX2592 chip, the first fixed attenuation module, the second fixed attenuation module, LFCN-3800, HFCN-
3800, LFCN-5850, HFCN-600 and either-or switch SP2TPE42422, the first phaselocked loop LMX2592 chip it is defeated
Outlet is connect with the input terminal of the first fixed attenuation module, the second fixed attenuation module respectively, the first fixed attenuation module
Output end be connected with the input terminal of LFCN-3800, the LFCN-3800 output end is connected with HFCN-3800 input terminal；
The output end of the second fixed attenuation module is connected with LFCN-5850 input terminal, the LFCN-5850 output end with
HFCN-600HE input terminal is connected；
The output end of described HFCN-3800, HFCN-600 are connected with either-or switch SP2TPE42422 respectively；
The phaselocked loop LMX2592 of the output end of one point of three power splitter in the clock control cell and the first local oscillator unit
Chip input terminal is connected.
4. the vector signal generation device according to claim 1 based on chip, it is characterised in that：So the second local oscillator list
Member includes the second phaselocked loop LMX2592 chip, T-type attenuation module, LFCN-6700, HFCN-4400, X-type attenuation module and first
Amplifier, the phaselocked loop LMX2592 chip output are connect with T-type attenuation module input terminal, the T-type attenuation module output
End connect the LFCN-6700 output end with LFCN-6700 input terminal and connect with HFCN-4400 input terminal, the HFCN-4400
Output end is connected with X-type attenuation module input terminal, and the X-type attenuation module output end is connected with the first amplifier in, institute
State the output end of one point of three power splitter in clock control cell and the second phaselocked loop LMX2592 core of the second local oscillator unit
Piece input terminal is connected.
5. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The wide-band modulation list
Member includes third fixed attenuation module, baseband signal generation module and wideband modulator, the third fixed attenuation module output
End is connected with wideband modulator input terminal, and the baseband signal generation module output end is connect with wideband modulator input terminal, institute
State the output end of the SP2TTPE42422 of the first local oscillator unit and the first fixed attenuation module input phase of wide-band modulation unit
Even.
6. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The mixing and filtering list
Member includes frequency mixer, HFCN-10 and LFCN-5950, and the mixer output is connected with HFCN-10 input terminal, the HFCN-
10 output ends are connected with LFCN-5950 input terminal；
The wideband modulator output end of the wide-band modulation unit is connected with the mixer input of the mixing and filtering unit, institute
The first amplifier out for stating the second local oscillator unit is connected with the mixer input of the mixing and filtering unit.
7. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The gain control is single
Member includes the second amplifier, analog attenuator, the first numerical-control attenuator, the second numerical-control attenuator, third numerical-control attenuator, described
Second amplifier out is connect with analog attenuator input terminal, and the analog attenuator output end and the first numerical-control attenuator are defeated
Enter end connection, the first numerical-control attenuator output end is connect with the second numerical-control attenuator input terminal, second numerical control attenuation
Device output end is connect with third numerical-control attenuator input terminal；
The LFCN-5950 output end of the mixing and filtering unit and the second amplifier in of gain control unit connect.
8. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The filtering control is single
Member include the one or four select a switch, 10-700MHz filter, 700-1700MHz filter, 1700-3300MHz filter,
3300-6000MHz filter and the two or four selects a switch, and the described 1st selects an output switching terminal to filter respectively with 10-700MHz
The input terminal connection of wave device, 700-1700MHz filter, 1700-3300MHz filter, 3300-6000MHz filter, it is described
The output of 10-700MHz filter, 700-1700MHz filter, 1700-3300MHz filter, 3300-6000MHz filter
A switch input terminal is selected to connect with the two or four respectively in end；
The output end of third numerical-control attenuator in the gain control unit and the one or four choosing in the filtering control unit
The connection of one switch input terminal.
9. the vector signal generation device according to claim 1 based on chip, it is characterised in that：The matching output is single
Member includes third fixed attenuation module and output module, the input of the output end and output module of the third fixed attenuation module
End connection；
An output switching terminal is selected in the two or four of the filtering control unit, defeated with the third fixed attenuation module for matching output unit
Enter end connection.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201721722868.8U CN208128257U (en) | 2017-12-12 | 2017-12-12 | A kind of vector signal generation device based on chip |
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| CN201721722868.8U CN208128257U (en) | 2017-12-12 | 2017-12-12 | A kind of vector signal generation device based on chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110708126A (en) * | 2019-10-30 | 2020-01-17 | 中电科仪器仪表有限公司 | Broadband integrated vector signal modulation device and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110708126A (en) * | 2019-10-30 | 2020-01-17 | 中电科仪器仪表有限公司 | Broadband integrated vector signal modulation device and method |
| CN110708126B (en) * | 2019-10-30 | 2021-07-06 | 中电科思仪科技股份有限公司 | Broadband integrated vector signal modulation device and method |
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Address after: Block C, No. 7, Lane 205, Gaoji Road, Songjiang District, Shanghai, 201601 Patentee after: Chuangyuan Xinke (Shanghai) Technology Co.,Ltd. Address before: 200000 building 6, No. 351, siban Road, Sijing Town, Songjiang District, Shanghai Patentee before: TRANSCOM INSTRUMENTS Co.,Ltd. |
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