CN208128230U - radio frequency transmission chip - Google Patents

radio frequency transmission chip Download PDF

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Publication number
CN208128230U
CN208128230U CN201820227687.6U CN201820227687U CN208128230U CN 208128230 U CN208128230 U CN 208128230U CN 201820227687 U CN201820227687 U CN 201820227687U CN 208128230 U CN208128230 U CN 208128230U
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China
Prior art keywords
module
radio frequency
data
frequency transmission
transmission chip
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CN201820227687.6U
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Chinese (zh)
Inventor
黄建华
赵鹏
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China Southern Power Grid Industry Investment Group Co., Ltd
Beijing Smartchip Microelectronics Technology Co Ltd
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Beijing Smartchip Microelectronics Technology Co Ltd
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Priority to CN201820227687.6U priority Critical patent/CN208128230U/en
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Abstract

This application involves electronic communication field, spy is standby to be related to a kind of radio frequency transmission chip.The radio frequency transmission chip includes:Transmitting module, rectification module, frequency-variable module, control module, memory module and data coding module.The transmitting module, the rectification module, the control module, the memory module are sequentially connected electrically.The frequency-variable module is connected electrically between the transmitting module and the control module.The data coding module is electrically connected with the transmitting module, the control module and the memory module respectively.The radio frequency transmission chip provided by the present application does not change operating rate, and does not account for chip circuit especially more.The radio frequency transmission chip can provide a kind of facilitate identification, different from the output of general radio frequency, asymmetrical coding mode.The protective capacities that the radio frequency transmission chip solves chip itself is weak, the high technical problem of the security risk of chip.

Description

Radio frequency transmission chip
Technical field
This application involves electronic communication fields, more particularly to a kind of radio frequency transmission chip.
Background technique
Traditional radio frequency transmission chip is encrypted using the method for logic encryption.Traditional logic encryption chip itself Protective capacities is very weak, and most of decryption company can easily crack.Although intelligent card chip platform safety and stability It is higher, but cost is also very high, and needs for encryption data to be put into safety chip and run.But this method is to will protect Data when being verified, need to be put into program in program and data memory module in plain text, will cause huge security risk.
Utility model content
Based on this, it is necessary to, the safety of intelligent card chip weak for the protective capacities of traditional logic encryption chip itself The high problem of hidden danger provides a kind of radio frequency transmission chip.
A kind of radio frequency transmission chip, including:
Transmitting module;
Rectification module, the input terminal of the rectification module are electrically connected with the output end of the transmitting module;
Control module, the input terminal of the control module are electrically connected with the output end of the rectification module;
Frequency-variable module, the input terminal of the frequency-variable module are electrically connected with the output end of the transmitting module, the frequency conversion mould The output end of block is electrically connected with the input terminal of the control module;
Memory module, the input terminal of the memory module are electrically connected with the output end of the control module, the control mould Bidirectional data transfers are realized between block and the memory module;And
Data coding module, the data coding module respectively with the transmitting module, the control module and described deposit Store up module electrical connection.
In one embodiment, the data coding module includes:Data selector;
The data selector includes the first input end of clock, second clock input terminal, data input pin and data output End;
Different clock signals is inputted by first input end of clock and the second clock input terminal, is realized to original Data after coding are completed the transmission of data by the coding of beginning data by the data output end.
In one embodiment, the memory module includes:Fuse unit, and the fusing unit is with blown state and non- Blown state;
When the fusing unit is in blown state, data coding module described in the fusing unit triggers is to the transmitting Module transfer indicates the symbol of " 0 ";
When the fusing unit is in non-blown state, data coding module described in the fusing unit triggers is to the hair Penetrating module transfer indicates the symbol of " 1 ".
In one embodiment, the fusing unit includes:4th resistance, the input terminal of the 4th resistance are electrically connected high Level;
Fuse, the input terminal of the fuse are electrically connected with the output end of the 4th resistance, the output termination of the fuse Ground;And
Logic inverter, the input terminal of the logic inverter are electrically connected with the output end of the 4th resistance, the logic NOT Output end of the output end of door as the fusing unit.
In one embodiment, the fusing unit is made to be in blown state in such a way that the molten disconnected metal of laser is online.
In one embodiment, the data structure stored in the radio frequency transmission chip includes:
13 initial codes;
88 numeric data codes;
11 row odd-parity check codes, in a row, each odd-numbered line includes a cross to every 4 data code groups Row odd-parity check code;
11 row even parity check codes, each even number line include a row even parity check code;
2 file odd-parity check codes, for every 22 data code groups at a column, each odd column includes one described vertical Column odd-parity check code;
2 file even parity check codes, each even column include a file even parity check code;
1 end code.
In one embodiment, the waveform of the radio frequency transmission chip output is asymmetric waveform, the asymmetric waveform The middle symbol for representing " 0 " and the symbol of representative " 1 " are asymmetrical.
In one embodiment, in the waveform of the radio frequency transmission chip output, it is equal that each symbol is modulated to the period 4 level, the symbol for representing " 0 " has primary jump among period equal 4 level, represents the symbol of " 1 " in week Have in phase equal 4 level and jumps three times.
In one embodiment, the primary jump is jump from high to low.
In one embodiment, the first time jump in the jump three times is jump from low to high.
The radio frequency transmission chip provided by the utility model includes:Transmitting module, rectification module, frequency-variable module, control Module, memory module and data coding module.The transmitting module, the rectification module, the control module, the storage mould Block is sequentially connected electrically.The frequency-variable module is connected electrically between the transmitting module and the control module.The data coding Module is electrically connected with the transmitting module, the control module and the memory module respectively.The radio frequency provided by the present application Transmission chip does not change operating rate, and does not account for chip circuit especially more.The radio frequency transmission chip can provide a kind of convenience Identification, different from the output of general radio frequency, asymmetrical coding mode.The radio frequency transmission chip solves chip itself Protective capacities is weak, the high technical problem of the security risk of chip.
Detailed description of the invention
Fig. 1 is the radio frequency transmission chip circuit structure block diagram in one embodiment;
Fig. 2 is the structural schematic diagram of the data selector in one embodiment;
Fig. 3 is the circuit diagram of the fusing unit in one embodiment;
Fig. 4 is the circuit diagram of the fusing unit in one embodiment;
Fig. 5 is the structure chart of the fusing unit in one embodiment;
Fig. 6 is the data structure diagram of the radio frequency transmission chip in one embodiment;
Fig. 7 is the radio frequency transmission chip output waveform diagram in one embodiment.
Drawing reference numeral explanation:
Radio frequency transmission chip 10
Transmitting module 100
Rectification module 200
Frequency-variable module 300
Control module 400
Memory module 500
Fuse unit 510
4th resistance 511
Fuse 512
Logic inverter 513
First layer conductor 514
Second layer conductor 515
Data coding module 600
Data selector 610
Specific embodiment
It is right with reference to the accompanying drawings and embodiments in order to which the objects, technical solutions and advantages of the application are more clearly understood The radio frequency transmission chip of the application is further described.It should be appreciated that specific embodiment described herein is only to explain The application is not used to limit the application.
Referring to Fig. 1, providing a kind of radio frequency transmission chip 10.The radio frequency transmission chip 10 includes:Transmitting module 100, Rectification module 200, frequency-variable module 300, control module 400, memory module 500 and data coding module 600.
The transmitting module 100, for launching the data after the radio frequency transmission chip 10 coding.One In a embodiment, external LC antiresonant circuit can be connected in the input terminal of the transmitting module 100.The external LC is in parallel Resonance circuit is for generating RF magnetic field.The external LC antiresonant circuit may include coil and capacitor, in coil COIL1 Alternating voltage can be generated with the both ends of COIL2.The energy of the radio frequency transmission chip 10 and frequency can from it is described outer Portion's LC antiresonant circuit.
Specifically, the transmitting module 100 can be a field effect transistor.The transmitting module 100 can be used and be opened The mode that crucial control becomes (OOK) emits data.One input terminal of the transmitting module 100 is the data coding module 600 output end will store and launch by the data of specific coding.
The input terminal of the rectification module 200 is electrically connected with the output end of the transmitting module 100.The rectification module 200 are used for the full-wave rectification of the radio frequency transmission chip 10.The rectification module 200 may include voltage limiting circuit and rectification Circuit.Voltage limiting circuit is responsible for for induced voltage being limited in the range of the radio frequency transmission chip 10 can work normally.Institute The normal working voltage for stating radio frequency transmission chip 10 can be 2V~5V.Voltage limiting circuit avoids the radio frequency transmission chip 10 burn because of excessive external induced voltage.It is appreciated that induced voltage reaches as high as 10V, passed designing the radio frequency It must consider when defeated chip 10.The alternating voltage that rectification circuit is responsible for sense is converted to DC voltage, obtains can allowing institute State the DC voltage of the work of radio frequency transmission chip 10.
The input terminal of the control module 400 is electrically connected with the output end of the rectification module 200.The control module 400 are responsible for the master control work of the radio frequency transmission chip 10.The control module 400 may be implemented to wake up the comparison of code.Specifically For, what the control module 400 can compare the transmission transmitted in the radio frequency transmission chip 10 wakes up code and pre-stored Whether identical wake up code.The control module 400 can control wake-up opportunity.Specifically, could when waking up code and comparing successfully Into awakening phase.Awakening phase will not be entered if wake-up code comparison is unsuccessful.
The input terminal of the frequency-variable module 300 is electrically connected with the output end of the transmitting module 100.The frequency-variable module 300 output end is electrically connected with the input terminal of the control module 400.The frequency-variable module 300 is passed for generating the radio frequency The clock or various frequency dividings that defeated chip 10 works.The frequency-variable module 300 may include clock switching circuit and frequency dividing circuit. The 10 internal work clock of radio frequency transmission chip is square wave.The string wave side of being converted to that clock switching circuit can obtain induction Wave.Frequency dividing circuit then generates the work clock and various frequency dividings of chip modules needs.
The input terminal of the memory module 500 is electrically connected with the output end of the control module 400.The control module Bidirectional data transfers are realized between 400 and the memory module 500.In one embodiment, the memory module 500 has 64 Position read-only memory.In another embodiment, the memory module 500 can have 128 read-only memories.
The data coding module 600 respectively with the transmitting module 100, the control module 400 and the storage mould Block 500 is electrically connected.The data coding module 600 recompiles data.After the data coding module 600 will encode Data export to the transmitting module 100.Asymmetric coding may be implemented in the data coding module 600.The data Coding module 600 provides a kind of facilitate identification, different from the output of general radio frequency, asymmetrical coding mode.
The working principle of the radio frequency transmission chip 10 is as follows, and the function of the radio frequency transmission chip 10 is in parallel by external LC Resonant inducing is triggered.When LC resonance induced magnetic field close to it is described when, the radio frequency transmission chip 10 does not emit data completely. It is only received from induced magnetic field after waking up code, just starts the Internal Code data for constantly emitting the memory module 500 in proper order. As long as but the magnetic field of induction disappears, and must reawake.
The workflow of the radio frequency transmission chip 10 can be divided into two stages.First stage waits.The radio frequency passes Defeated chip 10 waits magnetic field close, obtains the power supply and clock of work.The radio frequency transmission is synchronized by the control module 400 The clock pulses of chip 10.The comparison foundation for waking up code is obtained by the memory module 500.The entire radio frequency transmission core later Piece 10 is failure to actuate completely, and lasting wait is waken up.Second stage, transmitting.The radio frequency transmission chip 10 starts to emit data journey Sequence.Data program is mainly issued by the control module 400 and is ordered.The control module 400 orders the memory module 500 to be followed Sequence output data.The data that the memory module 500 exports are encoded via the data coding module 600.Data after coding Emit again via the transmitting module 100.Until the induced magnetic field disappearance of the radio frequency transmission chip 10, can just terminate to emit number According to program.
The radio frequency transmission chip 10 can be applied to the transmission of underground signal.For example it can be underground communication network and ground The communication between communication or underground difference website between face.The radio frequency transmission chip 10 meets ground using design Lower bad environments are long using the time.In addition, the safety for also having fully considered data using design of the radio frequency transmission chip 10 And it designs.The radio frequency transmission chip 10 provided by the present application does not change operating rate, and does not account for chip circuit especially more.It is described Radio frequency transmission chip 10 can provide a kind of facilitate identification, different from the output of general radio frequency, asymmetrical coding mode.
Referring to Fig. 2, in one embodiment, the data coding module 600 includes:Data selector 610.The number It include the first input end of clock, second clock input terminal, data input pin and data output end according to selector 610.By described First input end of clock and the second clock input terminal input different clock signals, realize the coding to initial data, will Data after coding complete the transmission of data by the data output end.
Traditional radio frequency transmission chip is all using Manchester's code.Specifically constituted by XOR gate (XOR) is equivalent.It is former Stock data are ROM_DATA, after synchronous addition CLK_1 clock signal, that is, generate the output MOD_ with Manchester code characteristic 1.Cardinal principle using Manchester's code is that the characteristic of XOR gate is utilized:When two signal voltage levels of input are identical When, XOR gate output voltage level GND (0V);When two signal voltage level differences of input, XOR gate output output electricity It presses level VDD (5V).Such coding mode easily recognizes and route is simple, and application is also very universal, for storage data more It is to be easy to crack and read.
A kind of asymmetrical coding mode is used in the application.The asymmetrical coding mode is by the data selector 610 (MUX) equivalent implementations.As shown in figure 3, initial data is ROM_DATA, CLK_1 clock signal is added and CLK_2 clock is believed It number modulates.The data selector 610 is that can produce to export MOD_2 with the coding of the asymmetrical coding mode.This Shen Please described in asymmetrical coding mode the characteristic of the data selector 610 is mainly utilized:As initial data ROM_DATA Voltage quasi position when being VDD, the data selector 610 just exports the signal of CLK_1;When the voltage of initial data ROM_DATA When level is GND, the data selector 610 just exports the signal of CLK_2.The signal of signal and CLK_2 due to CLK_1 can To be arbitrarily arranged, the coding that the data selector 610 described in this way generates is exactly asymmetrical, can have its uniqueness. The data encoding that the data selector 610 generates is just different from the coding of general radio frequency chip transmission.
Fig. 3, Fig. 4 and Fig. 5 are please referred to, in one embodiment, the memory module 500 includes:Fuse unit 510, institute Stating fusing unit 510 has blown state and non-blown state.When the fusing unit 510 is in blown state, the fusing Unit 510 triggers the data coding module 600 and transmits the symbol for indicating " 0 " to the transmitting module 100.When the fusing is single Member 510 is in non-blown state, and the fusing unit 510 triggers the data coding module 600 and passes to the transmitting module 100 The defeated symbol for indicating " 1 ".
In one embodiment, the fusing unit 510 includes:4th resistance 511, fuse 512 and logic inverter 513. The input terminal of 4th resistance 511 is electrically connected high level.The input terminal of the fuse 512 is defeated with the 4th resistance 511 Outlet electrical connection, the output end ground connection of the fuse 512.The input terminal of the logic inverter 513 and the 4th resistance 511 Output end electrical connection, output end of the output end of the logic inverter 513 as the fusing unit 510.The letter of laser blown It is number fainter, the logic inverter 513 is set to increase signal strength.
Referring to Fig. 3, providing the fusing unit 510 without laser processing.Because the fuse 512 is zero Europe The resistance of nurse.After the fuse 512 is divided with top the 4th resistance 511, at this time in the input of the logic inverter 513 The voltage quasi position at end is exactly low level GND.Again because the logic inverter 513 circuit theory, the logic inverter 513 it is defeated Outlet will generate a standard high level vdd voltage level logic 1.
Referring to Fig. 4, providing the fusing unit 510 by laser processing.Because the fuse 512 is cut by laser Break.The fuse 512 with after the electric resistance partial pressure of top, at this time the voltage quasi position of the input terminal of the logic inverter 513 just It is high level VDD.Again because the circuit theory of the logic inverter 513, the output end of the logic inverter 513 will generate one A standard low level GND voltage level logical zero.
In the present embodiment, the programming of the memory module 500 uses the side of the molten disconnected metal online (Laser Fuse) of laser Formula.As shown in figure 5, the structural schematic diagram of laser fuse.There are 5 fuses 512 in Fig. 5.The fuse 512 respectively with 5 groups It is electrically connected between first layer conductor 514.The both ends of first layer conductor 514 described in each group are electrically connected again described in 5 groups Second layer conductor 515., it is apparent that rightmost two fuses 512 are, remaining left sides molten disconnected by laser in Fig. 5 The fuse of side three is then molten disconnected without laser.The online molten disconnected metal of laser is directly existed using physics mode High thermal energy is generated on the fuse 512.High thermal energy can be thoroughly molten disconnected by the fuse, does not have and individually is not easy to burn Break or seemingly break the non-disconnected fuse 512, causes the situation of data repeatedly.The online mode of the molten disconnected metal of laser Not the problem of not having the flash data storage time limit.The online mode of the molten disconnected metal of laser is a kind of non-response programming side Formula, while also ensuring the durability that data save.In the present embodiment, the data in the radio frequency transmission chip 10 can only write one Secondary, the data in the radio frequency transmission chip 10 will not be changed or be damaged.
In one embodiment, the fusing unit 510 is made to be in fusing shape in such a way that the molten disconnected metal of laser is online State.Specifically, the memory capacity in the memory module 500 can be selected according to the actual needs.The fusing unit The state of fuse needs to be designed and store according to specific programming in 510.
Referring to Fig. 6, in one embodiment, the data structure stored in the radio frequency transmission chip 10 includes:13 Initial code, 88 numeric data codes, 11 row odd-parity check codes, 11 row even parity check codes, 2 file odd-parity verifications Code, 2 file even parity check codes and 1 end code.
In a row, each odd-numbered line includes a row odd-parity check code to every 4 data code groups.Each idol Several rows include a row even parity check code.For every 22 data code groups at a column, each odd column includes one The file odd-parity check code.Each even column includes a file even parity check code.It is appreciated that the radio frequency The data structure stored in transmission chip 10 can be the more kinds of forms of others listed in the application.
In one embodiment, the initial code can be " 1 " of 13 BITS.22 BITS are as row error detecting code (P0-P21).The error detecting code (PC0-PC3) of 4 files.88 BITS are data code (D00-DL3), can access data.1 BITS is as end code.It can be using 1 " 0 " as the end code.It is above 128 total.88 BITS's as shown in Figure 7 Data code (D00-DL3) can indicate 22 heuristicimal codes.Every 4 data codes form a heuristicimal code.Such as: D00D01D02D03 can indicate one 16 from 0000-1111 (i.e. 0,1,2,3,4,5,6,7,8,9, A, B, C, D, E, F) Ary codes.And D10D11D12D13 another one heuristicimal code.
Referring to Fig. 7, in one embodiment, the waveform that the radio frequency transmission chip 10 exports is asymmetric waveform, institute It is asymmetrical for stating and representing the symbol of " 0 " and the symbol of representative " 1 " in asymmetric waveform.Specifically, unsymmetric form can be Multiplicity.For example the symbol that " 0 " is represented in the asymmetric waveform can be set with 3 subcycles, the code of setting representative " 1 " Member has 6 subcycles.As long as to represent the symbol of " 0 " and the symbol of representative " 1 " in the asymmetric waveform to be asymmetric , other set-up modes are all possible.
In one embodiment, in the waveform that the radio frequency transmission chip 10 exports, each symbol is modulated to period phase Deng 4 level, the symbol for representing " 0 " has primary jump among period equal 4 level, and the symbol for representing " 1 " exists Have in period equal 4 level and jumps three times.It is described it is primary jump and it is described three times jump can be from high to low or It is from low to high.
In one embodiment, the primary jump is jump from high to low.
In one embodiment, the primary jump is jump from high to low.First time in the jump three times jumps Become jump from low to high.
In another embodiment, the primary jump is jump from low to high.First time in the jump three times Jump is jump from high to low.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited In contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, the description thereof is more specific and detailed, but simultaneously The limitation to claim therefore cannot be interpreted as.It should be pointed out that coming for those of ordinary skill in the art It says, without departing from the concept of this application, various modifications and improvements can be made, these belong to the protection of the application Range.Therefore, the scope of protection shall be subject to the appended claims for the application patent.

Claims (10)

1. a kind of radio frequency transmission chip, which is characterized in that including:
Transmitting module (100);
The input terminal of rectification module (200), the rectification module (200) is electrically connected with the output end of the transmitting module (100);
The input terminal of control module (400), the control module (400) is electrically connected with the output end of the rectification module (200);
The input terminal of frequency-variable module (300), the frequency-variable module (300) is electrically connected with the output end of the transmitting module (100), The output end of the frequency-variable module (300) is electrically connected with the input terminal of the control module (400);
The input terminal of memory module (500), the memory module (500) is electrically connected with the output end of the control module (400), Bidirectional data transfers are realized between the control module (400) and the memory module (500);And
Data coding module (600), the data coding module (600) respectively with the transmitting module (100), the control mould Block (400) and the memory module (500) electrical connection.
2. radio frequency transmission chip as described in claim 1, which is characterized in that the data coding module (600) includes:Data Selector (610);
The data selector (610) includes the first input end of clock, second clock input terminal, data input pin and data output End;
Different clock signals is inputted by first input end of clock and the second clock input terminal, is realized to original number According to coding, by the data after coding by the data output end complete data transmission.
3. radio frequency transmission chip as described in claim 1, which is characterized in that the memory module (500) includes:Fuse unit (510), the fusing unit (510) has blown state and non-blown state;
When the fusing unit (510) is in blown state, the fusing unit (510) triggers the data coding module (600) symbol for indicating " 0 " is transmitted to the transmitting module (100);
When the fusing unit (510) is in non-blown state, the fusing unit (510) triggers the data coding module (600) symbol for indicating " 1 " is transmitted to the transmitting module (100).
4. radio frequency transmission chip as claimed in claim 3, which is characterized in that the fusing unit (510) includes:4th resistance (511), the input terminal of the 4th resistance (511) is electrically connected high level;
The input terminal of fuse (512), the fuse (512) is electrically connected with the output end of the 4th resistance (511), the fuse (512) output end ground connection;And
The input terminal of logic inverter (513), the logic inverter (513) is electrically connected with the output end of the 4th resistance (511), Output end of the output end of the logic inverter (513) as fusing unit (510).
5. radio frequency transmission chip as claimed in claim 4, which is characterized in that make institute in such a way that the molten disconnected metal of laser is online It states fusing unit (510) and is in blown state.
6. radio frequency transmission chip as described in claim 1, which is characterized in that the number stored in the radio frequency transmission chip (10) Include according to structure:
13 initial codes;
88 numeric data codes;
11 row odd-parity check codes, in a row, each odd-numbered line includes that the row is odd to every 4 data code groups With bit check code;
11 row even parity check codes, each even number line include a row even parity check code;
2 file odd-parity check codes, for every 22 data code groups at a column, each odd column includes that the file is odd With bit check code;
2 file even parity check codes, each even column include a file even parity check code;
1 end code.
7. radio frequency transmission chip as described in claim 1, which is characterized in that the waveform of radio frequency transmission chip (10) output It is asymmetrical that the symbol of " 0 " and the symbol of representative " 1 " are represented for asymmetric waveform, in the asymmetric waveform.
8. radio frequency transmission chip as claimed in claim 7, which is characterized in that the waveform of radio frequency transmission chip (10) output In, each symbol is modulated to 4 equal level of period, and represent the symbol of " 0 " has among period equal 4 level Primary jump, represents the symbol of " 1 " and has in period equal 4 level and jump three times.
9. radio frequency transmission chip as claimed in claim 8, which is characterized in that the primary jump is jump from high to low.
10. radio frequency transmission chip as claimed in claim 9, which is characterized in that the first time in the jump three times, which jumps, is Jump from low to high.
CN201820227687.6U 2018-02-08 2018-02-08 radio frequency transmission chip Active CN208128230U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108199732A (en) * 2018-02-08 2018-06-22 北京智芯微电子科技有限公司 Radio frequency transmission chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108199732A (en) * 2018-02-08 2018-06-22 北京智芯微电子科技有限公司 Radio frequency transmission chip
CN108199732B (en) * 2018-02-08 2024-01-23 北京智芯微电子科技有限公司 Radio frequency transmission chip

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Effective date of registration: 20191121

Address after: 100192 Beijing, Haidian District West Road, No. 66, Zhongguancun Dongsheng science and Technology Park, building A, building No. 3

Co-patentee after: China Southern Power Grid Industry Investment Group Co., Ltd

Patentee after: BEIJING ZHIXIN MICROELECTRONIC SCIENCE & TECHNOLOGY CO., LTD.

Address before: 100192 Beijing, Haidian District West Road, No. 66, Zhongguancun Dongsheng science and Technology Park, building A, building No. 3

Patentee before: BEIJING ZHIXIN MICROELECTRONIC SCIENCE & TECHNOLOGY CO., LTD.

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