CN208126138U - A kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform - Google Patents

A kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform Download PDF

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Publication number
CN208126138U
CN208126138U CN201721395287.8U CN201721395287U CN208126138U CN 208126138 U CN208126138 U CN 208126138U CN 201721395287 U CN201721395287 U CN 201721395287U CN 208126138 U CN208126138 U CN 208126138U
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control
simulation
chip
unit
interface board
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郝良收
李家羊
岑韬
孙健
张磊
王健
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Rongxin Huike Electric Co.,Ltd.
Tianshengqiao Bureau of Extra High Voltage Power Transmission Co
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Rong \/ Electric Technology LLC
Tianshengqiao Bureau of Extra High Voltage Power Transmission Co
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Abstract

The utility model provides a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform, including valve base controller, analogue unit plate, control and interface board, wave recording device, host computer and Real Time Digital Simulator;Multiple analogue unit plates and control and interface board are mounted in a simulation cabinet with bus card slot form, are interconnected by the core bus in simulation cabinet.The platform is used using fpga chip as the analogue unit board of core, carry out analogue simulation and unit control simultaneously using chip piece, eliminate the unit control chip for being individually used for valve tower unit control, number of chips limitation is not controlled by unit, the parameter and topological structure of flexibly configurable analogue unit solve and compensate for the deficiency on traditional simulation experiment porch to power cell grade failure response and test.

Description

A kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform
Technical field
The utility model relates to power electronics field, in particular to a kind of flexible direct current based on fpga chip platform Transmission system nature imitation experiment device.
Background technique
Flexible HVDC transmission system emulation experiment using with prototype system there is the software and hardware model of same physical to match Digital simulator is closed to be emulated, by performance of the analog machine under true environment, the method for obtaining test result.It is main Method mainly passes through RTLab (Real Time Digital Simulator) or other similar simulation of power electronic system constitutes closed loop test system Simulating, verifying is carried out, test model is built to simulate the various operating conditions of practical power systems and malfunction, tests valve base Can correct reaction be made to the failure of various operating conditions and generation when controller is run at the scene.Since RTLab is emulated Device is only provided with most basic on-off model and bypass functionality for the single power cell simulation model of valve tower, and there is no needles The actual characteristic of the different model sensor for the power unit module voluntarily researched and developed to each producer optimizes, and traditional emulation is flat The valve base controller of platform generally ignores the verifying of peculiar failure responses certain to single power cell, in addition, to be simulated when needing When system scale is very big, simulation valve tower in general need in valve tower to be simulated and the equal amount of composition valve tower Unit control panel and analogue unit plate, since there are many board quantity, analogue system scale can become very big.
Summary of the invention
In order to solve the problems, such as described in background technique, it is straight that the utility model provides a kind of flexibility based on fpga chip platform Transmission system nature imitation experiment device is flowed, which uses using fpga chip as the analogue unit board of core, using chip piece Analogue simulation and unit control are carried out simultaneously, the unit control chip for being individually used for valve tower unit control are eliminated, not by list Member control number of chips limitation, the parameter and topological structure of flexibly configurable analogue unit solve and compensate for traditional simulation reality Test the deficiency on platform to power cell grade failure response and test.In addition the high speed interface of analogue unit has been redesigned With optical fiber interface quantity, the data input/output interface of analogue unit plate and the upper limit of data processing bandwidth are improved, so that One block of analogue unit plate can simulate multiple unit control panels and simulation actual cell, greatly reduced and built mould in emulation experiment The board quantity of quasi- system, makes to have reached good balance between analog system scale and board quantity.
In order to achieve the above object, the utility model is implemented with the following technical solutions:
A kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform, including valve base controller, list First analog board, control and interface board, wave recording device, host computer and Real Time Digital Simulator;Multiple unit simulation plates and control and Interface board is mounted in a simulation cabinet with bus card slot form, is interconnected by the core bus in simulation cabinet.
The valve base controller passes through high speed by ordinary optic fibre connection unit analog board, the control and interface board Optical fiber connects Real Time Digital Simulator and wave recording device, while also connecting host computer by Ethernet.
The unit simulation plate quantity be it is multiple, each unit simulation plate includes a FPGA main control chip and multiple Optical communication interface circuit, FPGA main control chip are connected by I/O pin with multiple optical communication interface circuits, and multiple optical fiber are logical The multiple optical fiber interfaces of communication interface circuit connection, multiple unit simulation plates are connect by multiple optical fiber with valve base controller, Duo Gemo Quasi- cell board and Real Time Digital Simulator are built into the valve tower for flexible HVDC transmission system emulation experiment jointly.
The wave recording device is the recording cabinet with backboard and power supply, includes multiple recording plates in recording cabinet With an interface board, multiple recording plates and an interface board are inserted into the bus card slot of backboard, pass through the back in recording cabinet Plate bus interconnects, and wave recording device is connected by the optical fiber interface on interface board with the control and interface board simulated in cabinet It connects, wave recording device also passes through ether net mode connection recording terminal upper computer.
The CPU that the recording plate includes uses system on chip, and SOC is by the fpga chip and ARM9 that interconnect Device composition is managed, the I/O pin of fpga chip is directly connected with the core bus of recording cabinet.
The control and interface board includes FPGA master chip, optical transceiver module, ethernet interface module, FPGA master chip It is directly connect with the core bus in simulation cabinet by I/O pin, control and interface board pass through core bus and multiple unit moulds Quasi- plate is connected, and is connected by ethernet interface module with host computer, and FPGA master chip also passes through optical transceiver module and connects respectively Connect Real Time Digital Simulator and wave recording device.
The valve base controller architecture is consistent with the valve base controller equal proportion in electric system Practical Project, is used for mould Intend actual valve base controller.
Compared with prior art, the utility model has the beneficial effects that:
1, a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform of the utility model, with Fpga chip is the analogue unit board of core, carries out analogue simulation simultaneously using chip piece and unit controls, eliminate list It is solely used in the unit control chip of valve tower unit control, is not controlled number of chips limitation by unit, flexibly configurable simulation is single The parameter and topological structure of member solve and compensate on traditional simulation experiment porch to power cell grade failure response and test It is insufficient.
2, a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform of the utility model, again The high speed interface and optical fiber interface quantity for devising analogue unit, improve the data input/output interface of analogue unit plate And the upper limit of data processing bandwidth, allow one block of analogue unit plate to simulate multiple unit control panels and simulation is practical single Member has greatly reduced the board quantity for building simulation system in emulation experiment, has made between analog system scale and board quantity Good balance is reached.
3, a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform of the utility model is one Kind simulation of power electronic system, in the design, the malfunction and state of a control of analogue unit and unit control panel can be straight It connected control emulation interface board to be transferred in recording card, and is uploaded in host computer and stored by network interface, managed By above can recorde unit control panel and the faulty and operating status of analogue unit plate in system operation.
Detailed description of the invention
Fig. 1 is that a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform of the utility model is whole Body architecture diagram;
Fig. 2 is a kind of flexible HVDC transmission system nature imitation experiment device tool based on fpga chip platform of the utility model Body structural schematic diagram;
Fig. 3 is the simulation chassis structure chart of the utility model;
Fig. 4 is the unit simulation plate circuit structure diagram of the utility model;
Fig. 5 is the recording chassis structure chart of the utility model;
Fig. 6 is the control and interface board circuit structural schematic diagram of the utility model;
Fig. 7 is the system topology implementation example figure of actually build a analogue system of the utility model;
Fig. 8 is the flexible HVDC transmission system modular multilevel topological structure knot of the simulation in the utility model embodiment Structure schematic diagram.
Specific embodiment
Specific embodiment provided by the utility model is described in detail below in conjunction with attached drawing.
As shown in Figs. 1-2, a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform, including valve Base controller, unit simulation plate, control and interface board, wave recording device, host computer and Real Time Digital Simulator;
As shown in figure 3, multiple unit simulation plates and control and interface board are mounted on an analog machine with bus card slot form In case, interconnected by the core bus in simulation cabinet;
By common high speed fibre connection unit analog board, the control and interface board pass through the valve base controller High speed fibre connects Real Time Digital Simulator and wave recording device, while also connecting host computer by Ethernet.
The unit simulation plate quantity be it is multiple, as shown in figure 4, each unit simulation plate includes a FPGA master control Chip and multiple optical communication interface circuits, FPGA main control chip are connected by I/O pin with multiple optical communication interface circuits, Multiple multiple optical fiber interfaces of optical communication interface circuit connection, multiple unit simulation plates are connected by multiple optical fiber and valve base controller It connects, multiple analogue unit plates and Real Time Digital Simulator are built into the valve for flexible HVDC transmission system emulation experiment jointly Tower.The function of a actual power unit submodule of n can be simulated using the form of software programming using one piece of fpga chip.Mould It is special that quasi- cell board can simulate unit control module and the two-part electronics of element characteristics module and machinery in real power unit Property, to be fitted the practical manifestation of power unit module in real system to greatest extent, and verifying valve base controller is to reality The protection of power cell grade failure and failure response in system.
As shown in figure 5, the wave recording device is the recording cabinet with backboard and power supply, include in recording cabinet Multiple recording plates and an interface board, multiple recording plates and an interface board are inserted into the bus card slot of backboard, pass through recording Core bus in cabinet interconnects, and wave recording device is by optical fiber interface on interface board and the control simulated in cabinet and connects Oralia is connected, and wave recording device also passes through ether net mode connection recording terminal upper computer.Recording system and interface can be to being All units and unit control panel logic are recorded in system, and are stored in host computer.
The CPU that the recording plate includes uses system on chip, and SOC is by the fpga chip and ARM9 that interconnect Device composition is managed, the I/O pin of fpga chip is directly connected with the core bus of recording cabinet.
As shown in fig. 6, the control and interface board includes FPGA master chip, optical transceiver module, ethernet interface module, FPGA master chip directly connect with the core bus in simulation cabinet by I/O pin, control and interface board by core bus and Multiple unit simulation plates are connected, and are connected by ethernet interface module with host computer, and FPGA master chip is also received and dispatched by light Module is separately connected Real Time Digital Simulator and wave recording device.In Fig. 3, control and interface board include control and interface board 1 and control System and interface board 2 wherein control and interface board 1 are interacted with the communication of multiple unit simulation plates, while being also connected with real-timedigital simulation Device and host computer, control and interface board 2 are communicated with wave recording device.On the one hand, control can be with real-time number with interface board Word emulator is communicated, and is summarized and is transmitted the uplink and downlink data of multiple unit emulation modules, on the other hand can pass through ether Net is communicated with host computer, the setting of analogue unit parameter, carries out monitoring and triggering in real time to analogue unit state.
The valve base controller architecture is consistent with the valve base controller equal proportion in electric system Practical Project, is used for mould Intend actual valve base controller.
As shown in fig. 7, can be taken actually to build the system topology embodiment an of analogue system according to the program Build out the valve tower for emulation experiment of topological structure as shown in Figure 8, wherein can be by adjusting unit simulation board quantity Mode freely configures the quantity and topological structure of the power modules SM of simulation, can satisfy any framework, any amount quantity The experimental program of submodule.
The Real Time Digital Simulator, can be using RTDS or RTLab etc., for establishing the mathematical model of valve tower.
The specific failure and parameter of analog and setting are upper by configuring in the analogue unit module of unit simulation intralamellar part Machine is sent in real time, the feedback of the capacitor of the operating status of power cell and the power module modeled on Real Time Digital Simulator Voltage also can transmit in host computer interface and be monitored.
The triggerable specific failure of the unit simulation functions of modules of the unit simulation board fpga chip includes 1) single First water-leak alarm feedback time and fault setting;2) capacitance sensor pressure limit alerts;3) power device driving model is optional, Operating parameter can match;4) 5) draw-out power supply model is optional for the setting of bypass transistors breakdown, and operating parameter can match;6) on draw-out power supply Electric time parameter can match;7) A/D chip model is optional, and parameter can match;8) the settable standard deviation irrelevance of feedback voltage it is adjustable with The mistake fluctuation of machine;9) simulation bypass contactor model is optional, and parameter can match;10) draw-out power supply obtains electric and power loss timing.
The following are various power cell faults to simulate control process:
1) contactor parameter is arranged by host computer, such as main contacts closing time, bounce time, when auxiliary contact feedback response Between, spring, auxiliary contact normally-open normally-close characteristic, or because caused by other reasons malfunction or tripping etc. be configured, simulation is single Member can generate bypass contactor status feedback signal according to the mechanical property of bypass contactor in practice and be sent to LU_1 extremely The units control module bypass contactor status feedback signal interface such as LU_24, to simulate the movement of different model bypass contactor The case where when process and abnormal simulated power unit module bypass contactor driving.
2) according to the setting of host computer, leakage sensor is generated according to the characteristic electron that water-leak alarm detects driving sensor Feedback signal is sent to the units control module water-leak alarm sensor states feedback signal interface such as LU_1 to LU_24, with simulation The case where when power unit module leakage sensor exception.
3) it according to the setting of host computer, transfinites according to capacitive pressure and monitors the characteristic electron generation appearance pressure limit of sensor The capacitive pressure that feedback signal is sent to the units control module such as LU_1 to LU_24 transfinite alarm status feedback signal input connect Mouthful, with simulated power unit module hold pressure limit exception when the case where.
4) by the parameter of host computer setting draw-out power supply, such as the starting voltage of draw-out power supply, output power, after disorderly closedown The continued power time, generate the characteristics such as draw-out power supply abnormal failure according to setting, be sent to unit control module draw-out power supply Abnormal feedback signal interface, the case where with when simulated power unit module draw-out power supply exception.
5) according to the setting of host computer, electric and power loss timing is obtained according to the draw-out power supply of power cell, to control LU_1 extremely The units control module such as LU_24 power loss, obtained with the draw-out power supply of simulated power unit board it is electric, the case where when power loss.
6) using the interface logic biock of program specialization most of A/D chip model on the market, user can be according in configuration The model of position machine configuration unrestricted choice A/D chip, FPGA generate AD according to the interface sequence of A/D chip on actual cell Control card Conversion chip signal output interface signal, with simulate LU_1 to LU_24 constant power unit module AD conversion chip output letter Number timing.
7) can export to valve control system by the standard deviation irrelevance apart from feedback capacity voltage that configuration interface is arranged is 0% ~1200% randomness mistake capacitance voltage, for simulating the DC side overvoltage/undervoltage situation that power cell occurs in Practical Project Whether unit control panel can accurately detected and report valve control system etc. afterwards and sampling error influences control bring.
8) according to the setting of host computer, according to bypass thyristor in the property feature simulation real system of bypass thyristor Performance, wherein can set by open delay time of the host computer to thyristor, may also set up the malfunction and failure of thyristor State.
9) power device on the unit of the transmission of the units control module such as LU_1 to LU_24 is received by unit simulation module The switching signal of part and by-passing signal send data according to the Data Transport Protocol with digital emluator interface plate bus, then by RTDS interface module is transferred to RTlab system according to the communication protocol of RTlab digital simulator defined, for simulation valve tower emulation System uses.
Above embodiments are implemented under premised on technical solutions of the utility model, give detailed embodiment With specific operating process, but the protection scope of the utility model is not limited to the above embodiments.Side used in above-described embodiment Method is conventional method unless otherwise instructed.

Claims (5)

1. a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform, which is characterized in that including valve base Controller, analogue unit plate, control and interface board, wave recording device, host computer and Real Time Digital Simulator;Multiple analogue unit plates It is mounted in a simulation cabinet with control and interface board with bus card slot form, it is mutual by the core bus in simulation cabinet Connection;
The valve base controller connects analogue unit plate by ordinary optic fibre, and the control and interface board pass through high speed fibre Real Time Digital Simulator and wave recording device are connected, while host computer is also connected by Ethernet;
The analogue unit plate quantity be it is multiple, each analogue unit plate includes a FPGA main control chip and multiple optical fiber Communication interface circuit, FPGA main control chip are connected by I/O pin with multiple optical communication interface circuits, and multiple optical-fibre communications connect The mouth multiple optical fiber interfaces of circuit connection, multiple analogue unit plates are connect by multiple optical fiber with valve base controller, and multiple simulations are single First plate and Real Time Digital Simulator are built into the valve tower for flexible HVDC transmission system emulation experiment jointly.
2. a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform according to claim 1, It is characterized in that, the wave recording device is the recording cabinet with backboard and power supply, it include multiple records in recording cabinet Wave plate and an interface board, multiple recording plates and an interface board are inserted into the bus card slot of backboard, by recording cabinet Core bus interconnect, wave recording device by optical fiber interface on interface board with simulate the control and interface board phase in cabinet Connection, wave recording device also pass through ether net mode connection recording terminal upper computer.
3. a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform according to claim 2, It is characterized in that, the recording plate CPU that includes is using system on chip, SOC is by the fpga chip and ARM9 that interconnect Processor composition, the I/O pin of fpga chip are directly connected with the core bus of recording cabinet.
4. a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform according to claim 1, It is characterized in that, the control and interface board includes FPGA master chip, optical transceiver module, ethernet interface module, FPGA master Chip is directly connect with the core bus in simulation cabinet by I/O pin, and control and interface board pass through core bus and multiple moulds Quasi- cell board is connected, and is connected by ethernet interface module with host computer, and FPGA master chip also passes through optical transceiver module point It Lian Jie not Real Time Digital Simulator and wave recording device.
5. a kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform according to claim 1, It is characterized in that, the valve base controller architecture is consistent with the valve base controller equal proportion in electric system Practical Project, use In the actual valve base controller of simulation.
CN201721395287.8U 2017-10-26 2017-10-26 A kind of flexible HVDC transmission system nature imitation experiment device based on fpga chip platform Active CN208126138U (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107678356A (en) * 2017-10-26 2018-02-09 中国南方电网有限责任公司超高压输电公司天生桥局 Flexible direct current power transmission system nature imitation experiment device and method based on fpga chip platform
CN109541445A (en) * 2018-12-26 2019-03-29 中核控制系统工程有限公司 A kind of fpga chip device for testing functions and method
CN113514791A (en) * 2021-03-18 2021-10-19 广东电网有限责任公司电力调度控制中心 Testing platform and testing method of pure light type mutual inductor measuring system
CN114489002A (en) * 2021-12-31 2022-05-13 上海科梁信息科技股份有限公司 Flexible and straight fault simulation system based on FPGA

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107678356A (en) * 2017-10-26 2018-02-09 中国南方电网有限责任公司超高压输电公司天生桥局 Flexible direct current power transmission system nature imitation experiment device and method based on fpga chip platform
CN109541445A (en) * 2018-12-26 2019-03-29 中核控制系统工程有限公司 A kind of fpga chip device for testing functions and method
CN113514791A (en) * 2021-03-18 2021-10-19 广东电网有限责任公司电力调度控制中心 Testing platform and testing method of pure light type mutual inductor measuring system
CN114489002A (en) * 2021-12-31 2022-05-13 上海科梁信息科技股份有限公司 Flexible and straight fault simulation system based on FPGA
CN114489002B (en) * 2021-12-31 2024-05-03 上海科梁信息科技股份有限公司 Flexible-straight fault simulation system based on FPGA

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Address after: 562400 No.58 Ruijin South Road, Jushan office, Qianxinan Buyi and Miao Autonomous Prefecture, Guizhou Province

Patentee after: TIANSHENGQIAO BUREAU OF EHV POWER TRANSMISSION COMPANY, CHINA SOUTHERN POWER GRID Co.,Ltd.

Patentee after: Rongxin Huike Electric Co.,Ltd.

Address before: 562400 No.58 Ruijin South Road, Jushan office, Qianxinan Buyi and Miao Autonomous Prefecture, Guizhou Province

Patentee before: TIANSHENGQIAO BUREAU OF EHV POWER TRANSMISSION COMPANY, CHINA SOUTHERN POWER GRID Co.,Ltd.

Patentee before: RONGXIN HUIKE ELECTRIC TECHNOLOGY Co.,Ltd.