CN208092710U - A kind of reset circuit - Google Patents
A kind of reset circuit Download PDFInfo
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- CN208092710U CN208092710U CN201820579043.3U CN201820579043U CN208092710U CN 208092710 U CN208092710 U CN 208092710U CN 201820579043 U CN201820579043 U CN 201820579043U CN 208092710 U CN208092710 U CN 208092710U
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Abstract
The utility model is related to electronic circuit technology fields, disclose a kind of reset circuit, including：Sequentially connected power circuit, watchdog circuit and operation circuit, the power circuit provides working power to the operation circuit, when the power circuit powers off, the watchdog circuit persistently gives the operation circuit to power, the discrete circuit being made up of discrete component, can real-time monitoring and control modular circuit working condition, in operation exception delay machine can self-resetting, reenter normal operating conditions.
Description
Technical field
The utility model is related to electronic circuit technology field more particularly to a kind of reset circuits.
Background technology
In digital information processing system, reset processing is a most basic and extremely crucial part, and reset is will be electric
The sequential device initialization kept in road, to make the state initialization of circuit, when carrying out design of circuit system, each system
Be required for a control unit for capableing of proper reset whole system, in system electrification or crash to system in CPU and its
He respectively has reset function element circuit and carries out reset control.
Utility model content
The main purpose of the utility model is that propose a kind of reset circuit, the discrete electric being made up of discrete component
Road, can real-time monitoring and control modular circuit working condition, in operation exception delay machine can self-resetting, reenter normal work
Make state.
To achieve the above object, a kind of reset circuit provided by the utility model, including：Sequentially connected power circuit,
Watchdog circuit and operation circuit, the power circuit provide working power to the operation circuit, when the power circuit is disconnected
When electric, the watchdog circuit persistently gives the operation circuit to power.
Optionally, the power circuit includes：Resistance R2, resistance R7, capacitance C1, capacitance C2, diode D5, diode
D6, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3 and metal-oxide-semiconductor Q4, wherein anode and the grid of metal-oxide-semiconductor Q5 and one end of resistance R2 of diode D5
It is connected to power end 4.5V-IN, the cathode of diode D5 and the source electrode of metal-oxide-semiconductor Q5, one end of resistance R7 and metal-oxide-semiconductor Q3 together
Source electrode connects, the other end of drain electrode the connecting node VBAT, resistance R2 of metal-oxide-semiconductor Q5 and the cathode of diode D6, the grid of metal-oxide-semiconductor Q2
Pole and node b connections, the grounded drain of metal-oxide-semiconductor Q2, the source electrode of metal-oxide-semiconductor Q2 and the grid of metal-oxide-semiconductor Q3 and the other end of resistance R7
Connection, the drain electrode of metal-oxide-semiconductor Q3 are connect with one end of capacitance C2, one end of capacitance C1, node a and node VGSM, and capacitance C1's is another
One end is grounded, the other end ground connection of capacitance C2.
Optionally, the watchdog circuit includes：Diode D1, diode D2, diode D3, resistance R1, resistance R3, electricity
Hinder R4, resistance R5, resistance R6, resistance R8, capacitance C3, capacitance C5, triode Q1, triode Q4 and metal-oxide-semiconductor Q7, wherein metal-oxide-semiconductor
The source electrode of Q7 is connect with one end of node a and resistance R1, the drain electrode of metal-oxide-semiconductor Q7 and the cathode of diode D1, resistance R3 one end,
The grid connection of one end of resistance R4, one end of resistance R8, the collector of triode Q4 and metal-oxide-semiconductor Q7, the anode of diode D1
The other end of connecting node b, resistance R3 are grounded, and the other end of resistance R8 connects power end 4.5V-IN, the emitter of triode Q4
Ground connection, the base stage of triode Q4 are connect with the cathode of the cathode of diode D2 and diode D3, the anode and resistance of diode D3
The anode connection of the other end of R4 and diode D4, the anode of diode D2 and the other end of resistance R1, one end of capacitance C3 and
The collector of triode Q1 connects, the other end ground connection of capacitance C3, the emitter ground connection of triode Q1, the base stage of triode Q1 with
One end of the cathode of diode D4, one end of resistance R6 and capacitance C5 connects, the other end of capacitance C5 and one end of resistance R5 and
Node d connections, the other end ground connection of the other end connecting node e, resistance R5 of resistance R6.
Optionally, the operation circuit includes：Power supply chip U1, wherein the 1 connecting node a of pin of power supply chip U1, electricity
The pin 2 of source chip U1 is grounded, the 4 connecting node d of pin of the pin 3 connecting node c, power supply chip U1 of power supply chip U1.
Optionally, further include：Firmware upgrade circuit, the firmware upgrade circuit include：USB interface, wherein USB interface
Pin 1 is connect with node e and USB+5V power supply, and the pin 2 of USB interface is connect with the pin 5 of power supply chip U1, USB interface
Pin 3 is connect with the pin 6 of power supply chip U1, and the pin 4 of USB interface is hanging, and the pin 5 of USB interface is grounded.
The utility model proposes a kind of reset circuit, including：Sequentially connected power circuit, watchdog circuit and operation
Circuit, the power circuit provides working power to the operation circuit, when the power circuit powers off, the house dog electricity
Road persistently gives the operation circuit to power, the discrete circuit being made up of discrete component, being capable of real-time monitoring and control module electricity
Road working condition, in operation exception delay machine, energy self-resetting, reenters normal operating conditions.
Description of the drawings
Fig. 1 is a kind of functional schematic for reset circuit that the utility model embodiment provides；
Fig. 2 is a kind of circuit diagram for power circuit that the utility model embodiment provides；
Fig. 3 is a kind of circuit diagram for watchdog circuit that the utility model embodiment provides；
Fig. 4 is a kind of circuit diagram for operation circuit that the utility model embodiment provides；
Fig. 5 is a kind of circuit diagram for firmware upgrade circuit that the utility model embodiment provides.
The embodiments will be further described with reference to the accompanying drawings for the realization, functional characteristics and advantage of the utility model aim.
Specific implementation mode
It should be appreciated that specific embodiment described herein is only used to explain the utility model, it is not used to limit this
Utility model.
As shown in Figure 1, in the present embodiment, a kind of reset circuit, including：Sequentially connected power circuit, house dog electricity
Road and operation circuit, the power circuit provides working power to the operation circuit, described when the power circuit powers off
Watchdog circuit persistently gives the operation circuit to power.
In the present embodiment, the discrete circuit being made up of discrete component, being capable of real-time monitoring and control modular circuit work
Make state, energy self-resetting, reenters normal operating conditions in operation exception delay machine.
As shown in Fig. 2, in the present embodiment, the power circuit includes：Resistance R2, resistance R7, capacitance C1, capacitance C2,
Diode D5, diode D6, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3 and metal-oxide-semiconductor Q4, wherein the grid of the anode and metal-oxide-semiconductor Q5 of diode D5
And one end of resistance R2 is connected to power end 4.5V-IN together, the cathode of diode D5 and the source electrode of metal-oxide-semiconductor Q5, resistance R7
The source electrode of one end and metal-oxide-semiconductor Q3 connect, and the other end of drain electrode the connecting node VBAT, resistance R2 of metal-oxide-semiconductor Q5 are with diode D6's
Cathode, the grid of metal-oxide-semiconductor Q2 and node b connections, the grounded drain of metal-oxide-semiconductor Q2, the grid of the source electrode and metal-oxide-semiconductor Q3 of metal-oxide-semiconductor Q2
And the other end connection of resistance R7, drain electrode and one end of capacitance C2, one end of capacitance C1, the node a and node VGSM of metal-oxide-semiconductor Q3
Connection, the other end ground connection of capacitance C1, the other end ground connection of capacitance C2.
As shown in figure 3, in the present embodiment, the watchdog circuit (Watch dog) includes：Diode D1, diode
D2, diode D3, resistance R1, resistance R3, resistance R4, resistance R5, resistance R6, resistance R8, capacitance C3, capacitance C5, triode Q1,
Triode Q4 and metal-oxide-semiconductor Q7, wherein the source electrode of metal-oxide-semiconductor Q7 is connect with one end of node a and resistance R1, the drain electrode of metal-oxide-semiconductor Q7 with
The cathode of diode D1, one end of resistance R3, one end of resistance R4, one end of resistance R8, triode Q4 collector and metal-oxide-semiconductor
The grid of Q7 connects, the other end ground connection of the positive connecting node b of diode D1, resistance R3, the other end connection electricity of resistance R8
The emitter of source 4.5V-IN, triode Q4 is grounded, and the base stage of triode Q4 and the cathode of diode D2 and diode D3's is negative
Pole connects, and the anode of diode D3 is connect with the anode of the other end of resistance R4 and diode D4, anode and the electricity of diode D2
The collector connection of the other end of R1, one end of capacitance C3 and triode Q1 is hindered, the other end of capacitance C3 is grounded, triode Q1's
Emitter is grounded, and the base stage of triode Q1 is connect with one end of the cathode of diode D4, one end of resistance R6 and capacitance C5, capacitance
The other end of C5 is connect with one end of resistance R5 and node d, another termination of the other end connecting node e, resistance R5 of resistance R6
Ground.
As shown in figure 4, in the present embodiment, the operation circuit includes：Power supply chip U1, wherein power supply chip U1's
The pin 2 of pin 1 connecting node a, power supply chip U1 are grounded, the 3 connecting node c of pin of power supply chip U1, power supply chip U1's
4 connecting node d of pin.
In the present embodiment, when there is external power supply input, 4.5V_IN makes Q2NMOS pipes be connected by R2, Q3PMOS pipes
Because grid potential drags down conducting, operating voltage is provided to U1；After U1 obtains power supply booting work, output PWR_KEY high level is logical
Crossing D6 maintains Q2 to continue to be connected, even if external 4.5V_IN power supplys power-off at this time, also can provide work by internal VBAT power supplys
Make.
In the present embodiment, U1 normal operating conditions includes two stages：First, startup stage provides U1 when Q3 conductings
It is charged to C3 by R1 while working power；Second is that the maintenance stage, after U1 energization normal operations, it is necessary at 2.5 seconds
Interior (the specific time can be changed by R1 and C3 parameters) exports impulse level signal from GSM_WD, promotes Q6 to be connected by C5,
It discharges C3.
In the present embodiment, when U1 is in abnormality, such as U1 when machine does not export high level pulse, the work of watchdog circuit
Include three phases as state：First, watchdog circuit startup stage will slowly be charged by R1 to C3 after Q3 is connected；This
When assume U1 operation work as machine, no longer from GSM_WD output impulse level, the voltage of C3 can increase gradually, when voltage rises to about 1.3V
When (D2 low current conducting voltage 0.7V+Q4 base stage low currents conducting voltage 0.55V) C3 capacitances Q4 will be promoted to be connected by D2, Q4
Conducting promotes Q2 grid voltages by D1 to drag down cut-off to stop outputing current to U1 to form Q3 cut-offs, while Q4 conductings also promote
Q7 conductings carry out the electric discharge to C1；Second is that the watchdog circuit maintenance stage, is discharged since Q7 is connected by R3, the meeting on R3
Pressure drop is formed, R3 voltages allow Q1 to accelerate and maintain conducting state until the voltage of C1 is put to the voltage drop of R3 by R4 and D3 again
It is not enough to maintain just to stop when Q1 conductings less than D3 conducting voltage+Q1 base-on voltages；R3 maintains C1 electric discharges in pressure drop simultaneously
Promote Q1 to be connected also by D4 in the process, discharge C3, avoids the too fast completion formation reset of C3 chargings after the completion of electric discharge；Three
It is that watchdog circuit completes reseting stage, is completed when C1 discharges, when R3 pressure drops are not enough to maintain Q4 conductings, Q2 grid voltages rises
And be connected and Q3 is promoted to be connected and power to U1, simultaneously also by R1 charging is re-started to C3；It can be spaced after U1 operations at this time solid
It fixes time and promotes Q1 to be connected from GSM_WD voltage pulse outputs to discharge to C3, since voltage could not rise because of electric discharge C3 always
Start voltage to reset circuit, therefore U1 can continue to work normally for a long time.
As another embodiment, when U1 is in abnormality, and impulse level is exported such as GSM_WD, U1 works as machine, at this time by
High level is kept when GSM_WD long, without pulse change, also promotes Q6 conductings to discharge C3 by C5 with regard to no signal, therefore
It will carry out restarting flow automatically.
As shown in figure 5, in the present embodiment, reset circuit further includes：Firmware upgrade circuit, the firmware upgrade circuit packet
It includes：USB interface, the wherein pin 1 of USB interface are connect with node e and USB+5V power supply, the pin 2 and power supply chip of USB interface
The pin 5 of U1 connects, and the pin 3 of USB interface is connect with the pin 6 of power supply chip U1, and the pin 4 of USB interface is hanging, and USB connects
The pin 5 of mouth is grounded.
In the present embodiment, when U1 needs to carry out firmware download using USB serial ports, the 5V voltages of USB will be promoted by R6
Make Q1 that conducting be maintained to discharge to C3, ensures that U1 continue workings are downloaded to firmware and complete.
It should be noted that herein, the terms "include", "comprise" or its any other variant are intended to non-row
His property includes, so that process, method, article or device including a series of elements include not only those elements, and
And further include other elements that are not explicitly listed, or further include for this process, method, article or device institute it is intrinsic
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including this
There is also other identical elements in the process of element, method, article or device.
Above-mentioned the utility model embodiment serial number is for illustration only, can not represent the quality of embodiment.
It these are only the preferred embodiment of the utility model, it does not limit the scope of the patent of the present invention, every
Equivalent structure or equivalent flow shift made based on the specification and figures of the utility model, is applied directly or indirectly in
Other related technical areas are equally included in the patent within the scope of the utility model.
Claims (5)
1. a kind of reset circuit, which is characterized in that including：Sequentially connected power circuit, watchdog circuit and operation circuit, institute
It states power circuit and provides working power to the operation circuit, when the power circuit powers off, the watchdog circuit continues
It powers to the operation circuit.
2. a kind of reset circuit according to claim 1, which is characterized in that the power circuit includes：Resistance R2, resistance
R7, capacitance C1, capacitance C2, diode D5, diode D6, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3 and metal-oxide-semiconductor Q4, wherein diode D5 is just
The cathode and metal-oxide-semiconductor of power end 4.5V-IN, diode D5 are connected to together with pole and one end of the grid of metal-oxide-semiconductor Q5 and resistance R2
The source electrode of the source electrode of Q5, one end of resistance R7 and metal-oxide-semiconductor Q3 connects, and the drain electrode connecting node VBAT of metal-oxide-semiconductor Q5, resistance R2's is another
One end is connect with the cathode of diode D6, the grid of metal-oxide-semiconductor Q2 and node b, the grounded drain of metal-oxide-semiconductor Q2, the source electrode of metal-oxide-semiconductor Q2
Connect with the other end of the grid of metal-oxide-semiconductor Q3 and resistance R7, the drain electrode of metal-oxide-semiconductor Q3 and one end of capacitance C2, capacitance C1 one end,
Node a and node VGSM connections, the other end ground connection of capacitance C1, the other end ground connection of capacitance C2.
3. a kind of reset circuit according to claim 2, which is characterized in that the watchdog circuit includes：Diode D1,
Diode D2, diode D3, resistance R1, resistance R3, resistance R4, resistance R5, resistance R6, resistance R8, capacitance C3, capacitance C5, three
Pole pipe Q1, triode Q4 and metal-oxide-semiconductor Q7, wherein the source electrode of metal-oxide-semiconductor Q7 is connect with one end of node a and resistance R1, metal-oxide-semiconductor Q7
Drain electrode and the cathode of diode D1, one end of resistance R3, one end of resistance R4, one end of resistance R8, triode Q4 current collection
The grid of pole and metal-oxide-semiconductor Q7 connect, and the other end ground connection of the positive connecting node b of diode D1, resistance R3, resistance R8's is another
The emitter ground connection of end connection power end 4.5V-IN, triode Q4, the base stage of triode Q4 and the cathode of diode D2 and two poles
The cathode of pipe D3 connects, and the anode of diode D3 is connect with the anode of the other end of resistance R4 and diode D4, diode D2's
Anode is connect with the collector of the other end of resistance R1, one end of capacitance C3 and triode Q1, the other end ground connection of capacitance C3, and three
The emitter of pole pipe Q1 is grounded, one end of the base stage of triode Q1 and the cathode of diode D4, one end of resistance R6 and capacitance C5
Connection, the other end of capacitance C5 are connect with one end of resistance R5 and node d, the other end connecting node e of resistance R6, resistance R5's
The other end is grounded.
4. a kind of reset circuit according to claim 3, which is characterized in that the operation circuit includes：Power supply chip U1,
Wherein, the pin 2 of the pin 1 connecting node a, power supply chip U1 of power supply chip U1 are grounded, the connection section of pin 3 of power supply chip U1
The 4 connecting node d of pin of point c, power supply chip U1.
5. a kind of reset circuit according to claim 4, which is characterized in that further include：Firmware upgrade circuit, the firmware
Upgrading circuit includes：USB interface, the wherein pin 1 of USB interface are connect with node e and USB+5V power supply, the pin 2 of USB interface
It is connect with the pin 5 of power supply chip U1, the pin 3 of USB interface is connect with the pin 6 of power supply chip U1, the pin 4 of USB interface
Vacantly, the pin 5 of USB interface is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820579043.3U CN208092710U (en) | 2018-04-20 | 2018-04-20 | A kind of reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820579043.3U CN208092710U (en) | 2018-04-20 | 2018-04-20 | A kind of reset circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208092710U true CN208092710U (en) | 2018-11-13 |
Family
ID=64056831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820579043.3U Active CN208092710U (en) | 2018-04-20 | 2018-04-20 | A kind of reset circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208092710U (en) |
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2018
- 2018-04-20 CN CN201820579043.3U patent/CN208092710U/en active Active
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