CN207994922U - A kind of IGBT driving interlock circuits with dead zone function - Google Patents

A kind of IGBT driving interlock circuits with dead zone function Download PDF

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Publication number
CN207994922U
CN207994922U CN201820341218.7U CN201820341218U CN207994922U CN 207994922 U CN207994922 U CN 207994922U CN 201820341218 U CN201820341218 U CN 201820341218U CN 207994922 U CN207994922 U CN 207994922U
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circuit
igbt
diode
input terminal
schmidt trigger
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CN201820341218.7U
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周文定
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Chengdu Sai Li Kang Electric Co Ltd
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Chengdu Sai Li Kang Electric Co Ltd
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Abstract

A kind of IGBT with dead zone function drives interlock circuit, and the utility model is related to driving circuit fields, it is intended to which it is poor to solve existing IGBT dead zone protecting circuits anti-interference, the technical issues of can not providing protection in processor fault.Including processor unit and IGBT drivers, processor unit includes output terminals A and output end B, IGBT driver includes input terminal A and input terminal B, further includes port processing circuit, the dead time circuit, Schmidt trigger and AND gate circuit.The utility model passes through inlet port processing circuit, the dead time circuit, Schmidt trigger circuit and AND gate circuit between processor unit and IGBT drivers; it realizes when a signal is high level; block another signal; ensure two input signal interlockings; and the delay of interlocking signal is completed by the dead time circuit, solve the problems, such as that down tube is straight-through on IGBT, and protection is provided to IGBT from hardware; have many advantages, such as that circuit is simple, strong interference immunity and with strong applicability.

Description

A kind of IGBT driving interlock circuits with dead zone function
Technical field
The utility model is related to driving circuit fields, and in particular to a kind of IGBT driving interlock circuits with dead zone function.
Background technology
Insulated gate transistor (Insulated Gate Bipolar Transistor, contracting claim IGBT) be it is a kind of in recent years It quickly grows, widely used power device, its effect is especially notable in high-power circuit, and especially IGBT has switch The advantage that speed is fast, conducting voltage is small, current class is big is extensive in fields such as rail traffic, generation of electricity by new energy, motor drags It uses.
Since IGBT conduction impedances are low, two switching tubes cannot simultaneously turn on the same bridge arm up and down, it is therefore desirable to this Doing one prevents straight-through protection, the prior art from adding one between upper and lower two switch controlled signals generally by processor unit Section delay is as dead zone, and that there are anti-interferences is poor for this method, the deficiencies of can not being protected in the case of processor fault.
Utility model content
The purpose of this utility model is to provide a kind of IGBT driving interlock circuits with dead zone function, solves existing IGBT Dead zone protecting circuit anti-interference is poor, the technical issues of can not providing protection in processor fault.
Technical solution used by the utility model is:
A kind of IGBT driving interlock circuits with dead zone function, including processor unit and IGBT drivers, the processing Device unit includes output terminals A and output end B, and the IGBT drivers include input terminal A and input terminal B, further include first apply it is close Special trigger, the second Schmidt trigger, third Schmidt trigger, the 4th Schmidt trigger, the first AND gate circuit, second AND gate circuit, third AND gate circuit, the 4th AND gate circuit, first port processing circuit, second port processing circuit, the first dead zone Circuit and the second the dead time circuit are set, wherein
Third Schmidt trigger is connected by the output terminals A of first port processing circuit and processor unit;
The output end B connections that first Schmidt trigger passes through second port processing circuit and processor unit;
4th Schmidt trigger input terminal is connect with third Schmidt trigger output end, and output end is dead by first Area's setting circuit is connect with the input terminal of the first AND gate circuit;
Second Schmidt trigger input terminal is connect with the first Schmidt trigger output end, and output end is dead by second Area's setting circuit is connect with the input terminal of the second AND gate circuit;
The input terminal of third AND gate circuit is connect with the output end of the first AND gate circuit and the first Schmidt trigger respectively, Its output end accesses the input terminal A of IGBT drivers;
The input terminal of 4th AND gate circuit is connect with the output end of the second AND gate circuit and third Schmidt trigger respectively, Its output end accesses the input terminal B of IGBT drivers.
Further, the first the dead time circuit includes second resistance, the 5th diode and the first capacitance, and described second It connects with first capacitance one end after resistance and the 5th diodes in parallel, the first capacitance other end ground connection;Second dead zone It includes the 6th resistance, the 6th diode and the second capacitance that circuit, which is arranged, with the after the 6th resistance and the 6th diodes in parallel Two capacitance one end are connected, the second capacitance other end ground connection.
Further, the first port processing circuit includes first resistor, 3rd resistor, the 4th resistance, the first diode With the second diode, the 3rd resistor input terminal is by the 4th resistance eutral grounding, the output end sun with the first diode respectively Pole is connected with the cathode of the second diode, and the cathode of first diode accesses supply voltage by first resistor, and described the The plus earth of two diodes.
Further, the second port processing circuit includes the 7th resistance, the 8th resistance, the 9th resistance, third diode With the 4th diode, the 7th resistance input terminal is by the 8th resistance eutral grounding, the output end sun with third diode respectively Pole is connected with the cathode of the 4th diode, and the cathode of the third diode accesses supply voltage by the 9th resistance, and described the The plus earth of four diodes.
The beneficial effects of the utility model:Compared with prior art, the utility model passes through in processor unit and IGBT Inlet port processing circuit, the dead time circuit, Schmidt trigger circuit and AND gate circuit between driver are realized when a letter When number being high level, another signal is blocked, it is ensured that the interlocking of two input signals, and pass through the dead time circuit and complete interlocking letter Number delay, solve the problems, such as on IGBT that down tube is straight-through from hardware, protection provided to IGBT, have circuit simple, resist and do The advantages that immunity is strong and with strong applicability.
Description of the drawings
Fig. 1 is the utility model integrated connection schematic diagram.
Specific implementation mode
In order to which those skilled in the art know more about the utility model, below in conjunction with drawings and examples to this practicality It is novel to elaborate.
As shown in Figure 1, the present embodiment provides a kind of, the IGBT with dead zone function drives interlock circuit, including processor unit With IGBT drivers, processor unit includes output terminals A and output end B, IGBT driver includes input terminal A and input terminal B, Further include the first Schmidt trigger U1A, the second Schmidt trigger U1B, third Schmidt trigger U1C, the 4th Schmidt Trigger U1D, the first AND gate circuit U2A, the second AND gate circuit U2B, third AND gate circuit U2C, the 4th AND gate circuit U2D, Single port processing circuit, second port processing circuit, the first the dead time circuit and the second the dead time circuit, wherein
Third Schmidt trigger U1C is connected by the output terminals A of first port processing circuit and processor unit;
The output end B connections that first Schmidt trigger U1A passes through second port processing circuit and processor unit;
4th Schmidt trigger U1D input terminals are connect with third Schmidt trigger U1C output ends, and output end passes through First the dead time circuit is connect with the input terminal of the first AND gate circuit U2A;
Second Schmidt trigger U1B input terminals are connect with the first Schmidt trigger U1A output ends, and output end passes through Second the dead time circuit is connect with the input terminal of the second AND gate circuit U2B;
The input terminal of third AND gate circuit U2C is defeated with the first AND gate circuit U2A and the first Schmidt trigger U1A respectively Outlet connects, and output end accesses the input terminal A of IGBT drivers;
The input terminal of 4th AND gate circuit U2D is defeated with the second AND gate circuit U2B and third Schmidt trigger U1C respectively Outlet connects, and output end accesses the input terminal B of IGBT drivers.
When the signal PWMA of processor unit output is high level, high electricity is remained as after first port processing circuit It is flat, by the first Schmidt trigger U1A, become low level signal, this low level signal is input to the 4th AND gate circuit U2D, due to the characteristic with door, no matter the signal PWMB of processor unit output is high or low level, the 4th AND gate circuit U2D The signal of output is all low level, and this completes signal PWMA and signal PWMB interlockings;Third Schmidt trigger U1C is defeated The low level signal that goes out while the 4th Schmidt trigger U1D is entered, the 4th Schmidt trigger U1D output signals are high electricity Flat, by R2 pairs of the first capacitance C1 punching electricity of second resistance, the delay of complete pair signals PWMA, this delay is dead zone.
First the dead time circuit includes second resistance R2, the 5th diode D5 and the first capacitance C1, second resistance R2 and It connects with first one end capacitance C1 after 5th diode D5 parallel connections, first capacitance C1 other ends ground connection;Second the dead time circuit Including the 6th resistance R6, the 6th diode D6 and the second capacitance C2, with second after the 6th resistance R6 and the 6th diode D6 parallel connections The one end capacitance C2 is connected, second capacitance C2 other ends ground connection.The resistance value of second resistance R2 and the 6th resistance R6 be 1K Ω, first The capacity of capacitance C1 and the second capacitance C2 are 4.7uf, and the first dead-zone circuit and the second the dead time circuit can be by above It is provided with and is delayed to input signal.
Further, first port processing circuit includes first resistor R1,3rd resistor R3, the 4th resistance R4, the one or two pole Pipe D1 and the second diode D2,3rd resistor R3 input terminals are grounded by the 4th resistance R4, output end respectively with the one or two pole The cathode of the anode of pipe D1 and the second diode D2 connect, and the cathode of the first diode D1 accesses power supply electricity by first resistor R1 Pressure, the plus earth of the second diode D2.
Further, second port processing circuit includes the 7th resistance R7, the 8th resistance R8, the 9th resistance R9, the three or two pole Pipe D3 and the 4th diode D4, the 7th resistance R7 input terminals are grounded by the 8th resistance R8, output end respectively with the three or two pole The cathode of the anode of pipe D3 and the 4th diode D4 connect, and the cathode of third diode D3 accesses power supply electricity by the 9th resistance R9 Pressure, the plus earth of the 4th diode D4.
In the present embodiment, 3rd resistor R3, the 4th resistance R4, the 7th resistance R7 and the 8th resistance R8 resistance value be 3.3K The resistance value of Ω, first resistor R1 and the 9th resistance R9 are 22K Ω, the 4th resistance R4 and the 8th resistance R8, complete signal impedance Matching;3rd resistor R3 and the 7th resistance R7 are connected on after the output signal of processor unit, the current limliting work(of complete pair signals Can, the first diode D1 and the second diode D2 series connection, third diode D3 and the 4th diode D4 connect, the second diode D2 Power supply is connect by first resistor R1 with the cathode of the 4th diode D4 plus earths, the first diode D1, third diode D3's Cathode connects power supply by the 9th resistance R9, plays the role of amplitude limit to signal PWMA and PWMB respectively.
Compared with prior art, the utility model by between processor unit and IGBT drivers inlet port handle Circuit, the dead time circuit, Schmidt trigger circuit and AND gate circuit realize that block is another when a signal is high level A signal, it is ensured that two input signal interlockings, and by the delay of the dead time circuit completion interlocking signal, solved from hardware Down tube leads directly to problem on IGBT, to IGBT provides protection, simple with circuit, strong interference immunity and with strong applicability etc. Advantage.
Embodiments described above is only the utility model a part of the embodiment, is not whole embodiment.Base In the embodiments of the present invention, what those skilled in the art were obtained without making creative work Other embodiments used, belong to the scope of protection of the utility model.

Claims (4)

1. a kind of IGBT with dead zone function drives interlock circuit, including processor unit and IGBT drivers, the processor Unit includes output terminals A and output end B, and the IGBT drivers include input terminal A and input terminal B, it is characterised in that:Further include First Schmidt trigger, the second Schmidt trigger, third Schmidt trigger, the 4th Schmidt trigger, first and door Circuit, the second AND gate circuit, third AND gate circuit, the 4th AND gate circuit, first port processing circuit, second port processing electricity Road, the first the dead time circuit and the second the dead time circuit, wherein
Third Schmidt trigger is connected by the output terminals A of first port processing circuit and processor unit;
The output end B connections that first Schmidt trigger passes through second port processing circuit and processor unit;
4th Schmidt trigger input terminal is connect with third Schmidt trigger output end, and output end is set by the first dead zone Circuits are connect with the input terminal of the first AND gate circuit;
Second Schmidt trigger input terminal is connect with the first Schmidt trigger output end, and output end is set by the second dead zone Circuits are connect with the input terminal of the second AND gate circuit;
The input terminal of third AND gate circuit is connect with the output end of the first AND gate circuit and the first Schmidt trigger respectively, defeated Outlet accesses the input terminal A of IGBT drivers;
The input terminal of 4th AND gate circuit is connect with the output end of the second AND gate circuit and third Schmidt trigger respectively, defeated Outlet accesses the input terminal B of IGBT drivers.
2. a kind of IGBT with dead zone function according to claim 1 drives interlock circuit, it is characterised in that:Described first The dead time circuit includes second resistance, the 5th diode and the first capacitance, after the second resistance and the 5th diodes in parallel It connects with first capacitance one end, the first capacitance other end ground connection;The second the dead time circuit includes the 6th resistance, the Six diodes and the second capacitance are connected with second capacitance one end after the 6th resistance and the 6th diodes in parallel, and described second The capacitance other end is grounded.
3. a kind of IGBT with dead zone function according to claim 2 drives interlock circuit, it is characterised in that:Described first Port processing circuit includes first resistor, 3rd resistor, the 4th resistance, the first diode and the second diode, the third electricity Input terminal is hindered by the 4th resistance eutral grounding, and output end connects with the cathode of the anode of the first diode and the second diode respectively It connects, the cathode of first diode accesses supply voltage, the plus earth of second diode by first resistor.
4. a kind of IGBT with dead zone function according to claim 3 drives interlock circuit, it is characterised in that:Described second Port processing circuit includes the 7th resistance, the 8th resistance, the 9th resistance, third diode and the 4th diode, the 7th electricity Input terminal is hindered by the 8th resistance eutral grounding, and output end connects with the cathode of the anode of third diode and the 4th diode respectively It connects, the cathode of the third diode accesses supply voltage, the plus earth of the 4th diode by the 9th resistance.
CN201820341218.7U 2018-03-13 2018-03-13 A kind of IGBT driving interlock circuits with dead zone function Active CN207994922U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112366932A (en) * 2020-10-22 2021-02-12 西安爱科赛博电气股份有限公司 IGBT driving dead zone and interlocking circuit capable of adjusting hardware dead zone time
CN112532121A (en) * 2020-12-03 2021-03-19 中国电子科技集团公司第二十四研究所 Three-phase brushless motor driving circuit, three-phase brushless motor driver and compensation method
CN114825872A (en) * 2022-06-01 2022-07-29 惠州市盛微电子有限公司 PWM driving circuit and method with low loss and high switching speed

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112366932A (en) * 2020-10-22 2021-02-12 西安爱科赛博电气股份有限公司 IGBT driving dead zone and interlocking circuit capable of adjusting hardware dead zone time
CN112366932B (en) * 2020-10-22 2023-09-08 西安爱科赛博电气股份有限公司 IGBT driving dead zone and interlocking circuit capable of adjusting hardware dead zone time
CN112532121A (en) * 2020-12-03 2021-03-19 中国电子科技集团公司第二十四研究所 Three-phase brushless motor driving circuit, three-phase brushless motor driver and compensation method
CN114825872A (en) * 2022-06-01 2022-07-29 惠州市盛微电子有限公司 PWM driving circuit and method with low loss and high switching speed

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