CN207968511U - A kind of slow power supply apparatus and systems of PoE - Google Patents

A kind of slow power supply apparatus and systems of PoE Download PDF

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Publication number
CN207968511U
CN207968511U CN201820331273.8U CN201820331273U CN207968511U CN 207968511 U CN207968511 U CN 207968511U CN 201820331273 U CN201820331273 U CN 201820331273U CN 207968511 U CN207968511 U CN 207968511U
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China
Prior art keywords
poe
power supply
pse
voltage
slow
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CN201820331273.8U
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Inventor
聂怀军
王向华
聂怀东
樊展
张海民
颜文
曾贞群
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SHENZHEN YTEPO TECHNOLOGY Co.,Ltd.
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Shenzhen Utp Electronic Co Ltd
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Abstract

The utility model discloses a kind of slow power supply apparatus and systems of PoE, device includes PoE controllers and multiple PSE power supply chips being connect with the PoE controllers, each PSE power supply chips are connected to multiple power receiving equipments, to be powered to multiple power receiving equipments according to preset delay startup strategy.Implement the beneficial effects of the utility model:When the electrifying startup simultaneously of the PoE interchangers in system, according to preset delay startup strategy, connected power receiving equipment is powered, to decrease or even eliminate the influence to power supply grid, interference of the system to power receiving equipment power supply moment to power supply grid is not only reduced to the greatest extent, but also increases the stability and reliability of system.

Description

A kind of slow power supply apparatus and systems of PoE
Technical field
The utility model is related to PoE power supply technique fields more particularly to a kind of slow power supply apparatus and systems of PoE.
Background technology
With the extensive use of PoE (Power OverEthernet) technology, PoE technologies are more and more ripe, but in reality In engineer application, especially in the case where power supply power supply environment is poor, when more PoE interchangers power on and to connecting simultaneously When equipment is carried out while being powered, entire load can generate a prodigious glitch to power supply grid, this interference is not Conduction Interference only is generated to other PoE interchangers in homologous ray, it also can be to the especially communication equipment of the miscellaneous equipment in system Generate interference.This is re-powered again after entire monitoring system power down, the major reason of certain node cisco unity malfunctions.
Utility model content
The purpose of this utility model is to provide a kind of slow power supply apparatus and systems of PoE, solve in the prior art in power supply In the case that environment of powering is poor, when more PoE interchangers power on simultaneously and institute's attached device is carried out while being powered, Entire load can generate a prodigious glitch to power supply grid, this interference not only hands over other PoE in homologous ray It changes planes and generates Conduction Interference, can also lead to the problem of interference to the especially communication equipment of the miscellaneous equipment in system.
The technical solution of the utility model is realized as follows:
On the one hand, it is slow for electric installation, including PoE controllers, multiple and PoE controls to provide a kind of PoE for the utility model The PSE power supply chips of device processed connection, multiple multigroup filters being connect respectively with PSE power supply chips and with multiple filters The network interface of connection, each PSE power supply chips are by the network interface connection to multiple power receiving equipments, to according to preset Delay startup strategy is powered multiple power receiving equipments.
It is slow in electric installation, the PoE controllers include INT output ports and I2C defeated in PoE described in the utility model Exit port, each PSE power supply chips are described including INT input ports, I2C input ports and multiple PSE voltage ports INT output ports are respectively connected to the INT input ports of each PSE power supply chips, and the I2C output ports are separately connected To the I2C input ports of each PSE power supply chips, multiple PSE voltage ports are respectively connected to multiple described by electricity Equipment.
It is slow in electric installation, further including isolator and photoelectrical coupler, the PoE controls in PoE described in the utility model Device processed further includes serial ports and coupling port, and the serial ports is connected to the isolator, and the coupling port is connected to the photoelectricity Coupler.
It is slow in electric installation, further including for accessing power supply grid voltage and being converted in PoE described in the utility model The voltage conversion unit of predeterminated voltage, each PSE power supply chips further include chip voltage access interface, the chip voltage Access interface is connected to the voltage conversion unit to access the predeterminated voltage;The PoE controllers further include controller electricity Inbound port is crimped, the controller voltage access interface is connected to the voltage conversion unit to access the predeterminated voltage.
On the one hand, a kind of slow power supply systems of PoE are provided, including:
Multiple PoE as described above are slow for electric installation;
It is multiple to delay the exchanger chip being connect for electric installation with multiple PoE respectively, wherein an exchanger chip connects To the slow multigroup filters for electric installation of a PoE, to keep exchanger chip and coupled PoE slow for electric installation composition one PoE interchangers pass through network interface connection between multiple PoE interchangers.
Therefore, the utility model has the beneficial effects that when the electrifying startup simultaneously of the PoE interchangers in system, according to pre- The delay startup strategy set, is powered connected power receiving equipment, to decrease or even eliminate the influence to power supply grid, not only System is reduced to the greatest extent and gives PD interference of the power supply moment to power supply grid, and increases the stability of system and reliable Property.
Description of the drawings
Below in conjunction with accompanying drawings and embodiments, the utility model is described in further detail, in attached drawing:
Fig. 1 is the slow structural schematic diagrams for electric installation of a kind of PoE that one of the utility model preferred embodiment provides;
Fig. 2 is the structural schematic diagram for the PoE controllers that one of the utility model preferred embodiment provides;
Fig. 3 is the structural schematic diagram for the 1st PSE power supply chip that one of the utility model preferred embodiment provides;
Fig. 4 is the structural schematic diagram for the 2-n PSE power supply chip that one of the utility model preferred embodiment provides;
Fig. 5 is the structure diagram that a kind of PoE that one of the utility model preferred embodiment provides delays power supply system;
Fig. 6 is the structural schematic diagram for the exchanger chip that one of the utility model preferred embodiment provides;
Fig. 7 is the structural schematic diagram for the filter that one of the utility model preferred embodiment provides.
Specific implementation mode
For a clearer understanding of the technical features, objectives and effects of the utility model, attached drawing will be compareed below Specific embodiment of the present utility model is described in detail.It should be appreciated that following explanation is only the specific of the utility model embodiment It illustrates, the scope of protection of the utility model should not be limited with this.
Referring to Fig. 1, Fig. 1 is the slow structures for electric installation 100 of a kind of PoE that one of the utility model preferred embodiment provides Schematic diagram, PoE it is slow for electric installation 100 include PoE controllers 1, multiple PSE power supply chips 2 being connect with the PoE controllers 1, Multiple multigroup filters 5 being connect respectively with PSE power supply chips 2 and the network interface 6 being connect with multiple filters are each described PSE power supply chips 2 are connected to multiple power receiving equipments (PD i.e. in figure) by the network interface 6, to slow be opened according to preset Dynamic strategy is powered multiple power receiving equipments.
Referring to Fig. 2, Fig. 2 is the structural schematic diagram for the PoE controllers 1 that one of the utility model preferred embodiment provides, institute It includes INT output ports and I2C output ports to state PoE controllers 1, it is preferred that the model of the PoE controllers 1 STM32F051C8T6, INT output port include MAX5980_INTn, and I2C output ports include PSE_IIC_SCL and PSE_ IIC_SDA。
Referring to Fig. 3-Fig. 4, Fig. 3 is the knot for the 1st PSE power supply chip 2 that one of the utility model preferred embodiment provides Structure schematic diagram, Fig. 4 are the structural schematic diagram for the 2-n PSE power supply chip 2 that one of the utility model preferred embodiment provides, Each PSE power supply chips 2 include INT input ports, I2C input ports and multiple PSE voltage ports, the INT defeated Exit port is respectively connected to the INT input ports of each PSE power supply chips 2, and the I2C output ports are respectively connected to often The I2C input ports of a PSE power supply chips 2, multiple PSE voltage ports are respectively connected to multiple described set by electricity It is standby.Preferably, the model MAX5980 of the PSE power supply chips 2.Fig. 3 and Fig. 4 is two kinds of connections of MAX5980 chips, Including INT input ports, I2C input ports and multiple PSE voltage ports, INT input ports include MAX5980_INTn, I2C Input port includes PSE_IIC_SCL and PSE_IIC_SDA, and PSE voltage ports include PSE_54V.
Preferably, referring to Fig. 1, it further includes isolator 3 and photoelectrical coupler 4 that PoE, which delays for electric installation 100, referring to Fig. 2, institute It further includes serial ports and coupling port to state PoE controllers 1, and the serial ports is connected to the isolator 3, and the coupling port is connected to The photoelectrical coupler 4.Serial ports includes UART_TX and UART_RX, and coupling port includes EXT_RST.The model of isolator 3 ADUM1201AR, the model EL3H7B of photoelectrical coupler 4.
Preferably, referring to Fig. 1, it further includes for accessing power supply grid voltage and being converted to default that PoE, which delays for electric installation 100, The voltage conversion unit of voltage, voltage conversion unit export 3.3V_PSE, to be supplied for PoE controllers 1 and PSE power supply chips 2 Electricity in Fig. 1, is also associated with to exchange between voltage conversion unit and power supply grid and turns direct current component (AC Power DC 54V), joins See Fig. 3-Fig. 4, each PSE power supply chips 2 further include chip voltage access interface, the chip voltage access interface connection To the voltage conversion unit to access the predeterminated voltage;The PoE controllers 1 further include controller voltage access interface, The controller voltage access interface is connected to the voltage conversion unit to access the predeterminated voltage.Controller voltage accesses Port includes 3.3V_PSE, and chip voltage access interface includes 3.3V_PSE.
Referring to Fig. 5, Fig. 5 is the structure that a kind of PoE that one of the utility model preferred embodiment provides delays power supply system 10 Block diagram, it includes multiple PoE slow for electric installation 100 and multiple slow for electric installation with multiple PoE respectively that PoE, which delays power supply system 10, The exchanger chip 200 of 100 connections, to keep exchanger chip 200 and coupled PoE slow for the composition of electric installation 100 one PoE interchangers are connected by network interface 6 between multiple PoE interchangers 200.
Referring to Fig. 6-Fig. 7, Fig. 6 is that the structure for the exchanger chip 200 that one of the utility model preferred embodiment provides is shown It is intended to;Fig. 7 is the structural schematic diagram for the filter 5 that one of the utility model preferred embodiment provides.A wherein exchanger chip 200 are connected to the slow multigroup filters 5 for electric installation 100 of a PoE, and the model of exchanger chip 200 is preferably BCM53344. BCM53344 is connected to each group of filter 5 by four pairs of differential lines.The model of filter 5 is preferably G9603DG, each group of filter Wave device 5 is connected to network interface 6 by the corresponding ports MDI.
There is provided herein the various operations of embodiment.In one embodiment, described one or operation may be constructed one The computer-readable instruction stored on a or computer-readable medium, will be so that computing device be held when being executed by electronic equipment The row operation.Describing the sequences of some or all of operations, to should not be construed as to imply that these operations necessarily order dependent 's.It will be appreciated by those skilled in the art that the alternative sequence of the benefit with this specification.Furthermore, it is to be understood that not being institute There is operation that must exist in each embodiment provided in this article.
Moreover, word " preferred " used herein means serving as example, example or illustration.Feng Wen is described as " preferably " any aspect or design be not necessarily to be construed as than other aspect or design it is more advantageous.On the contrary, the use purport of word " preferred " Concept is being proposed in specific ways.Term "or" as used in this application is intended to mean the "or" for including and non-excluded "or".That is, unless specified otherwise or clear from the context, " X uses A or B " means that nature includes any one of arrangement. That is, if X uses A;X uses B;Or X uses A and B both, then " X uses A or B " is met in aforementioned any example.
Moreover, although the disclosure, people in the art has shown and described relative to one or realization method Member will be appreciated that equivalent variations and modification based on the reading and understanding to the specification and drawings.The disclosure includes all such Modifications and variations, and be limited only by the scope of the following claims.In particular, to by said modules (such as element, resource Deng) various functions that execute, the term for describing such component is intended to correspond to the specified function (example for executing the component As it is functionally of equal value) random component (unless otherwise instructed), even if in structure with execute shown in this article The open structure of function in disclosed exemplary implementations is not equivalent.In addition, although the special characteristic of the disclosure phase Only one in several realization methods is disclosed, but this feature can with such as can be for given or specific application It is it is expected and one of other advantageous realization methods or the combination of other features.Moreover, with regard to term " comprising ", " having ", " containing Have " or its deformation be used in specific implementation mode or claim for, such term be intended to with term " include " phase As mode include.
Each functional unit in the utility model embodiment can be integrated in a processing module, can also be each list Member physically exists alone, can also two or more units be integrated in a module.Above-mentioned integrated module both can be with It is realized, can also be realized in the form of software function module in the form of hardware.If the integrated module is with software The form of function module realizes and when sold or used as an independent product, can also be stored in one and computer-readable deposit In storage media.Storage medium mentioned above can be read-only memory, disk or CD etc..Above-mentioned each device or system, The method in correlation method embodiment can be executed.
In conclusion although the utility model is disclosed above with preferred embodiment, above preferred embodiment is not used To limit the utility model, those skilled in the art can make without departing from the spirit and scope of the utility model It is various to change and retouch, therefore the scope of protection of the utility model is subject to the range that claim defines.

Claims (5)

1. a kind of PoE is slow for electric installation, which is characterized in that including PoE controllers, multiple PSE being connect with the PoE controllers Power supply chip, multiple multigroup filters being connect respectively with PSE power supply chips and the network interface being connect with multiple filters, often A PSE power supply chips are by the network interface connection to multiple power receiving equipments, to according to preset delay startup strategy pair Multiple power receiving equipments are powered.
2. PoE according to claim 1 is slow for electric installation, which is characterized in that the PoE controllers include INT output ends Mouth and I2C output ports, each PSE power supply chips include INT input ports, I2C input ports and multiple PSE voltages Port, the INT output ports are respectively connected to the INT input ports of each PSE power supply chips, the I2C output ends Mouth is respectively connected to the I2C input ports of each PSE power supply chips, and multiple PSE voltage ports are separately connected at most A power receiving equipment.
3. PoE according to claim 2 is slow for electric installation, which is characterized in that further include isolator and photoelectrical coupler, institute It further includes serial ports and coupling port to state PoE controllers, and the serial ports is connected to the isolator, and the coupling port is connected to institute State photoelectrical coupler.
4. PoE according to claim 2 is slow for electric installation, which is characterized in that further include for accessing power supply grid voltage And the voltage conversion unit of predeterminated voltage is converted to, each PSE power supply chips further include chip voltage access interface, described Chip voltage access interface is connected to the voltage conversion unit to access the predeterminated voltage;The PoE controllers further include Controller voltage access interface, it is described default to access that the controller voltage access interface is connected to the voltage conversion unit Voltage.
5. a kind of PoE delays power supply system, which is characterized in that including:
Multiple PoE according to any one of claims 1-4 are slow for electric installation;
It is multiple to delay the exchanger chip being connect for electric installation with multiple PoE respectively, wherein an exchanger chip is connected to one The slow multigroup filters for electric installation of PoE, to keep exchanger chip and coupled PoE slow for one PoE of electric installation composition Interchanger passes through network interface connection between multiple PoE interchangers.
CN201820331273.8U 2018-03-09 2018-03-09 A kind of slow power supply apparatus and systems of PoE Active CN207968511U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110247776A (en) * 2018-03-09 2019-09-17 深圳市优特普电子有限公司 A kind of PoE slow power supply unit, system and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110247776A (en) * 2018-03-09 2019-09-17 深圳市优特普电子有限公司 A kind of PoE slow power supply unit, system and method

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Address after: 518000 floor 5, building B, floor 4 and floor 5, building C, No.2, Luozu Industrial Avenue, Luozu community, Shiyan street, Bao'an District, Shenzhen City, Guangdong Province

Patentee after: SHENZHEN YTEPO TECHNOLOGY Co.,Ltd.

Address before: 518000 south of four A2, North Fangzheng science and Technology Park, north of song Bai highway, Baoan District Shiyan Road, Shenzhen, Guangdong

Patentee before: SHENZHEN UTEPO ELECTRONICS Co.,Ltd.

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