Invention content
In order to solve the technical problems existing in the prior art, the utility model provides a kind of all solid state MIMO radar system
System, solves the data processing of MIMO radar system faced and power problems in the prior art, realizes MIMO radar system
Miniaturization, can be used in laboratory teaching demonstration or field testing etc..
In order to achieve the above object, the technical solution that the utility model is taken is as follows:
A kind of all solid state MIMO radar system, FMC-DAC for including transmitting terminal with multichannel, being connect with transmitting terminal
Card, the receiving terminal with multichannel, FMC-ADC subcards, digital signal processing module and the host computer being connect with receiving terminal;The hair
It penetrates end to connect with digital signal processing module by FMC-DAC subcards, the receiving terminal passes through FMC-ADC subcards and digital signal
Processing module connects;The host computer is connect with digital signal processing module;
The transmitting terminal with multichannel includes becoming in the sequentially connected output control unit of FMC-DAC subcards, multichannel
Frequency module, all solid state power amplifier group and transmission antenna group;
The receiving terminal with multichannel include with the sequentially connected intermediate frequency amplifier of FMC-ADC subcards, intermediate-frequency filter,
Multichannel down conversion module, filter, low noise amplifier module, limiter and reception antenna group.
Further, the digital signal processing module includes FPGA digital signal processing modules, the FPGA numbers letter
Number processing module is connect by digital control interface with host computer.
Further, the digital signal processing module includes the FPGA that chip model is Xilinx Virtex7 690T
Digital signal processing module.
Further, the FPGA digital signal processing modules by two onboard FMC-HPC connectors respectively with
FMC-ADC with FMC-DAC subcards connect;The FPGA digital signal processing modules are onboard serial ports;The FPGA digital signals
Processing module is additionally provided with Ethernet interface.
Further, the FPGA digital signal processing modules further include having two groups or more storage unit;Institute
It further includes SATA interface to state FPGA digital signal processing modules, and storage device is connected by SATA interface.
Further, the transmitting terminal with multichannel includes the transmitting terminal that 4 tunnels become frequency link, and each becomes frequency link energy
It is enough independently to carry out switch control;The multichannel up-converter module includes 4 road frequency-variable modules;The power amplifier group includes 4
The all solid state power amplifier module group in road.
Further, the output control unit includes 4 tunnel road numerical-control attenuators.
Further, the receiving terminal with multichannel includes the receiving terminal that 8 tunnels become frequency link;The multichannel down coversion mould
Block includes 8 tunnel down conversion modules.
Advantageous effect:Compared with prior art, all solid state MIMO radar system transmitter first described in the utility model is adopted
With all solid state power amplifier module group in 4 tunnels, compared with conventional radar transmitting module, solid-state amplifier has long working life,
Reliability is high, light-weight, small, easy to maintain with roomy, efficient, flexible design, it is at low cost the features such as, due to using
Low-pressure designs greatly reduce failure rate;Secondly receiver uses low noise amplifier module, reduces noise coefficient, makes it
With higher system sensitivity;Then FPGA digital signal processing modules pass through the FMC outside the connection of FMC-HPC connectors
AD/DA subcards connect storage device with by SATA interface, make it have storage and the processing capacity of big data, pass through ether
Network interface and serial ports carry out high low-speed communication respectively.The FPGA digital signal processing modules can complete the number of 400MHz bandwidth
Signal handling capacity, data sampling rate can reach 2.5GSPS under dual channel mode.Using the conduction type of cooling, power supply and temperature
Degree monitoring, output current can be programmed within the scope of 9.5mA to 34.4mA.Complete machine is using the anticorrosive 3U standard PC cases of oxidation
Encapsulation, FPGA are that opening is programming platform, are suitable for scientific research and teaching demonstration.It to sum up narrates, the utility model solves MIMO
The data processing of radar system and power problems realize the miniaturization of MIMO radar system, can be used in laboratory teaching and drill
Show or field testing.
Embodiment
With reference to figure 1, a kind of all solid state MIMO radar system includes transmitting terminal with multichannel, is connect with transmitting terminal
FMC-DAC subcards, the receiving terminal with multichannel, the FMC-ADC subcards being connect with receiving terminal, digital signal processing module and upper
Machine;The transmitting terminal is connect by FMC-DAC subcards with digital signal processing module;The receiving terminal passes through FMC-ADC subcards
It is connect with digital signal processing module;The host computer is connect with digital signal processing module, for transmitting terminal and receiving terminal
It is controlled;
With reference to figure 2, the transmitting terminal with multichannel include the output control unit being connect successively with FMC-DAC subcards,
Multichannel up-converter module, all solid state power amplifier group and transmission antenna group, for the control instruction of host computer to be passed through FMC-
DAC subcards convert digital signals into after analog signal to be emitted by amplifying emitted antenna to target after upconversion process
Object, and it is mutually orthogonal analog signal that can modulate multi-path digital signal.
With reference to figure 2, it should be noted that for for single pass transmitting terminal, the output control unit preferably counts
Attenuator is controlled, numerical-control attenuator model ATN3580 described in the present embodiment is input to the big of driving amplifier signal for controlling
It is small, to control output power of transmitter.With reference to figure 2, the preferred model ML10220's of up-converter module described in the present embodiment
MARKI products, what the local oscillator end LO of the ML10220 was also associated with high stable has fixed frequency for drive frequency-variable module
Phase locked source, the ADI phase-locked loop frequencies source of the PLLs products of the preferred model ADF5356 of phase locked source, ADI phaselocked loop frequency
Rate source is also circumscribed with stable state crystal oscillator, and for providing basic clock signal for system, a usual system shares a crystal oscillator, just
It keeps synchronizing in each section.The product of the preferred Chinese electricity 13 model TXM07 of section of the stable state crystal oscillator;The all solid state work(
Rate amplifier group is connected with filter, driving amplifier and final power in turn comprising first stage amplifier, the first stage amplifier
Amplifier, first stage amplifier use ADI products, model HMC634, filter model to select marki product F B-0955SM, drive
Section's sea high product during dynamic amplifier uses, model HGC160-1, final power amplifier use ADI solid-state amplifier products,
Model HMC8114, all solid state power amplifier group are connected with transmission antenna group, and by treated, analog signal passes through transmitting day
Line group is transmitted to object, and receiver antenna is passed back again by the reflection signal of object.The transmitting terminal further include for for
The power module that each electric elements are powered in transmitting terminal, the preferred Zhuzhou hongda AC/DC power modules of power module, type
Number be HB180AC4JK02.
It should be noted that the preferred ADI companies AD9129 devices of FMC-DAC subcards described in the present embodiment, described all solid state
Power amplifier group includes all solid state power amplifier module group in 4 tunnels.
With reference to figure 3, the receiving terminal with multichannel include with the sequentially connected intermediate frequency amplifier of FMC-ADC subcards, in
Frequency filter, multichannel down conversion module, filter, low noise amplifier module, limiter and reception antenna group, being used for will be to mesh
Mark object scattering echo-signal received, through noise reduction, down coversion, be filtered amplification after by FMC-ADC subcards will simulate
Signal is converted to digital signal;The receiving terminal further includes AGC automatic growth control modules, the AGC automatic growth controls mould
Block one end is connect with intermediate-frequency filter output end, and the other end is connect with FMC-ADC subcard input terminals, has automatic growth control work(
Energy.
With reference to figure 3, it should be noted that the echo-signal that single-channel receiver is scattered object by reception antenna group
It is handled through limiter, for preventing echo-signal is excessive from burning receiver, the preferred model of limiter described in the present embodiment
The skyworks Products of CLA4601-000;Limiter is connected with low noise amplifier module, passes through low-noise amplifier mould
Block can substantially reduce the system noise of receiver, improve the sensitivity of receiver, the preferred model of low noise amplifier module
Section sea high product in HGC373;It needs to be filtered behind low noise, for inhibiting harmonic wave spurious signal;Filtered signal
Into down conversion module, the MARKI products of the preferred model ML10220 of the present embodiment down conversion module, the down conversion module
Local oscillator end LO with high stable is used to that the phase locked source of frequency-variable module to be driven to be connected, the preferred model of phase locked source described in the present embodiment
The ADI phase-locked loop frequencies source PLLs products of ADF5356, the also external stable state crystal oscillator of the frequency source, the preferred model of stable state crystal oscillator
Electric 13 products of section of China of TXM07;Intermediate frequency filtering processing is carried out after the downconverted processing of echo-signal then through intermediate frequency
Amplifier is amplified;The preferred model SXLP-700+'s of filter and intermediate-frequency filter described in the present embodiment
Minicircuits products, intermediate frequency amplifier described in the present embodiment select the Triquint products of model TQP3M9028;It is described
AGC automatic growth control modulus principle circuit diagrams are shown in Fig. 4.The present embodiment intermediate-freuqncy signal is amplified into FMC-ADC subcards, this implementation
The EV10AQ190A devices of the example preferred E2V companies of FMC-ADC subcards, highest can support 5GSPS sampling rates.The present embodiment
The receiver further includes the power supply module for being powered for receiver transmitting terminal internal electronic component, the power supply mould
The Zhuzhou hongda AC/DC power modules of the preferred model HB393AC4JK01 of block.
Further, with reference to figure 1, the digital signal processing module includes FPGA digital signal processing modules, described
FPGA digital signal processing modules are used for through modulation /demodulation of the digital baseband algorithm to signal, digital filtering processing, described
FPGA digital signal processing modules are connect by digital control interface with host computer.
Further, the digital signal processing module includes the FPGA that chip model is Xilinx Virtex7 690T
Digital signal processing module.
Further, with reference to figure 1, the FPGA digital signal processing modules are onboard, and there are two FMC-HPC connectors, are used for
FMC-ADC and FMC-DAC subcards outside connection;The FPGA digital signal processing modules are onboard serial ports, logical for low speed
Letter;The FPGA digital signal processing modules are additionally provided with ten thousand mbit ethernet interface of multiple gigabits, for host computer and other set
It is standby to carry out high-speed communication.
It should be noted that digital control interface described in the present embodiment includes Ethernet interface, USB2.0/3.0 and RS232
One or more of interface, Ethernet interface are used for the communication with host computer all the way, other interfaces can be used for setting with other sons
Standby high-speed communication.
It should be noted that the samtec of the preferred model ASP-134488-01 of FMC-HPC connectors described in the present embodiment
Products.
Further, the FPGA digital signal processing modules include two groups or more storage unit, are used for
The caching of data, the preferred DDR3 of storage unit, every group of 2GB;The FPGA digital signal processing modules further include that SATA connects
Mouthful, storage device is connected by SATA interface, is used for the storage of a large amount of quantity.
Further, with reference to figure 2, the transmitting terminal with multichannel includes the transmitting terminal that 4 tunnels become frequency link, and is each become
Frequency link can independently carry out switch control;The multichannel up-converter module includes 4 road frequency-variable modules, for each frequency conversion
The input signal of link carries out upconversion process, and input IF frequency is 350MHz~750MHz, and output rf frequency is 10GHz
± 200MHz, saturation output power 40dBm, by intermediate frequency 2GHz ± 200MHz signal frequency conversions to 10GHz ± 200MHz.
Further, the output control unit includes 4 road numerical-control attenuators, is existed for realizing the output power of transmitter
Adjusting between 10-40dBm;The transmission antenna group selects English to join microwave standard gain antenna, model LB-90-15-C-
SF。
It should be noted that in order to realize all solid-state transmitter, the requirement of signal-to-noise ratio is promoted, using Xilinx Virtex7
The FPGA digital signal processing modules of 690T are right by FMC-HPC connectors extension connection FMC-DAC subcards as master control board card
It is followed by the entire transmitting terminal hardware of corresponding radio-frequency transmissions end completion to build, wherein switch control can independently be carried out by each becoming frequency link
System.
It should be noted that there is all solid state MIMO radar system transmitting terminal of multichannel to use Xilinx Virtex7
The FPGA digital signal processing modules of 690T extend connection FMC-DAC subcard groups as master control board card, by FMC-HPC connectors
At the transmitting terminal on 4 tunnels;The Wave data of transmitting directly exists on master control board card;Then it is communicated with host computer so that host computer is complete
It is issued at Wave data and the control of transmitting terminal, and multigroup waveform can be cached in FPGA platform, it is independent to pass through master control board card
Complete waveform selection and transmission.
Further, with reference to figure 3, the receiving terminal with multichannel includes the receiving terminal that 8 tunnels become frequency link;The multichannel
Down conversion module includes 8 tunnel down conversion modules, for carrying out down-converted to each input signal for becoming frequency link, will be inputted
Rf frequency 10GHz ± 200MHz be converted to intermediate frequency 350MHz~750MHz, then export, conversion gain 50dB, Mei Gebian
Frequency link uses automatic growth control;The reception antenna group selects antenna to join microwave wave standard gain antenna, model using English
For LB-90-15-C-SF.
It should be noted that in order to realize the requirement of received signal to noise ratio and big data bandwidth, using Xilinx Virtex7
The FPGA digital signal processing modules of 690T extend connection FMC-ADC subcards as master control board card, by FMC-HPC connectors,
Then it connects the radio frequency reception end entire receiving terminal hardware of completion to build, wherein 8 become frequency links and work at the same time, receives data buffer storage extremely
Then the data of caching are uploaded to host computer by onboard DDR3 by Ethernet, be supplied to user for analyze debugging.
It should be noted that stating all solid state MIMO radar system complete machine described in the present embodiment using the anticorrosive 3U standards of oxidation
Cabinet encapsulates, and FPGA is that opening is programming platform, is suitable for scientific research and teaching demonstration.It needs to receive and dispatch in system described in the present embodiment
Signal bandwidth reach 400MHz, carrier frequency 2GHz, by radio-frequency front-end up-conversion to 10GHz.
All solid state MIMO radar system described in the utility model can realize the target acquisition of 10-2000m, can be used in reality
Test room teaching demonstration or field testing.
It is preferred embodiments of the present invention above, it is noted that for those skilled in the art
For, without departing from the principle of this utility model, several improvements and modifications can also be made, these improvements and modifications
It is considered as the scope of protection of the utility model.