CN207924469U - A kind of the protection circuit and control system of programmable logic chip - Google Patents
A kind of the protection circuit and control system of programmable logic chip Download PDFInfo
- Publication number
- CN207924469U CN207924469U CN201820205010.2U CN201820205010U CN207924469U CN 207924469 U CN207924469 U CN 207924469U CN 201820205010 U CN201820205010 U CN 201820205010U CN 207924469 U CN207924469 U CN 207924469U
- Authority
- CN
- China
- Prior art keywords
- programmable logic
- logic chip
- phase inverter
- protection circuit
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Inverter Devices (AREA)
Abstract
This application discloses the protection circuit and control system of a kind of programmable logic chip, the input terminal of the protection circuit and the output end of central processing element connect；The input terminal of the output end and programmable logic chip of protecting circuit connects；The feedback end of the control terminal and programmable logic chip of protecting circuit connects；It includes the first phase inverter and the second phase inverter to protect circuit; the input terminal of first phase inverter and the output end of central processing element connect; the output end of first phase inverter is connect with the input terminal of the second phase inverter; the output end of second phase inverter and the input terminal of programmable logic chip connect, and the Enable Pin of the Enable Pin of the first phase inverter and the second phase inverter is all connected with the feedback end of programmable logic chip.The application can avoid leading to programmable logic chip loading procedure again since central processing element fails, and then avoid that entire control system is caused to fail, and ensure job safety.
Description
Technical field
This application involves the technical field of Industry Control, it is related to protection circuit and the control system of a kind of programmable logic chip
System.
Background technology
As shown in Figure 1, the control system 10 of the prior art include central processing element 101, programmable logic chip 102 with
And memory 103, central processing element 101 are connect with programmable logic chip 102 and memory 103 respectively, programmable logic
Chip 102 is for backing up central processing element 101, to ensure that control system 10 works normally.
When central processing element 101 works normally, central processing element 101 controls programmable logic by controlling signal
Chip 102 enters loading mode, and the program read from memory 103 loads programmable logic chip 102.In
When processing chip 101 being entreated to fail, the control signal that central processing element 101 exports becomes to survey, and can lead to programmable logic
Chip 102 enters back into loading mode after having loaded program, so that programmable logic chip 102 fails, therefore control system 10
Disabler.
Utility model content
In order to solve the above problem existing for the control system of the prior art, the application provides a kind of programmable logic chip
Protection circuit and control system.
To solve the above problems, the embodiment of the present application provides a kind of protection circuit of programmable logic chip, difference
Connect central processing element and programmable logic chip, the output of the input terminal and the central processing element of the protection circuit
End connection, for receiving first control signal from the central processing element；The output end of the protection circuit is compiled with described
The input terminal of journey logic chip connects；The control terminal of the protection circuit is connect with the feedback end of the programmable logic chip,
Wherein：The protection circuit includes the first phase inverter and the second phase inverter, input terminal and the center of first phase inverter
The output end of processing chip connects, and the output end of first phase inverter is connect with the input terminal of second phase inverter, described
The output end of second phase inverter is connect with the input terminal of the programmable logic chip, the Enable Pin of first phase inverter and institute
The Enable Pin for stating the second phase inverter is all connected with the feedback end of the programmable logic chip.
Wherein, the protection circuit includes first resistor, the control terminal of the protection circuit and the programmable logic core
The feedback end of piece is grounded by the first resistor.
Wherein, in the programmable logic chip loading procedure, the control terminal of the protection circuit may be programmed from described
The feedback end of logic chip receives the first feedback signal, and the protection circuit is according to first feedback signal by described first
Control signal is sent to the programmable logic chip, and the programmable logic chip is according to the first control signal from described
Central processing element receives described program, and loads described program.
Wherein, after the programmable logic chip loading procedure, the control terminal of the protection circuit may be programmed from described
The feedback end of logic chip receives the second feedback signal, and the protection circuit is according to two feedback signal and first control
Signal processed generates second control signal, and the programmable logic chip receives the second control signal, according to described second
Signal is controlled to stop receiving described program.
Wherein, in the programmable logic chip loading procedure, the first control signal be low level, described first
Feedback signal is low level, first phase inverter and second inverters work, and the output end of second phase inverter is defeated
Go out low level；After the completion of the programmable logic chip loading procedure, second feedback signal be high level, described first
Phase inverter and second phase inverter are stopped.
In order to solve the above technical problems, another technical solution that the application uses is：A kind of control system is provided, until
Include less：Memory, for storing program；Central processing element is connect with the memory；Protect circuit, the protection electricity
The input terminal on road is connect with the output end of the central processing element, for receiving the first control letter from the central processing element
Number；The output end of programmable logic chip, the protection circuit is connect with the input terminal of the programmable logic chip, the guarantor
The control terminal of protection circuit is connect with the feedback end of the programmable logic chip；The protection circuit includes the first phase inverter and the
The input terminal of two phase inverters, first phase inverter is connect with the output end of the central processing element, first phase inverter
Output end connect with the input terminal of second phase inverter, the output end of second phase inverter and the programmable logic core
The input terminal of piece connects, and the Enable Pin of the Enable Pin of first phase inverter and second phase inverter is all connected with described may be programmed
The feedback end of logic chip.
Wherein, the protection circuit includes first resistor, the control terminal of the protection circuit and the programmable logic core
The feedback end of piece is grounded by the first resistor.
Wherein, in the programmable logic chip loading procedure, the control terminal of the protection circuit may be programmed from described
The feedback end of logic chip receives the first feedback signal, and the protection circuit is according to first feedback signal by described first
Control signal is sent to the programmable logic chip, and the programmable logic chip is according to the first control signal from described
Central processing element receives described program, and loads described program.
Wherein, after the programmable logic chip loading procedure, the control terminal of the protection circuit may be programmed from described
The feedback end of logic chip receives the second feedback signal, and the protection circuit is according to two feedback signal and first control
Signal processed generates second control signal, and the programmable logic chip receives the second control signal, according to described second
Signal is controlled to stop receiving described program.
Wherein, in the programmable logic chip loading procedure, the first control signal be low level, described first
Feedback signal is low level, first phase inverter and second inverters work, and the output end of second phase inverter is defeated
Go out low level；After the completion of the programmable logic chip loading procedure, second feedback signal be high level, described first
Phase inverter and second phase inverter are stopped.
Compared with prior art, which is separately connected central processing element and programmable logic chip, protection electricity
The input terminal on road and the output end of central processing element connect, for receiving first control signal from central processing element；Protection
The output end of circuit and the input terminal of programmable logic chip connect；Protect circuit control terminal and programmable logic chip it is anti-
Present end connection；It includes the first phase inverter and the second phase inverter, the input terminal and central processing element of the first phase inverter to protect circuit
Output end connection, the output end of the first phase inverter connect with the input terminal of the second phase inverter, the output end of the second phase inverter and
The Enable Pin of the input terminal connection of programmable logic chip, the Enable Pin of the first phase inverter and the second phase inverter is all connected with programmable
The feedback end of logic chip；After the completion of programmable logic chip loading procedure, protect the control terminal of circuit from programmable logic
The feedback end of chip receives the second feedback signal, and the first phase inverter is stopped with the second phase inverter, programmable logic chip
Stop receiving program, can avoid leading to programmable logic chip loading procedure again since central processing element fails, into
And avoid that entire control system is caused to fail, ensure job safety.
Description of the drawings
In order to more clearly explain the technical solutions in the embodiments of the present application, it is adopted required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present application, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.Wherein：
Fig. 1 is the block schematic illustration of the control system of the prior art；
Fig. 2 is the block schematic illustration of the control system of the application first embodiment；
Fig. 3 is the circuit diagram that circuit is protected in Fig. 2.
Specific implementation mode
With reference to the accompanying drawings and examples, the application is described in further detail.It is emphasized that following implement
Example is merely to illustrate the application, but is not defined to scope of the present application.Likewise, following embodiment is only the portion of the application
Point embodiment and not all embodiments, the institute that those of ordinary skill in the art are obtained without creative efforts
There are other embodiments, shall fall in the protection scope of this application.
Term " first ", " second ", " third " " in the description and claims of this application and above-mentioned attached drawing
The (if present)s such as four " are for distinguishing similar object, without being used to describe specific sequence or precedence.It should manage
The data that solution uses in this way can be interchanged in the appropriate case, so as to embodiments herein described herein, such as can be with
Sequence other than those of illustrating or describing herein is implemented.In addition, term " comprising " and " having " and their times
What is deformed, it is intended that cover it is non-exclusive include, for example, contain the process of series of steps or unit, method, system,
Product or equipment those of are not necessarily limited to clearly to list step or unit, but may include not listing clearly or for
The intrinsic other steps of these processes, method, product or equipment or unit.
Shown in Figure 2, Fig. 2 is the block schematic illustration of the control system of the application first embodiment.The present embodiment institute
The protection circuit 21 of announcement is applied to control system 20, and protection circuit 21 is separately connected the central processing element 22 of control system 20
With programmable logic chip 23.Wherein, the control system 20 of the application can be applied in industrial robot, for controlling industrial machine
Device people；Since industrial robot needs to work under complicated electromagnetic environment, and control system 20 is believed by serious electromagnetism
Number interference when, the central processing element 22 of control system 20 may be caused to fail.Therefore, the application protects circuit 21 by setting
It protects programmable logic chip 23 by other effect of signals, not fail to avoid programmable logic chip 23, and then ensures operation
Safety.
Wherein, the input terminal 211 of protection circuit 21 is connect with the output end 221 of central processing element 22, is used for from center
Processing chip 22 receives first control signal；Protect the input terminal 231 of the output end 212 and programmable logic chip 23 of circuit 21
The control terminal 213 of connection, protection circuit 21 is connect with the feedback end 232 of programmable logic chip 23, is used for from programmable logic
Chip 23 receives feedback signal.Since programmable logic chip 23 does not have memory, programmable logic chip 23 is in power down
In the case of can not save routine, and then programmable logic chip 23 is needed after the power is turned on from external load program every time.Wherein, in
First output end 222 of centre processing chip 22 is connect with the first input end 233 of programmable logic chip 23；In control system 20
After the power is turned on, central processing element 22 by the first input end 233 of the first output end 222 and programmable logic chip 23 by program
It is sent to programmable logic chip 23, programmable logic chip 23 loads the program.
The operation principle of protection circuit 21 described in detail below：
In 23 loading procedure of programmable logic chip, protection circuit 21 obtains the first control letter from central processing element 22
Number and obtain the first feedback signal from programmable logic chip 23, and first control signal is sent to according to the first feedback signal
Programmable logic chip 23, programmable logic chip 23 is according to first control signal loading procedure, i.e., in programmable logic chip
After 23 input terminal 231 receives first control signal, central processing element 22 passes through the first output end 222 and programmable logic
Program is sent to programmable logic chip 23,23 loading procedure of programmable logic chip by the first input end 233 of chip 23.
Wherein, the first feedback signal is the first level.
After the completion of 23 loading procedure of programmable logic chip, protection circuit 21 obtains second from programmable logic chip 23
Feedback signal, and second control signal is generated according to the second feedback signal and first control signal, programmable logic chip 23
Input terminal 231 receives second control signal, and programmable logic chip 23 controls first input end 233 according to second control signal
Stop receiving the program that the first output end 222 of central processing element 22 is sent.Wherein, the second feedback signal is second electrical level.
Control system 20 further comprises that memory 24, central processing element 22 are connect with memory 24, and memory 24 is used
In storage above procedure.In 23 loading procedure of programmable logic chip, central processing element 22 obtains program from memory 24.
In addition, central processing element 22 can also include online upgrade port 223, the online upgrading of central processing element 22
Port 223 is connect with server 25, and in 23 loading procedure of programmable logic chip, central processing element 22 can be by rising online
Grade port 223 obtains the online upgrading packet of program from server 25, and programmable logic chip 23 is received from central processing element 22
To online upgrading packet, and the root online upgrading packet realizes online upgrading to program.
The application after the completion of 23 loading procedure of programmable logic chip, the input terminal 231 of programmable logic chip 23 from
Protection circuit 21 receives second control signal, and programmable logic chip 23 controls first input end according to second control signal
233 stop receiving the program that the first output end 222 of central processing element 22 is sent, and avoid failing due to central processing element 22
And lead to the loading procedure again of programmable logic chip 23, it avoids that entire control system 20 is caused to fail, ensures job safety.
As shown in figure 3, the revealed protection circuit 21 of the present embodiment includes first resistor R1, the first phase inverter 45 and second
The input terminal 451 of phase inverter 46, the first phase inverter 45 is the input terminal 211 for protecting circuit 21, the Enable Pin of the first phase inverter 45
453 and second the Enable Pin 463 of phase inverter 46 be to protect the control terminal 213 of circuit 21, the output end 462 of the second phase inverter 46 is
Protect the output end 212 of circuit 21.
Wherein, the input terminal 451 of the first phase inverter 45 is connect with the output end 221 of central processing element 22, the first reverse phase
The output end 452 of device 45 is connect with the input terminal 461 of the second phase inverter 46, the output end 462 of the second phase inverter 46 with it is programmable
The input terminal 231 of logic chip 23 connects, and the Enable Pin 463 of the Enable Pin 453 of the first phase inverter 45 and the second phase inverter 46 is equal
It is connect with the feedback end 232 of programmable logic chip 23, the feedback of one end connection programmable logic chip 23 of first resistor R1
End 232, the other end ground connection of first resistor R1.
In 23 loading procedure of programmable logic chip, the feedback end 232 of programmable logic chip 23 is in high-impedance state, i.e.,
The feedback end 232 of programmable logic chip 23 neither exports high level nor exports low level；Programmable logic chip 23 at this time
Feedback end 232 be grounded by first resistor R1, the first feedback signal that the feedback end 232 of programmable logic chip 23 exports is
Low level, the first phase inverter 45 and the work of the second phase inverter 46；The first control that the output end 221 of central processing element 22 exports
Signal is low level, then the output end 452 of the first phase inverter 45 exports high level, and the output end 462 of the second phase inverter 46 exports
Low level is protected circuit 21 that first control signal is sent to programmable logic chip 23 according to the first feedback signal, can be compiled
Journey logic chip 23 receives program by first input end 233 according to first control signal from central processing element 22, can compile
23 loading procedure of journey logic chip.
After the completion of 23 loading procedure of programmable logic chip, the feedback end 232 of programmable logic chip 23 exports high electricity
Flat, i.e. the second feedback signal is high level, and the first phase inverter 45 and the second phase inverter 46 are stopped at this time, programmable logic core
The input terminal 231 of piece 23 is hanging, i.e., second control signal is high level；Programmable logic chip 23 is according to second control signal control
First input end 233 processed stops receiving the program that the first output end 222 of central processing element 22 is sent, and avoids due to centre
Reason chip 22 fails and leads to the loading procedure again of programmable logic chip 23, avoids that entire control system 20 is caused to fail, protects
Demonstrate,prove job safety.
The application further provides for a kind of control system, as shown in Fig. 2, the revealed control system of the present embodiment 20 includes
Memory 24, central processing element 22, protection circuit 21 and programmable logic chip 23, wherein central processing element 22 with deposit
Reservoir 24 connects, and protection circuit 21 is connect with central processing element 22 and programmable logic chip 23 respectively, the protection circuit 21
For the protection circuit of above-described embodiment, details are not described herein.
In conclusion the protection circuit of the application is separately connected central processing element and programmable logic chip, protection electricity
The input terminal on road and the output end of central processing element connect, for receiving first control signal from central processing element；Protection
The output end of circuit and the input terminal of programmable logic chip connect；Protect circuit control terminal and programmable logic chip it is anti-
Present end connection；It includes the first phase inverter and the second phase inverter, the input terminal and central processing element of the first phase inverter to protect circuit
Output end connection, the output end of the first phase inverter connect with the input terminal of the second phase inverter, the output end of the second phase inverter and
The Enable Pin of the input terminal connection of programmable logic chip, the Enable Pin of the first phase inverter and the second phase inverter is all connected with programmable
The feedback end of logic chip；After the completion of programmable logic chip loading procedure, protect the control terminal of circuit from programmable logic
The feedback end of chip receives the second feedback signal, and the first phase inverter is stopped with the second phase inverter, programmable logic chip
Stop receiving program, can avoid leading to programmable logic chip loading procedure again since central processing element fails, into
And avoid that entire control system is caused to fail, ensure job safety.
It should be noted that the above various embodiments belongs to same inventive concept, the description of each embodiment emphasizes particularly on different fields,
Not detailed place, can refer to the description in other embodiment described in separate embodiment.
The foregoing is merely presently filed embodiments, are not intended to limit the scope of the claims of the application, every to utilize this
Equivalent structure or equivalent flow shift made by application specification and accompanying drawing content, it is relevant to be applied directly or indirectly in other
Technical field includes similarly in the scope of patent protection of the application.
Claims (10)
1. a kind of protection circuit of programmable logic chip, which is characterized in that the protection circuit is separately connected central processing core
Piece and programmable logic chip, it is described protection circuit input terminal connect with the output end of the central processing element, be used for from
The central processing element receives first control signal；The output end of the protection circuit is defeated with the programmable logic chip
Enter end connection；The control terminal of the protection circuit is connect with the feedback end of the programmable logic chip, wherein：
The protection circuit includes the first phase inverter and the second phase inverter, input terminal and the centre of first phase inverter
The output end connection of chip is managed, the output end of first phase inverter connect with the input terminal of second phase inverter, and described the
The output end of two phase inverters is connect with the input terminal of the programmable logic chip, the Enable Pin of first phase inverter and described
The Enable Pin of second phase inverter is all connected with the feedback end of the programmable logic chip.
2. protection circuit according to claim 1, which is characterized in that the protection circuit includes first resistor, the guarantor
The feedback end of the control terminal of protection circuit and the programmable logic chip is grounded by the first resistor.
3. protection circuit according to claim 2, which is characterized in that in the programmable logic chip loading procedure,
The control terminal of the protection circuit receives the first feedback signal, the protection electricity from the feedback end of the programmable logic chip
The first control signal is sent to the programmable logic chip by road according to first feedback signal, and described may be programmed is patrolled
It collects chip and described program is received from the central processing element according to the first control signal, and load described program.
4. protection circuit according to claim 3, which is characterized in that after the programmable logic chip loading procedure,
The control terminal of the protection circuit receives the second feedback signal, the protection electricity from the feedback end of the programmable logic chip
Road generates second control signal according to two feedback signal and the first control signal, and the programmable logic chip receives
To the second control signal, stopped receiving described program according to the second control signal.
5. protection circuit according to claim 4, which is characterized in that in the programmable logic chip loading procedure,
The first control signal is low level, and first feedback signal is low level, and first phase inverter and described second is instead
Phase device works, and the output end of second phase inverter exports low level；After the completion of the programmable logic chip loading procedure,
Second feedback signal is high level, and first phase inverter and second phase inverter are stopped.
6. a kind of control system, which is characterized in that the control system includes at least：
Memory, for storing program；
Central processing element is connect with the memory；
Circuit, the input terminal of the protection circuit is protected to connect, be used for from described with the output end of the central processing element
Processing chip is entreated to receive first control signal；
The output end of programmable logic chip, the protection circuit is connect with the input terminal of the programmable logic chip, described
The control terminal of protection circuit is connect with the feedback end of the programmable logic chip；
The protection circuit includes the first phase inverter and the second phase inverter, input terminal and the centre of first phase inverter
The output end connection of chip is managed, the output end of first phase inverter connect with the input terminal of second phase inverter, and described the
The output end of two phase inverters is connect with the input terminal of the programmable logic chip, the Enable Pin of first phase inverter and described
The Enable Pin of second phase inverter is all connected with the feedback end of the programmable logic chip.
7. control system according to claim 6, which is characterized in that the protection circuit includes first resistor, the guarantor
The feedback end of the control terminal of protection circuit and the programmable logic chip is grounded by the first resistor.
8. control system according to claim 7, which is characterized in that in the programmable logic chip loading procedure,
The control terminal of the protection circuit receives the first feedback signal, the protection electricity from the feedback end of the programmable logic chip
The first control signal is sent to the programmable logic chip by road according to first feedback signal, and described may be programmed is patrolled
It collects chip and described program is received from the central processing element according to the first control signal, and load described program.
9. control system according to claim 8, which is characterized in that after the programmable logic chip loading procedure,
The control terminal of the protection circuit receives the second feedback signal, the protection electricity from the feedback end of the programmable logic chip
Road generates second control signal according to two feedback signal and the first control signal, and the programmable logic chip receives
To the second control signal, stopped receiving described program according to the second control signal.
10. control system according to claim 9, which is characterized in that in the programmable logic chip loading procedure,
The first control signal is low level, and first feedback signal is low level, and first phase inverter and described second is instead
Phase device works, and the output end of second phase inverter exports low level；After the completion of the programmable logic chip loading procedure,
Second feedback signal is high level, and first phase inverter and second phase inverter are stopped.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820205010.2U CN207924469U (en) | 2018-02-02 | 2018-02-02 | A kind of the protection circuit and control system of programmable logic chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820205010.2U CN207924469U (en) | 2018-02-02 | 2018-02-02 | A kind of the protection circuit and control system of programmable logic chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207924469U true CN207924469U (en) | 2018-09-28 |
Family
ID=63603457
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820205010.2U Active CN207924469U (en) | 2018-02-02 | 2018-02-02 | A kind of the protection circuit and control system of programmable logic chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207924469U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109313427A (en) * | 2018-02-02 | 2019-02-05 | 深圳配天智能技术研究院有限公司 | A kind of the protection circuit and control system of programmable logic chip |
-
2018
- 2018-02-02 CN CN201820205010.2U patent/CN207924469U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109313427A (en) * | 2018-02-02 | 2019-02-05 | 深圳配天智能技术研究院有限公司 | A kind of the protection circuit and control system of programmable logic chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106339058B (en) | Dynamic manages the method and system of power supply | |
| CN105677420A (en) | Method and device for interface pin configuration | |
| CN109313427A (en) | A kind of the protection circuit and control system of programmable logic chip | |
| CN105137755B (en) | A kind of adaptive distribution method of unmanned plane task load | |
| CN107038104A (en) | A kind of method of remote monitoring isomery accelerator card | |
| CN102646044A (en) | System and method for loading programs for multiple touch screens | |
| US10146265B1 (en) | Main board slot power control circuit | |
| CN207924469U (en) | A kind of the protection circuit and control system of programmable logic chip | |
| CN207924467U (en) | A kind of the protection circuit and control system of programmable logic chip | |
| US20130116804A1 (en) | Method for automatically transferring a configuration of an automation device during replacement of an automation device | |
| CN107546857A (en) | The test system and method for energy-storage system | |
| CN207924500U (en) | A kind of the protection circuit and control system of programmable logic chip | |
| CN207924468U (en) | A kind of the protection circuit and control system of programmable logic chip | |
| CN113184507A (en) | Stepping control method, device and equipment for photovoltaic module and storage medium | |
| DE112012006155B4 (en) | Method and device for reporting the available battery power | |
| CN107544340A (en) | The data acquisition controller of train | |
| CN111400136A (en) | Server-dedicated GPU fault protection device, method, equipment and medium | |
| CN109783286A (en) | Built-in test method, test device and terminal device and storage medium | |
| CN110376518A (en) | Diagnostic device, the system and method for high-voltage relay | |
| CN109558179A (en) | Program code on-line loaded method, program code online upgrading method and system | |
| CN107219407A (en) | A kind of inductance online test method and device | |
| CN114285694A (en) | Fuel cell system and CAN network terminal resistor circuit thereof | |
| CN209525578U (en) | A kind of safety governor | |
| CN112650099A (en) | Control method and control system of battery monitoring platform | |
| CN111027104A (en) | Method, device and mainboard for preventing loss of network card identification data |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |