CN207909882U - A kind of thin film transistor (TFT), array substrate and display device - Google Patents
A kind of thin film transistor (TFT), array substrate and display device Download PDFInfo
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- CN207909882U CN207909882U CN201820380758.6U CN201820380758U CN207909882U CN 207909882 U CN207909882 U CN 207909882U CN 201820380758 U CN201820380758 U CN 201820380758U CN 207909882 U CN207909882 U CN 207909882U
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Abstract
The utility model discloses a kind of thin film transistor (TFT), array substrate and display device, belongs to technical field of display panel.Thin film transistor (TFT) includes channel layer, and the channel layer includes at least two channel regions and source-drain area；The both ends of all channel regions are connect with the source-drain area respectively, and at least two raceway groove accesses are collectively formed with the source-drain area in all channel regions.By the utility model, the electrical property change amount of thin film transistor (TFT) entirety is reduced, to reduce the uneven probability of happening of display, and the reliability of thin film transistor (TFT) can be improved.
Description
Technical field
The utility model is related to a kind of technical field of display panel more particularly to thin film transistor (TFT), array substrate and displays
Device.
Background technology
Compared with traditional liquid crystal display panel, flexible display apparatus has many advantages, such as that flexibility is pliable, has wider
Application market.
There is thin film transistor (TFT) on the viewing area of flexible display apparatus, the raceway groove in conventional thin film transistor in vertical bar shape and
An only raceway groove, when extending direction of the overbending direction of flexible display apparatus perpendicular to straight strip channel, it is easy to cause
The raceway groove of thin film transistor (TFT) is broken, and thin film transistor (TFT) is caused to can not work normally.Even if not being broken, when vertical bar raceway groove is answered
Power deforms upon, and also the electrical characteristics of thin film transistor (TFT) can be caused to morph, the phenomenon for causing display uneven.Although some technologies
Raceway groove in thin film transistor (TFT) is designed to zigzag, U-shaped or S fonts by personnel, but due to still there was only a raceway groove, by
When stress variation, difference caused by film electrical property change can not compensate, therefore there are still the uneven phenomenons of display.
Utility model content
To solve the above-mentioned problems, a kind of thin film transistor (TFT) of the utility model offer, array substrate and display device, can
Reduce the uneven probability occurred of display.
To achieve the above object, described in a first aspect, the utility model provides a kind of thin film transistor (TFT), including channel layer
Channel layer includes at least two channel regions and source-drain area；
The both ends of all channel regions are connect with the source-drain area respectively, and all channel regions and the source-drain area
At least two raceway groove accesses are collectively formed.
Optionally, the channel layer includes two channel regions, two channel region interconnections, two channel regions
Two raceway groove accesses are collectively formed with the source-drain area.
Optionally, two channel regions are mutually perpendicular to.
Optionally, further include：
Grid layer is set to above the channel layer, and the grid layer covers institute in the orthographic projection on the channel layer
There is the channel region and does not cover the source-drain area.
Optionally, at least two channel regions are mutually not attached to.
Optionally, further include：
Grid layer is set to above the channel layer, and the grid layer covers institute in the orthographic projection on the channel layer
There is the channel region and does not cover the source-drain area；
The channel layer includes four channel regions, and four channel regions are mutually not attached to, four channel regions with it is described
Two raceway groove accesses are collectively formed in source-drain area, and the grid layer is in cross, and the channel layer is in hollow rectangle.
Optionally, further include：
Grid layer is set to above the channel layer, and the grid layer covers institute in the orthographic projection on the channel layer
There is the channel region and does not cover the source-drain area；
The channel layer includes four channel regions, and four channel regions are mutually not attached to, four channel regions with it is described
Source-drain area is collectively formed two raceway groove accesses, and the grid layer is in hollow rectangle, and four channel regions are towards the hollow rectangle
Center position extension line intersection in cross.
Optionally, the source-drain area includes source contact hole and misses contact hole, and the source contact hole is used to connect source electrode,
The contact hole of missing is for connecting drain electrode.
Second aspect, the utility model provide a kind of array substrate, including thin film transistor (TFT) described above.
The third aspect, the utility model provide a kind of display device, including above-mentioned array substrate.
Compared with prior art, the utility model provides thin film transistor (TFT), including channel layer, and channel layer includes at least two
The both ends of channel region and source-drain area, all channel regions are connect with source-drain area respectively, and all channel regions and source-drain area are common
Form at least two raceway groove accesses.By using Redundancy Design, when thin film transistor (TFT) is bent, raceway groove to the raceway groove on channel layer
The stress that layer is subject to is dispersed on a plurality of raceway groove, reduces the risk of raceway groove fracture, while what is be subject on a plurality of raceway groove answers range
It spends inconsistent, causes the variation of electrical characteristics different, a part of difference can be mutually compensated for, it is special to reduce the whole electricity of thin film transistor (TFT)
Property variable quantity, to reduce the uneven probability of happening of display, even if in addition raceway groove is broken, as long as also having two or more ditches
Road is unbroken to make thin film transistor (TFT) also have at least one complete raceway groove access so that thin film transistor (TFT) can continue to work
Make, the reliability of thin film transistor (TFT) is improved with this.
Description of the drawings
Attached drawing described herein is used to provide a further understanding of the present invention, and constitutes one of the utility model
Point, the exemplary embodiment of the utility model and the description thereof are used to explain the utility model, does not constitute to the utility model
Improper restriction.In the accompanying drawings：
Fig. 1 is the structural schematic diagram for the thin film transistor (TFT) that one embodiment of the utility model provides；
Fig. 2 is the structural schematic diagram for the thin film transistor (TFT) that another embodiment of the utility model provides；
Fig. 3 is the structural schematic diagram for the thin film transistor (TFT) that the utility model another embodiment provides.
Specific implementation mode
It is specific below in conjunction with the utility model to keep the purpose of this utility model, technical solution and advantage clearer
Technical solutions of the utility model are clearly and completely described in embodiment and corresponding attached drawing.Obviously, described embodiment
Only it is the utility model a part of the embodiment, instead of all the embodiments.Based on the embodiments of the present invention, this field
The every other embodiment that those of ordinary skill is obtained without making creative work, belongs to the utility model
The range of protection.
Thin film transistor (TFT) provided by the utility model includes channel layer, and channel layer includes at least two channel regions and source and drain
Area；The both ends of all channel regions are connect with source-drain area respectively, and at least two raceway grooves are collectively formed with source-drain area in all channel regions
Access.If at this point, forming the raceway groove fracture of any bar raceway groove access, remaining raceway groove still is able to form connection source-drain area at least
One raceway groove access, then it is logical still to be able to be formed the raceway groove that can be connected between source electrode and drain electrode for source-drain area and remaining raceway groove
Road so that thin film transistor (TFT) can work normally.By using Redundancy Design to the raceway groove on channel layer, when thin film transistor (TFT) is curved
When folding, as long as there is the raceway groove at least one raceway groove access not to be broken, it will be able to so that channel layer one-way conduction, with driving
Thin film transistor (TFT) works normally.
In an embodiment of the utility model, thin film transistor (TFT) can also include grid layer, and grid layer is set to ditch
Above channel layer, and grid layer covers all channel regions in the orthographic projection on channel layer and does not cover source-drain area.Further, grid layer
Shape can be identical as the shape of channel region.
Fig. 1 is the structural schematic diagram for the thin film transistor (TFT) that one embodiment of the utility model provides；Fig. 2 is that the utility model is another
The structural schematic diagram for the thin film transistor (TFT) that one embodiment provides；Fig. 3 is the film crystal that the utility model another embodiment provides
The structural schematic diagram of pipe.Illustrate thin film transistor (TFT) provided by the utility model below in conjunction with Fig. 1 to Fig. 3.
In an embodiment of the utility model, thin film transistor (TFT) includes channel layer and grid layer, and channel layer includes
Two channel regions and source-drain area, the both ends of two channel regions are connected with source-drain area respectively, two channel region interconnections, two bar ditch
Two raceway groove accesses are collectively formed with source-drain area in road area.Preferably, two channel regions are mutually perpendicular to, in this way, working as thin film transistor (TFT)
When laterally bending or longitudinal direction bend work, always there is a raceway groove to be parallel to overbending direction, this raceway groove is by the stress bent
It is smaller, thus curent change is smaller, preferably reduces the electrical property change amount of thin film transistor (TFT) entirety, and then reduce display
Uneven probability of happening.
Preferably, as shown in Figure 1, thin film transistor (TFT) includes channel layer and grid layer 12, channel layer includes two raceway grooves
The both ends of area 111,112 and source-drain area 115, two channel regions 111,112 are connected with source-drain area 115 respectively, two channel regions
111,112 middle section interconnection, and two channel regions 111,112 are mutually perpendicular to, grid layer 12 is rectangular, two raceway grooves
Two raceway groove accesses are collectively formed with source-drain area 115 in area 111,112.Specifically, channel region 111 forms one with source-drain area 115
Raceway groove access, channel region 112 form another raceway groove access with source-drain area 115.In such manner, it is possible to reduce the technique of thin film transistor (TFT)
Manufacture difficulty, and when laterally bending or longitudinal direction bend work to thin film transistor (TFT), always there is a raceway groove to be parallel to overbending direction, this
One raceway groove is smaller by the stress bent, thus curent change is smaller, and it is special preferably to reduce the whole electricity of thin film transistor (TFT)
Property variable quantity, and then reduce the uneven probability of happening of display.
It will be appreciated by persons skilled in the art that in another embodiment of the utility model, two channel regions
111, it 112 can not also be mutually perpendicular to, for example, two channel regions 111,112 are in X-type, grid layer 12 can also be in other shapes；
In another embodiment of the utility model, the wherein raceway groove so that in two channel regions 111,112 can also be designed
One end of the one end in area with another channel region or the partial intersection in addition to end.
In an embodiment of the utility model, at least two channel regions are mutually not attached to.
In an embodiment of the utility model, thin film transistor (TFT) includes channel layer and grid layer, and channel layer includes
Four channel regions and source-drain area, the both ends of four channel regions are connected with source-drain area respectively, and four channel regions are mutually not attached to, four
Two raceway groove accesses are collectively formed with source-drain area in channel region.It is illustrated below in conjunction with Fig. 2, Fig. 3.
Preferably, as shown in Figure 2 and Figure 3, thin film transistor (TFT) includes channel layer and grid layer 22, channel layer includes four
Channel region 211,212,213,214 and source-drain area 215, the both ends of four channel regions 211,212,213,214 respectively with source and drain
Area 215 is connected, and four channel regions 211,212,213,214 are mutually not attached to, four channel regions 211,212,213,214 and source-drain area
215 are collectively formed two raceway groove accesses.Certainly, in practical applications, channel layer can also include two channel regions, three raceway grooves
Area or five channel regions, illustrate, the both ends of three channel regions are connected with source-drain area respectively, and three by taking three channel regions as an example
Channel region is mutually not attached to, and two raceway groove accesses are collectively formed with source-drain area in three channel regions, for example, for example, three channel regions
Including the channel region 211,212,213 in Fig. 2 or Fig. 3, then, channel region 211 forms a raceway groove access, ditch with source-drain area 215
Road area 212,213 forms another raceway groove access with source-drain area 215.
Specifically, as shown in Fig. 2, grid layer 22 is in cross, channel layer is in hollow rectangle, and channel layer can be in specifically mouth
Font, channel region 211,214 form a raceway groove access with source-drain area 215, and channel region 212,213 is formed separately with source-drain area 215
One raceway groove access.In such manner, it is possible to reduce the technique manufacture difficulty of thin film transistor (TFT).
It will be appreciated by persons skilled in the art that in another embodiment of the utility model, channel layer can also
In other shapes, for example, assuming diamond in shape, grid layer 22 can also be in other shapes.
Specifically, as shown in figure 3, grid layer 22 is in hollow rectangle, four channel regions 211,212,213,214 are towards hollow square
The extension line intersection of the center position of shape is in cross, in such manner, it is possible to reduce the technique manufacture difficulty of thin film transistor (TFT).For figure
Two raceway groove accesses of thin film transistor (TFT) shown in 3, formation are specifically as follows：Channel region 211,214 forms one with source-drain area 215
Raceway groove access, channel region 212,213 forms another raceway groove access with source-drain area 215, alternatively, channel region 211,213 and source
Drain region 215 forms a raceway groove access, and channel region 212,214 forms another raceway groove access with source-drain area 215.
When channel region 211,213 and source-drain area 215 form a raceway groove access, channel region 212,214 and 215 shape of source-drain area
When at another raceway groove access, if thin film transistor (TFT) laterally bending or longitudinal bending work, always has a raceway groove access corresponding
Two raceway grooves are parallel to overbending direction, this two raceway grooves are smaller by the stress bent, thus curent change is smaller, preferably drops
The low electrical property change amount of thin film transistor (TFT) entirety, and then reduce the uneven probability of happening of display.
It will be appreciated by persons skilled in the art that in another embodiment of the utility model, grid layer 22 also may be used
To be in other shapes, for example, assuming diamond in shape.
In an embodiment of the utility model, source-drain area 115,215 includes source contact hole and misses contact hole, is such as schemed
1 to shown in Fig. 3, and source-drain area 115,215 includes source contact hole 131 and misses contact hole 132, and source contact hole 131 is for connecting source
Electrode misses contact hole 132 for connecting drain electrode.It will be appreciated by persons skilled in the art that in the another of the utility model
In embodiment, above-mentioned 131 may be to miss contact hole, and above-mentioned 132 may be source contact hole.
Above-mentioned thin film transistor (TFT) can also include：Substrate and gate dielectric layer set gradually above-mentioned channel layer on substrate, grid are situated between
Matter layer and grid layer.
The utility model provides thin film transistor (TFT), including channel layer, and channel layer includes at least two channel regions and source-drain area,
The both ends of all channel regions are connect with source-drain area respectively, and at least two raceway grooves are collectively formed with source-drain area in all channel regions
Access.By using Redundancy Design to the raceway groove on channel layer, when thin film transistor (TFT) is bent, the stress that channel layer is subject to disperses
On a plurality of raceway groove, reduce the risk of raceway groove fracture, while the stress levels being subject on a plurality of raceway groove are inconsistent, leads to electric spy
Property variation it is different, a part of difference can be mutually compensated for, reduce the electrical property change amount of thin film transistor (TFT) entirety, shown with reducing
Show uneven probability of happening, even if in addition raceway groove is broken, as long as also have two or more raceway groove it is unbroken as long as can make it is thin
Film transistor also has at least one complete raceway groove access so that thin film transistor (TFT) can continue to work, and film is improved with this
The reliability of transistor.
One embodiment of the utility model provides a kind of array substrate, which has above-mentioned thin film transistor (TFT).
Another exemplary embodiment of the utility model provides a kind of display device, which has above-mentioned array
Substrate.
Above-described specific example has carried out further the purpose of this utility model, technical solution and advantageous effect
It is described in detail, it should be understood that the foregoing is merely specific embodiment of the utility model, is not limited to this reality
With novel, within the spirit and principle of the utility model, any modification, equivalent substitution, improvement and etc. done should all include
It is within the protection scope of the utility model.
Claims (10)
1. a kind of thin film transistor (TFT), which is characterized in that including channel layer, the channel layer includes at least two channel regions and source and drain
Area；
The both ends of all channel regions are connect with the source-drain area respectively, and all channel regions and the source-drain area are common
Form at least two raceway groove accesses.
2. thin film transistor (TFT) according to claim 1, which is characterized in that the channel layer includes two channel regions, described
Two raceway groove accesses are collectively formed with the source-drain area in two channel region interconnections, two channel regions.
3. thin film transistor (TFT) according to claim 2, which is characterized in that two channel regions are mutually perpendicular to.
4. thin film transistor (TFT) according to claim 2, which is characterized in that further include：
Grid layer is set to above the channel layer, and the grid layer covers all institutes in the orthographic projection on the channel layer
It states channel region and does not cover the source-drain area.
5. thin film transistor (TFT) according to claim 1, which is characterized in that at least two channel regions are mutually not attached to.
6. thin film transistor (TFT) according to claim 5, which is characterized in that further include：
Grid layer is set to above the channel layer, and the grid layer covers all institutes in the orthographic projection on the channel layer
It states channel region and does not cover the source-drain area；
The channel layer includes four channel regions, and four channel regions are mutually not attached to, four channel regions and the source and drain
Two raceway groove accesses are collectively formed in area, and the grid layer is in cross, and the channel layer is in hollow rectangle.
7. thin film transistor (TFT) according to claim 5, which is characterized in that further include：
Grid layer is set to above the channel layer, and the grid layer covers all institutes in the orthographic projection on the channel layer
It states channel region and does not cover the source-drain area；
The channel layer includes four channel regions, and four channel regions are mutually not attached to, four channel regions and the source and drain
Area is collectively formed two raceway groove accesses, and the grid layer is in hollow rectangle, and four channel regions are towards in the hollow rectangle
The extension line intersection in heart direction is in cross.
8. thin film transistor (TFT) according to claim 1, which is characterized in that the source-drain area includes source contact hole and misses
Contact hole, the source contact hole is for connecting source electrode, and the contact hole of missing is for connecting drain electrode.
9. a kind of array substrate, which is characterized in that including such as claim 1 to 8 any one of them thin film transistor (TFT).
10. a kind of display device, which is characterized in that including array substrate as claimed in claim 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820380758.6U CN207909882U (en) | 2018-03-20 | 2018-03-20 | A kind of thin film transistor (TFT), array substrate and display device |
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| CN201820380758.6U CN207909882U (en) | 2018-03-20 | 2018-03-20 | A kind of thin film transistor (TFT), array substrate and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020077718A1 (en) * | 2018-10-18 | 2020-04-23 | 武汉华星光电半导体显示技术有限公司 | Array substrate and manufacturing method thereof, and display module |
| CN113223961A (en) * | 2020-01-21 | 2021-08-06 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor structure and forming method thereof |
-
2018
- 2018-03-20 CN CN201820380758.6U patent/CN207909882U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020077718A1 (en) * | 2018-10-18 | 2020-04-23 | 武汉华星光电半导体显示技术有限公司 | Array substrate and manufacturing method thereof, and display module |
| CN113223961A (en) * | 2020-01-21 | 2021-08-06 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor structure and forming method thereof |
| CN113223961B (en) * | 2020-01-21 | 2023-03-24 | 中芯国际集成电路制造（天津）有限公司 | Semiconductor structure and forming method thereof |
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