CN207884496U - A kind of duty ratio can automatic adjusument DC-stabilized circuit - Google Patents
A kind of duty ratio can automatic adjusument DC-stabilized circuit Download PDFInfo
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- CN207884496U CN207884496U CN201820223107.6U CN201820223107U CN207884496U CN 207884496 U CN207884496 U CN 207884496U CN 201820223107 U CN201820223107 U CN 201820223107U CN 207884496 U CN207884496 U CN 207884496U
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Abstract
The utility model belongs to power circuit design field, disclose a kind of duty ratio can automatic adjusument DC-stabilized circuit, the circuit includes：DC voltage-stabilizing main circuit, generating circuit from reference voltage, sine wave generation circuit and duty ratio adjusting circuit；Intelligent control is not needed, the design of power circuit is only completed with some common circuit components, ensures the stabilization of output voltage by the duty ratio of automatic adjusument PWM wave, remains to work normally when input voltage is unstable.
Description
Technical field
The utility model belong to power circuit design field more particularly to a kind of duty ratio can automatic adjusument it is straight
Flow voltage-stabilized power supply circuit.
Background technology
Common DC-DC power source design generally use integrated circuit or control chip is as control core, and cost is higher, limit
Application popularization is made；Also, it is higher with the stability requirement of the voltage of input circuit, it is tended not to when input voltage is unstable
Normal work.
Utility model content
In view of the above-mentioned problems, the purpose of this utility model is to provide a kind of duty ratio can automatic adjusument DC voltage-stabilizing
Power circuit remains to work normally when input voltage is unstable.
In order to achieve the above objectives, the utility model adopts the following technical solution is achieved.
A kind of duty ratio can automatic adjusument DC-stabilized circuit, the circuit includes：DC voltage-stabilizing main circuit,
Generating circuit from reference voltage, sine wave generation circuit and duty ratio adjusting circuit；
Wherein, the DC voltage-stabilizing main circuit includes DC voltage input end VIN and DC voltage output end VOUT, described
DC voltage-stabilizing main circuit also includes at least three parallel branches, and each parallel branch is by the inductance, metal-oxide-semiconductor and two poles that are sequentially connected in series
Pipe forms；The anode of the DC voltage input end VIN is connect with one end of three parallel branches respectively, and described three simultaneously
The other end of connection branch is connect with the DC voltage output end VOUT respectively；
The generating circuit from reference voltage includes at least voltage-stablizer and two divider resistances, the output end of voltage stabilizer conduct
Reference voltage output terminal VREF, described two divider resistances are denoted as the first divider resistance and the second divider resistance, described with reference to electricity
Pressure output end VREF is sequentially connected in series the first divider resistance and the second divider resistance, the other end ground connection of second divider resistance；
The tie point of first divider resistance and the second divider resistance is as the first partial pressure value output end；
The sine wave generation circuit includes sinewave output end；
The duty ratio adjusting circuit includes at least operational amplifier, and the negative input of the operational amplifier connects institute
Sinewave output end is stated, the electrode input end of the operational amplifier connects the first partial pressure value output end, and the operation is put
The output end of big device is used for as control voltage output end, the adjustable PWM wave of the control voltage output end output duty cycle
Adjust the DC voltage of DC voltage output end VOUT outputs.
A kind of duty ratio provided by the utility model can automatic adjusument DC-stabilized circuit, need not intelligently control
System only completes the design of power circuit with some common circuit components, is ensured by the duty ratio of automatic adjusument PWM wave
The stabilization of output voltage remains to work normally when input voltage is unstable.
Description of the drawings
In order to illustrate the embodiment of the utility model or the technical proposal in the existing technology more clearly, below will be to embodiment
Or attached drawing needed to be used in the description of the prior art is briefly described, it should be apparent that, the accompanying drawings in the following description is only
It is some embodiments of the utility model, for those of ordinary skill in the art, in the premise not made the creative labor
Under, other drawings may also be obtained based on these drawings.
Fig. 1 be a kind of duty ratio for providing of the utility model embodiment can automatic adjusument DC-stabilized circuit
Integrated circuit structural schematic diagram；
Fig. 2 is the electrical block diagram for the DC voltage-stabilizing main circuit that the utility model embodiment provides；
Fig. 3 is the electrical block diagram for the generating circuit from reference voltage that the utility model embodiment provides；
Fig. 4 is the electrical block diagram for the sine wave generation circuit that the utility model embodiment provides；
Fig. 5 is the electrical block diagram for the duty ratio adjusting circuit that the utility model embodiment provides.
Specific implementation mode
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model
Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are without making creative work
The every other embodiment obtained, shall fall within the protection scope of the present invention.
The utility model embodiment provide a kind of duty ratio can automatic adjusument DC-stabilized circuit, such as Fig. 1 institutes
Show, the circuit includes：DC voltage-stabilizing main circuit, generating circuit from reference voltage, sine wave generation circuit and duty cycle adjustment
Circuit.
Wherein, the DC voltage-stabilizing main circuit includes DC voltage input end VIN and DC voltage output end VOUT, described
DC voltage-stabilizing main circuit also includes at least three parallel branches, and each parallel branch is by the inductance, metal-oxide-semiconductor and two poles that are sequentially connected in series
Pipe forms；The anode of the DC voltage input end VIN is connect with one end of three parallel branches respectively, and described three simultaneously
The other end of connection branch is connect with the DC voltage output end VOUT respectively；
The generating circuit from reference voltage includes at least voltage-stablizer and two divider resistances, the output end of voltage stabilizer conduct
Reference voltage output terminal VREF, described two divider resistances are denoted as the first divider resistance R1 and the second divider resistance R2, the ginseng
It examines voltage output end VREF and is sequentially connected in series the first divider resistance R1 and the second divider resistance R2, the second divider resistance R2's is another
One end is grounded；The tie point a of the first divider resistance R1 and the second divider resistance R2 are as the first partial pressure value output end；
The sine wave generation circuit includes sinewave output end；
The duty ratio adjusting circuit includes at least operational amplifier, and the negative input of the operational amplifier connects institute
Sinewave output end is stated, the electrode input end of the operational amplifier connects the first partial pressure value output end, and the operation is put
The output end of big device is used for as control voltage output end, the adjustable PWM wave of the control voltage output end output duty cycle
Adjust the DC voltage of DC voltage output end VOUT outputs.
Further, each in parallel as shown in Fig. 2, the DC voltage-stabilizing main circuit at least also includes three parallel branches
Inductance, metal-oxide-semiconductor and the diode composition that branch routing is sequentially connected in series, specially：
Three parallel branches are denoted as the first parallel branch, the second parallel branch and third parallel branch respectively；It is described
First parallel branch includes the first inductance L1, the first metal-oxide-semiconductor M1 and the first diode D1；Second parallel branch includes second
Inductance L2, the second metal-oxide-semiconductor M2 and the second diode D2；The third parallel branch include third inductance L3, third metal-oxide-semiconductor M3 and
Third diode D3；
The DC voltage input end VIN anode respectively with one end of the first inductance L1, the second inductance L2
One end connected with one end of the third inductance L3；
The other end of the first inductance L1 sequentially concatenates the drain electrode of the first metal-oxide-semiconductor M1 and the first diode D1
Anode, the grounded collector of the first metal-oxide-semiconductor M1, the grid of the first metal-oxide-semiconductor M1 connects the control voltage output
End；
The other end of the second inductance L2 sequentially concatenates the drain electrode of the second metal-oxide-semiconductor M2 and the second diode D2
Anode, the grounded collector of the second metal-oxide-semiconductor M2, the grid of the second metal-oxide-semiconductor M2 connects the control voltage output
End；
The other end of the third inductance L3 sequentially concatenates the drain electrode of the third metal-oxide-semiconductor M3 and the third diode D3
Anode, the grounded collector of the third metal-oxide-semiconductor M3, the grid of the third metal-oxide-semiconductor M3 connects the control voltage output
End；
The cathode of the first diode D1, the second diode D2 cathode and the third diode D3 cathode
It is separately connected the DC voltage output end VOUT.
Further, as shown in Fig. 2, the DC voltage-stabilizing main circuit also includes the first electrolytic capacitor C21, the second electrolysis electricity
Hold C22, the first filter capacitor C11 and the second filter capacitor C12；
The cathode of the DC voltage input end VIN is filtered with one end of the first electrolytic capacitor C21, described first respectively
One end of wave capacitance C11 connects, the other end of the other end of the first electrolytic capacitor C21 and the first filter capacitor C11
Ground connection；
The DC voltage output end VOUT is also filtered with one end of the second electrolytic capacitor C22, described second respectively
One end of capacitance C12 connects, another termination of the other end of the second electrolytic capacitor C22 and the second filter capacitor C12
Ground.
Specifically, the model TL431 of the voltage-stablizer, as shown in figure 3, the generating circuit from reference voltage also includes；
Current-limiting resistance Ra, third divider resistance R3, the 4th divider resistance R4, third electrolytic capacitor C23 and third filter capacitor C13；
One end of the current-limiting resistance Ra is connect with the anode of the DC voltage input end VIN, the current-limiting resistance Ra
The other end connect with one end of the third divider resistance R3, the other end of the third divider resistance R3 with described 4th point
One end of piezoresistance R4 connects, the other end ground connection of the 4th divider resistance R4；
The tie point b of the third divider resistance R3 and the 4th divider resistance R4 as the second partial pressure value output end,
The second partial pressure value output end is connect with the reference pole ref of the voltage-stablizer, the anode A of the voltage-stablizer with described 4th point
The other end of piezoresistance connects, the cathode K of voltage-stablizer output end VREF as the reference voltage；
The reference voltage output terminal VREF respectively with one end of the third electrolytic capacitor C23, the third filtered electrical
Hold C13 one end connection, the other end of the third electrolytic capacitor C23, the third filter capacitor C13 the other end respectively with
The other end of the second divider resistance R2 connects.
Further, as shown in figure 4, the sine wave generation circuit includes voltage controlled oscillator VCO, the first coupled capacitor
C31, the second coupled capacitor C32, the first triode Q1, pull-up resistor Rb, the 5th divider resistance R5, the 6th divider resistance R6,
Seven divider resistance R7, the 8th divider resistance R8；The first triode Q1 is NPN type triode；
The reference voltage output terminal VREF is sequentially connected in series the 5th divider resistance R5 and the 6th divider resistance R6,
The other end of the 6th divider resistance R6 is grounded；The tie point of the 5th divider resistance R5 and the 6th divider resistance R6
C is as third partial pressure value output end；
The reference voltage output terminal VREF is sequentially connected in series the 7th divider resistance R7 and the 8th divider resistance R8, described
The other end of 8th divider resistance R8 is grounded；The tie point d of the 7th divider resistance R7 and the 8th divider resistance R8 makees
For the 4th partial pressure value output end；
The third partial pressure value output end is connect with the control voltage input end V of the voltage controlled oscillator VCO, described voltage-controlled
The voltage output end OUT of oscillator is connect by the first coupled capacitor C31 with the 4th partial pressure value output end, and described
Four partial pressure value output ends are also connect with the base stage of one end of the 4th filter capacitor C14, the first triode Q1 respectively, institute
The other end ground connection of the 4th filter capacitor C14 is stated, the emitter of the first triode Q1 is grounded, the first triode Q1's
Collector is connect by the pull-up resistor Rb with the reference voltage output terminal VREF；
The collector of the first triode Q1 is also connect with one end of the second coupled capacitor C32, second coupling
Close sinewave output end of the other end of capacitance C32 as the sine wave generation circuit.
Further, as shown in figure 5, the duty ratio adjusting circuit also includes：9th divider resistance R9, the tenth point of piezoelectricity
Hinder R10, the 11st divider resistance R11, the 12nd divider resistance R12, the second triode Q2, the 5th filter capacitor C15, the 6th filter
Wave capacitance C16；The second triode Q2 is PNP type triode；
One end of the 9th divider resistance R9 respectively with the DC voltage output end VOUT, the tenth divider resistance
One end of R10 connects, and the other end of the 9th divider resistance R9 is divided with the sinewave output end, the described 11st respectively
One end of resistance R11, one end of the 12nd divider resistance R12, one end of the 5th filter capacitor C15 and the fortune
Calculate the negative input connection of amplifier Q3；
The emitter of the second triode Q2 is connect with the reference voltage output terminal VREF, the second triode Q2
Base stage connect with the other end of the tenth divider resistance R10, the collector and the described 12nd of the second triode Q2
The other end of divider resistance R12 connects；
The electrode input end of the operational amplifier Q3 is also grounded by the 6th filter capacitor C16.
Illustratively, to above-mentioned duty ratio as shown in Figure 1 can automatic adjusument DC-stabilized circuit each section
Function carries out as described below：
Voltage controlled oscillator VCO can generate sine wave；The sine wave that first triode Q1 generates voltage controlled oscillator VCO into
The partial pressure of row amplification, the 7th divider resistance R7 and the 8th divider resistance R8 provide the dc point of the first triode Q1, according to
Actual conditions can be adjusted；The sine wave that voltage controlled oscillator VCO generates is coupled to the first triode by the first coupled capacitor C31
Base stage.
First inductance L1, the second inductance L2 and third inductance L3 parallel connections are in order in the input voltage of voltage input end VIN
The output voltage of voltage output end VOUT is made to keep stablizing when fluctuating larger.
Operational amplifier Q3 can compare the size of electrode input end and negative input voltage as comparator practicality,
Electrode input end voltage exports high level when big, negative input voltage exports low level when big；And operational amplifier Q3 anodes
The voltage of input terminal is that the voltage of reference voltage output terminal VREF outputs passes through the first divider resistance R1 and the second divider resistance R2
The DC voltage generated is divided, the voltage of operational amplifier Q3 negative inputs is that the voltage that voltage output end VOUT is exported passes through
Divide DC voltage and the coupled capacitor C32 sine waves coupled generated and；The PWM of the operational amplifier Q3 outputs
Wave is used to control the break-make of the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, third metal-oxide-semiconductor M3, realizes the input electricity of voltage input end VIN
It is pressed onto the conversion of the output voltage of voltage output end VOUT.
Specifically, when the output voltage of voltage output end VOUT is unstable, the PWM wave of operational amplifier Q3 outputs accounts for
Empty ratio changes correspondingly；When the output voltage of voltage output end VOUT is more than defined voltage, the PWM of operational amplifier Q3 outputs
The duty ratio of wave becomes smaller so that the output voltage of voltage output end VOUT reduces；When the output voltage of voltage output end VOUT is small
When defined voltage, the duty ratio of the PWM wave of operational amplifier Q3 outputs increases so that the output electricity of voltage output end VOUT
Buckling is big, and the output voltage for the voltage output end VOUT that final result is keeps stablizing.
Specifically, when the output voltage of voltage output end VOUT is less than the reference voltage of reference voltage output terminal VREF outputs
When, the second triode Q2 conductings, operational amplifier Q3 has PWM wave output；When the output voltage of voltage output end VOUT is more than ginseng
When examining the reference voltage of voltage output end VREF outputs, the second triode Q2 cut-offs, the output voltage of voltage output end VOUT leads to
The partial pressure for crossing the 9th divider resistance R9 and the 11st divider resistance R11 is added to the negative input of operational amplifier.
A kind of duty ratio provided by the utility model can automatic adjusument DC-stabilized circuit, need not intelligently control
System only completes the design of power circuit with some common circuit components, is ensured by the duty ratio of automatic adjusument PWM wave
The stabilization of output voltage remains to work normally when input voltage is unstable.
Above description is only a specific implementation of the present invention, but the scope of protection of the utility model is not limited to
In this, any one skilled in the art within the technical scope disclosed by the utility model, can readily occur in variation
Or replace, it should be covered within the scope of the utility model.Therefore, the scope of protection of the utility model should be with the power
Subject to the protection domain that profit requires.
Claims (6)
1. a kind of duty ratio can automatic adjusument DC-stabilized circuit, which is characterized in that the circuit includes：Direct current is steady
Press main circuit, generating circuit from reference voltage, sine wave generation circuit and duty ratio adjusting circuit；
Wherein, the DC voltage-stabilizing main circuit includes DC voltage input end VIN and DC voltage output end VOUT, the direct current
Voltage stabilizing main circuit also includes at least three parallel branches, and each parallel branch is by the inductance, metal-oxide-semiconductor and diode group that are sequentially connected in series
At；The anode of the DC voltage input end VIN is connect with one end of three parallel branches respectively, described three branch in parallel
The other end on road is connect with the DC voltage output end VOUT respectively；
The generating circuit from reference voltage includes at least voltage-stablizer and two divider resistances, and the output end of voltage stabilizer is as reference
Voltage output end VREF, described two divider resistances are denoted as the first divider resistance and the second divider resistance, and the reference voltage is defeated
Outlet VREF is sequentially connected in series the first divider resistance and the second divider resistance, the other end ground connection of second divider resistance；It is described
The tie point of first divider resistance and the second divider resistance is as the first partial pressure value output end；
The sine wave generation circuit includes sinewave output end；
The duty ratio adjusting circuit includes at least operational amplifier, and the negative input connection of the operational amplifier is described just
The electrode input end of string wave output terminal, the operational amplifier connects the first partial pressure value output end, the operational amplifier
Output end as control voltage output end, the adjustable PWM wave of the control voltage output end output duty cycle, for adjusting
The DC voltage of DC voltage output end VOUT outputs.
2. a kind of duty ratio according to claim 1 can automatic adjusument DC-stabilized circuit, which is characterized in that
The DC voltage-stabilizing main circuit at least also include three parallel branches, each parallel branch by be sequentially connected in series inductance, metal-oxide-semiconductor and
Diode forms, specially：
Three parallel branches are denoted as the first parallel branch, the second parallel branch and third parallel branch respectively；Described first
Parallel branch includes the first inductance, the first metal-oxide-semiconductor and the first diode；Second parallel branch includes the second inductance, second
Metal-oxide-semiconductor and the second diode；The third parallel branch includes third inductance, third metal-oxide-semiconductor and third diode；
The DC voltage input end VIN anode respectively with one end of first inductance, second inductance one end and
One end of the third inductance connects；
The other end of first inductance sequentially concatenates drain electrode and the anode of first diode of first metal-oxide-semiconductor, institute
The grounded collector of the first metal-oxide-semiconductor is stated, the grid of first metal-oxide-semiconductor connects the control voltage output end；
The other end of second inductance sequentially concatenates drain electrode and the anode of second diode of second metal-oxide-semiconductor, institute
The grounded collector of the second metal-oxide-semiconductor is stated, the grid of second metal-oxide-semiconductor connects the control voltage output end；
The other end of the third inductance sequentially concatenates drain electrode and the anode of the third diode of the third metal-oxide-semiconductor, institute
The grounded collector of third metal-oxide-semiconductor is stated, the grid of the third metal-oxide-semiconductor connects the control voltage output end；
The cathode of the cathode of first diode, the cathode of second diode and the third diode is separately connected institute
State DC voltage output end VOUT.
3. a kind of duty ratio according to claim 1 can automatic adjusument DC-stabilized circuit, which is characterized in that
The DC voltage-stabilizing main circuit also includes the first electrolytic capacitor, the second electrolytic capacitor, the first filter capacitor and the second filter capacitor；
The cathode of the DC voltage input end VIN respectively with one end of first electrolytic capacitor, first filter capacitor
One end connection, the other end ground connection of the other end of first electrolytic capacitor and first filter capacitor；
The DC voltage output end VOUT also respectively with one end of second electrolytic capacitor, second filter capacitor one
The other end ground connection of end connection, the other end of second electrolytic capacitor and second filter capacitor.
4. a kind of duty ratio according to claim 1 can automatic adjusument DC-stabilized circuit, which is characterized in that
The model TL431 of the voltage-stablizer, the generating circuit from reference voltage also include：Current-limiting resistance, third divider resistance, the 4th
Divider resistance, third electrolytic capacitor and third filter capacitor；
One end of the current-limiting resistance is connect with the anode of the DC voltage input end VIN, the other end of the current-limiting resistance
It is connect with one end of the third divider resistance, one end of the other end of the third divider resistance and the 4th divider resistance
Connection, the other end ground connection of the 4th divider resistance；
The tie point of the third divider resistance and the 4th divider resistance is as the second partial pressure value output end, described second point
Pressure value output end is connect with the reference pole of the voltage-stablizer, the other end of the anode of the voltage-stablizer and the 4th divider resistance
Connection, the cathode of voltage-stablizer output end VREF as the reference voltage；
The reference voltage output terminal VREF respectively with one end of the third electrolytic capacitor, one end of the third filter capacitor
Connection, the other end of the third electrolytic capacitor, the third filter capacitor the other end respectively with second divider resistance
The other end connection.
5. a kind of duty ratio according to claim 1 can automatic adjusument DC-stabilized circuit, which is characterized in that
The sine wave generation circuit includes voltage controlled oscillator, the first coupled capacitor, the second coupled capacitor, the first triode, pull-up electricity
Resistance, the 5th divider resistance, the 6th divider resistance, the 7th divider resistance, the 8th divider resistance；First triode is NPN type
Triode；
The reference voltage output terminal VREF is sequentially connected in series the 5th divider resistance and the 6th divider resistance, and the described 6th
The other end of divider resistance is grounded；The tie point of 5th divider resistance and the 6th divider resistance is as third partial pressure value
Output end；
The reference voltage output terminal VREF is sequentially connected in series the 7th divider resistance and the 8th divider resistance, the 8th partial pressure
The other end of resistance is grounded；The tie point of 7th divider resistance and the 8th divider resistance is exported as the 4th partial pressure value
End；
The third partial pressure value output end is connect with the control voltage input end of the voltage controlled oscillator, the voltage controlled oscillator
Voltage output end is connect by first coupled capacitor with the 4th partial pressure value output end, the 4th partial pressure value output end
It is also connect respectively with the base stage of one end of the 4th filter capacitor, first triode, the other end of the 4th filter capacitor
Ground connection, the emitter ground connection of first triode, the collector of first triode by the pull-up resistor with it is described
Reference voltage output terminal VREF connections；
The collector of first triode is also connect with one end of second coupled capacitor, second coupled capacitor it is another
Sinewave output end of the one end as the sine wave generation circuit.
6. a kind of duty ratio according to claim 1 can automatic adjusument DC-stabilized circuit, which is characterized in that
The duty ratio adjusting circuit also includes：9th divider resistance, the tenth divider resistance, the 11st divider resistance, the 12nd partial pressure
Resistance, the second triode, the 5th filter capacitor, the 6th filter capacitor；Second triode is PNP type triode；
One end of 9th divider resistance one end with the DC voltage output end VOUT, the tenth divider resistance respectively
Connection, the other end of the 9th divider resistance respectively with the sinewave output end, the 11st divider resistance one end,
One end, one end of the 5th filter capacitor and the negative input of the operational amplifier of 12nd divider resistance
Connection；
The emitter of second triode is connect with the reference voltage output terminal VREF, the base stage of second triode with
The other end of tenth divider resistance connects, and the collector of second triode is another with the 12nd divider resistance
End connection；
The electrode input end of the operational amplifier is also grounded by the 6th filter capacitor, the power supply of shown operational amplifier
End is connect with the reference voltage output terminal VREF.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201820223107.6U CN207884496U (en) | 2018-02-06 | 2018-02-06 | A kind of duty ratio can automatic adjusument DC-stabilized circuit |
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| CN201820223107.6U CN207884496U (en) | 2018-02-06 | 2018-02-06 | A kind of duty ratio can automatic adjusument DC-stabilized circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116840734A (en) * | 2023-07-07 | 2023-10-03 | 西安航空学院 | Digital pulse parameter detection system and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116840734A (en) * | 2023-07-07 | 2023-10-03 | 西安航空学院 | Digital pulse parameter detection system and method |
| CN116840734B (en) * | 2023-07-07 | 2024-04-05 | 西安航空学院 | Digital pulse parameter detection system and method |
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