CN207835415U - A kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared - Google Patents

A kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared Download PDF

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Publication number
CN207835415U
CN207835415U CN201820142027.8U CN201820142027U CN207835415U CN 207835415 U CN207835415 U CN 207835415U CN 201820142027 U CN201820142027 U CN 201820142027U CN 207835415 U CN207835415 U CN 207835415U
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circuit
frequency
power
power amplifier
impedance
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CN201820142027.8U
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章秀银
李玄平
徐金旭
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South China University of Technology SCUT
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South China University of Technology SCUT
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Abstract

The utility model discloses the three tunnel Doherty power amplifiers of double frequency that a kind of carrier power amplifier shares,Including first frequency power distributing circuit,Second frequency power distributing circuit,First duplicate circuitry,Second duplicate circuitry,First frequency delay circuit,Second frequency delay circuit,First power amplification circuit,Second power amplification circuit,Third power amplification circuit,First parasitic compensation circuit,Second parasitic compensation circuit,First power synthesis circuit,Second power synthesis circuit,Two peak amplifiers for being operated in different frequency are by sharing the intermediate Carrier Power Amplifier worked at the same time all the way in double frequency,It may be constructed the double frequency Doherty power amplifier that 2 ports input the output of 2 ports,Relative to traditional structure,The utility model only realizes double frequency Doherty power amplifier with three transistors by way of sharing,Transistor cost is saved,And circuit volume smaller,Integrated level higher.

Description

A kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared
Technical field
The utility model is related to wireless communication technology fields, and in particular to a kind of three tunnel of double frequency that carrier power amplifier is shared Doherty power amplifier.
Background technology
Core component one of of the power amplifier as wireless communication system, while a large amount of energy is also consumed, to whole The influence of a system performance is especially prominent.In recent years wireless communication technique fast development greatly pushed such as LTE, The deployment of the complex modulated signals such as WiMAX, however these complex modulated signals usually all have the characteristics that high peak-to-average power ratio, this just makes Conventional AB power-like amplifiers be difficult to meet system for efficiency, the linearity, power consumption, heat dissipation requirement, exactly such Under background, Doherty power amplifier gradually obtains scholars and payes attention to and fully study so that Doherty power amplifier can To keep high efficiency in larger back-off area.Simultaneously as the frequency range of wireless communication standard covering is more and more, wirelessly Base station must simultaneously support multiple frequency ranges, and the demand of multi-frequency band radio-frequency component is also just increasing, therefore double frequency Doherty power Amplifier has critically important researching value.
Carrier Power Amplifier that traditional single-frequency Doherty power amplifier is biased in AB classes by one and one are biased in The peak power amplifier of C classes is constituted, and 2 transistors is needed, then to realize the Doherty power amplifications of two different frequencies Device just needs 4 transistors.
Utility model content
In order to overcome shortcoming and deficiency of the existing technology, the utility model to provide a kind of double frequency that carrier power amplifier is shared Three tunnel Doherty power amplifiers.
The utility model adopts the following technical solution:
A kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared, including first frequency power distributing circuit, Second frequency power distributing circuit, the first duplicate circuitry, the second duplicate circuitry, first frequency delay circuit, second frequency delay Circuit, the first power amplification circuit, the second power amplification circuit, third power amplification circuit, the first parasitic compensation circuit, second Parasitic compensation circuit, the first power synthesis circuit and the second power synthesis circuit;
The first frequency power distributing circuit and second frequency power distributing circuit are an input terminal, two outputs The three-port network at end, first duplicate circuitry are the three-port networks of two input terminals and an output end;
First frequency power distributing circuit input terminal receives first frequency input signal, two output end is separately connected the The input terminal of one frequency delay circuit and an input terminal of the first duplicate circuitry, the output of the first frequency delay circuit End, the first power amplification circuit, the first parasitic compensation circuit, the first power synthesis circuit and load are sequentially connected;
The second frequency power distributing circuit input terminal receives second frequency input signal, two output end connects respectively Another input terminal of the first duplicate circuitry and the input terminal of second frequency delay circuit are connect, the second frequency delay circuit Output end, third power amplification circuit, the second parasitic compensation circuit, the second power synthesis circuit and load are sequentially connected;
The output end of first duplicate circuitry is connect with the input terminal of the second power amplification circuit, and second power is put The output end of big circuit is connect with the input terminal of the second duplicate circuitry, and the second duplicate circuitry is an input terminal and two output ends Three-port network, two output end connect with the first power synthesis circuit and the second power synthesis circuit respectively;
First power synthesis circuit is made of the first impedance inverted circuit and the first impedance inverter circuit, the first impedance The effect of translation circuit is to reduce the apparent impedance looked over toward load direction from signal combining point, in conjunction with the first impedance inverted Circuit, then the apparent impedance looked over from the first impedance inverted circuit input end toward load direction, which is transformed into one, compares 50ohm Big value so that carrier power amplifier reaches saturation state in advance, generates back-off area.
Second power synthesis circuit is made of the second impedance inverted circuit and the second impedance inverter circuit, the second impedance The effect of translation circuit is to reduce the apparent impedance looked over toward load direction from signal combining point, in conjunction with the second impedance inverted Circuit, then the apparent impedance looked over from the second impedance inverted circuit input end toward load direction, which is transformed into one, compares 50ohm Big value so that carrier power amplifier reaches saturation state in advance, generates back-off area.
Two output ends of second duplicate circuitry respectively with the first impedance inverted circuit and the second impedance inverted circuit Input terminal connection, the input terminal of the first impedance inverter circuit is parasitic with the output end of the first impedance inverted circuit and first respectively The output end of compensation circuit connects, and output end and the load of first impedance inverter circuit connect;
The input terminal of second impedance inverter circuit is parasitic with the output end of the second impedance inverted circuit and second respectively The output end of compensation circuit connects, and output end and the load of second impedance inverter circuit connect;
The first frequency delay circuit and second frequency delay circuit are all certain electrical length that characteristic impedance is 50ohm Microstrip line;First frequency delay circuit input terminal receives the signal of first frequency power distributing circuit output, output end and the One power amplification circuit input terminal is connected, since the core concept of Doherty power amplifier is exactly that active load modulation (uses peak The electric current that value power amplifier generates removes the load impedance of modulation carrier power amplifier), so amplify by carrier power amplifier and peak value power amplifier two Signal phase requirements at combining point in road are identical as possible, change the first work(by adjusting the electrical length of first frequency delay circuit Phase of the rate amplifying circuit output signal at combining point is effectively modulated with the load impedance to carrier power amplifier.
Second frequency delay circuit input terminal receives the signal of second frequency power distributing circuit output, output end and third Power amplification circuit input terminal is connected, and changes third power amplification circuit by adjusting the electrical length of second frequency delay circuit Phase of the output signal at combining point is effectively to modulate the load impedance of carrier power amplifier.
The characteristic impedance of first parasitic compensation circuit and the second parasitic compensation circuit is all 50ohm;First parasitic benefit The effect for repaying circuit is that the apparent impedance looked over toward first frequency peak value power amplifier at combining point is turned under small-power state High impedance status is changed to, to prevent the power leakage of carrier power amplifier first frequency output signal under small-power state to first frequency Peak value power amplifier reduces efficiency.
The effect of second parasitic compensation circuit is under small-power state the past second frequency peak value power amplifier at combining point The apparent impedance looked over is transformed into high impedance status, to prevent carrier power amplifier second frequency output signal under small-power state Power leakage reduces efficiency to second frequency peak value power amplifier.
First power amplification circuit is the peak power amplifying circuit for being biased in C classes for being operated in first frequency, the Three power amplification circuits are the peak power amplifying circuit for being biased in C classes for being operated in second frequency, the second power amplification circuit It is the double frequency carrier power amplifying circuit for being biased in AB classes for being operated in first frequency and second frequency;
The characteristic impedance of the first impedance inverted circuit is β1*Z0, the characteristic impedance of the first impedance inverter circuit isβ1For the maximum fundamental current and the first of the output of double frequency carrier power amplifier of first frequency peak value power amplifier output The ratio between maximum fundamental current of frequency, Z0For 50ohm, electrical length is 90 degree;
The characteristic impedance of the second impedance inverted circuit is β2*Z0, the characteristic impedance of the first impedance inverter circuit isβ2For the maximum fundamental current and the second of the output of double frequency carrier power amplifier of second frequency peak value power amplifier output The ratio between maximum fundamental current of frequency, Z0For 50ohm, electrical length is 90 degree.
First duplicate circuitry is made of seven sections of microstrip lines, including two T junctions and one being made of three sections of microstrip lines The microstrip line of Duan Lianjie, two T junctions constitute the passband of a frequency with the microstrip line of connection respectively, and two T junctions it Between have good alien frequencies isolation characteristic.Second duplicate circuitry is exactly that the input terminal and output end of the first duplicate circuitry are exchanged position It sets.
The beneficial effects of the utility model:
(1) the single-frequency Doherty power amplifier of traditional one output end of an input terminal by a Carrier Power Amplifier and One peak power amplifier is constituted, and two transistors is needed, then to realize the Doherty power amplifier under two frequencies With regard to needing four transistors, the utility model only to realize double frequency Doherty power by way of sharing with three transistors Amplifier has saved transistor cost, and circuit volume smaller, integrated level higher.
(2) compared to three transistors, by sharing transistor, (wherein shared transistor is independently operated on the One frequency is independently operated on second frequency) come the Doherty power amplifier that constitutes, the crystal that is shared in the utility model Pipe simultaneously amplifies the signal of two different frequencies, and output port can export the signal of two frequencies simultaneously, constitute two frequencies Doherty power amplifier.
(3) compared to three transistors, by sharing a transistor, (wherein three transistors are all operated in a frequency Rate) come the single-frequency Doherty power amplifier of the two-port input two-port output constituted, the utility model can export simultaneously The signal of two frequencies meets the wireless communication standard for covering more and more frequency ranges.
Description of the drawings
Fig. 1 is traditional Doherty power amplifier structural principle block diagram.
Fig. 2 is a kind of shared three tunnel Doherty power amplifier structure of double frequency of carrier power amplifier provided by the utility model Block diagram.
Fig. 3 (a) and Fig. 3 (b) is the utility model embodiment when working frequency is 2.59GHz and 3.5GHz, in difference Drain efficiency and gain simulation result are corresponded in the case of output power.
Specific implementation mode
With reference to embodiment and attached drawing, the utility model is described in further detail, but the reality of the utility model It is without being limited thereto to apply mode.
Embodiment
As shown in Fig. 2, the three tunnel Doherty power amplifier of double frequency that a kind of carrier power amplifier is shared, including first frequency work( Rate distributor circuit, second frequency power distributing circuit, the first duplicate circuitry, the second duplicate circuitry, first frequency delay circuit, Two frequency delay circuits, the first power amplification circuit, the second power amplification circuit, third power amplification circuit, the first parasitic benefit Repay circuit, the second parasitic compensation circuit, the first power synthesis circuit and the second power synthesis circuit;As shown in Figure 1, most of pass System Doherty power amplifier needs two transistors and is only operated in single frequency point, and it is same to cannot be satisfied Modern Communication System When cover the requirements of multiple frequency points.In the present invention, the peak value power amplifier that is operated in different frequency by two shares one Road works at the same time carrier power amplifier one three tunnel Doherty power amplifier of double frequency of composition in two frequencies.Due to shared load Wave power amplifier simultaneously amplifies the signal of two frequencies, is equivalent to the high efficiency Doherty that can constitute two different frequencies simultaneously Power amplifier meets the communication system requirements of more and more frequency coverages, while also higher, cost are also able to circuit level It saves.
The first frequency power distributing circuit is an input terminal, the three-port network of two output ends, to the first frequency Rate input signal is carried out with width with being separated, and the two-way radiofrequency signal isolated is just the same, and signal enters first frequency all the way Delay circuit, another way signal enter an input terminal of the first duplicate circuitry;
The second frequency power distributing circuit is an input terminal, the three-port network of two output ends, to the second frequency Rate input signal is carried out with width with being separated, and the two-way radiofrequency signal isolated is just the same, and signal enters second frequency all the way Delay circuit, another way signal enter another input terminal of the first duplicate circuitry;
First duplicate circuitry is the three-port network of two input terminals and an output end, and two input terminals connect respectively The signal for the two-way different frequency that receipts are separated from first frequency power distributing circuit and second frequency power distributing circuit, two The input terminal progress power that the signal of road different frequency is entered the second power amplification circuit by the output end of the first duplicate circuitry is put Greatly;
First power amplification circuit is the peak power amplifying circuit for being biased in C classes for being operated in first frequency, the Three power amplification circuits are the peak power amplifying circuits for being biased in C classes for being operated in second frequency, by input matching network, Stabilizing circuit, gate bias circuit, transistor, drain the compositions such as biasing circuit and output matching network.Second power amplification Circuit is the double frequency carrier power amplifying circuit for being biased in AB classes worked at the same time in first frequency and second frequency, input With circuit, gate bias circuit and drain electrode biasing circuit require and meet double frequency matching condition, and output matching circuit is wanted Seek the matched well for completing high-power state and small-power state under two frequencies.The present embodiment is by adjusting peak power The gate bias voltage of amplifier and the size of input radio frequency signal adjust the opening time of peak power amplifier.
Second duplicate circuitry is the three-port network of an input terminal and two output ends, and input terminal is received by the The signal of the radiofrequency signal of two frequencies of two power amplification circuits amplification, one of frequency enters first by an output end The signal of impedance inverted circuit, another frequency enters the second impedance inverted circuit by another output end.
First power synthesis circuit is made of the first impedance inverted circuit and the first impedance inverter circuit;
Second power synthesis circuit is made of the second impedance inverted circuit and the second impedance inverter circuit;
The input terminal of first impedance inverter circuit is parasitic with the output end of the first impedance inverted circuit and first respectively The output end of compensation circuit connects, and is put by the first frequency signal and the second power amplification circuit of the amplification of the first power amplification circuit Big first frequency signal converges entrance in the output end of the first impedance inverted circuit and the output end of the first parasitic compensation circuit First impedance inverter circuit reaches load end in turn;
The input terminal of second impedance inverter circuit is parasitic with the output end of the second impedance inverted circuit and second respectively The output end of compensation circuit connects, and the second frequency signal and the second power amplification circuit amplified by third power amplification circuit is put Big second frequency signal converges entrance in the output end of the second impedance inverted circuit and the output end of the second parasitic compensation circuit Second impedance inverter circuit reaches load end in turn;
The characteristic impedance of the first frequency delay circuit and second frequency delay circuit is all 50ohm, and effect is to pass through The electrical length of two delay circuits of adjustment exists to adjust the output signal of the first power amplification circuit and third power amplification circuit Phase at corresponding combining point to the load of the second power amplification circuit to carry out effectively modulation to reach high efficiency Doherty work( The effect put.
The characteristic impedance of the first impedance inverted circuit is β1*Z0, the characteristic impedance of the first impedance inverter circuit isβ1For the maximum fundamental current and the first of the output of double frequency carrier power amplifier of first frequency peak value power amplifier output The ratio between maximum fundamental current of frequency, Z0For 50ohm, electrical length is 90 degree.
The characteristic impedance of the second impedance inverted circuit is β2*Z0, the characteristic impedance of the first impedance inverter circuit isβ2For the maximum fundamental current and the second of the output of double frequency carrier power amplifier of second frequency peak value power amplifier output The ratio between maximum fundamental current of frequency, Z0For 50ohm, electrical length is 90 degree.
First duplicate circuitry is made of seven sections of microstrip lines, including two T junctions and one being made of three sections of microstrip lines The microstrip line of Duan Lianjie, two T junctions constitute the passband of a frequency with the microstrip line of connection respectively, and two T junctions it Between have good alien frequencies isolation characteristic.Second duplicate circuitry is exactly that the input terminal and output end of the first duplicate circuitry are exchanged position It sets.
First parasitic compensation circuit is the microstrip line for certain electrical length that characteristic impedance is 50ohm, input terminal and first Power amplification circuit output end is connected, and output end is directly connected with the input terminal of the first impedance inverter circuit, the first Parasitic compensation The effect of circuit is that the apparent impedance looked over toward first frequency peak value power amplifier at combining point is converted under small-power state To suitable high impedance status, to prevent the power of the second power amplification circuit first frequency output signal under small-power state from letting out Revealing first frequency peak value power amplifier reduces efficiency.
Second parasitic compensation circuit is the microstrip line for certain electrical length that characteristic impedance is 50ohm, input terminal and third Power amplification circuit output end is connected, and output end is directly connected with the input terminal of the second impedance inverter circuit, the second Parasitic compensation The effect of circuit is that the apparent impedance looked over toward second frequency peak value power amplifier at combining point is converted under small-power state To suitable high impedance status, to prevent the power of the second power amplification circuit second frequency output signal under small-power state from letting out Revealing second frequency peak value power amplifier reduces efficiency.
First power synthesis circuit is made of the first impedance inverted circuit and the first impedance inverter circuit, the second power combing Circuit is made of the second impedance inverted device and the second impedance inverter circuit, the first power synthesis circuit and the second power synthesis circuit Effect be such that in carrier power amplifier under small-power state there is load impedance than traditional 50ohm biggers, coordinate carrier power amplifier Matched well condition of the output matching circuit under small-power state, can be so that carrier power amplifier reaches saturation state and generates work(in advance Rate rollback area and efficiency will not be reduced coordinates load of the electric current that peak value power amplifier generates to carrier power amplifier under high-power state It is modulated so that in final saturation state, by the standard termination of Doherty power amplifier load transfer to 50ohm.
First working frequency and the second working frequency are different.
When being that be operated in frequency be 2590MHz and 3.5GHz respectively shown in Fig. 3 (a), Fig. 3 (b), the utility model embodiment The simulation result of drain efficiency and gain under different output power.Abscissa indicates output power size, unit in figure For dBm, Fig. 3 (a) ordinates number indicates that total drain efficiency, unit %, Fig. 3 (b) ordinate digital representation are entire respectively The gain of circuit, unit dB.As can be seen from the figure drain efficiency is maintained at 70% within the scope of maximum power rollback 5.7dB More than, saturation state efficiency is close to 80%.
In conclusion the utility model provides a kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared, It is operated in the peak power amplifier of first frequency and is operated in the peak power amplifier of second frequency by sharing work simultaneously Make the Carrier Power Amplifier in double frequency to constitute a double frequency Doherty power amplifier.
Above-described embodiment is the preferable embodiment of the utility model, but the embodiment of the utility model is not by described The limitation of embodiment, under other any Spirit Essences and principle without departing from the utility model made by change, modify, replace In generation, simplifies combination, should be equivalent substitute mode, is included within the scope of protection of the utility model.

Claims (5)

1. a kind of shared three tunnel Doherty power amplifier of double frequency of carrier power amplifier, which is characterized in that including first frequency power Distributor circuit, second frequency power distributing circuit, the first duplicate circuitry, the second duplicate circuitry, first frequency delay circuit, second Frequency delay circuit, the first power amplification circuit, the second work(amplifying circuit, third power amplification circuit, the first Parasitic compensation electricity Road, the second parasitic compensation circuit, the first power synthesis circuit and the second power synthesis circuit;
The first frequency power distributing circuit and second frequency power distributing circuit are an input terminal, two output ends Three-port network, first duplicate circuitry are the three-port networks of two input terminals and an output end;
First frequency power distributing circuit input terminal receives first frequency input signal, two output end is separately connected the first frequency One input terminal of the input terminal of rate delay circuit and the first duplicate circuitry, the output end of the first frequency delay circuit, One power amplification circuit, the first parasitic compensation circuit, the first power synthesis circuit and load are sequentially connected;
The second frequency power distributing circuit input terminal receives second frequency input signal, two output end is separately connected the Another input terminal of one duplicate circuitry and the input terminal of second frequency delay circuit, the output of the second frequency delay circuit End, third power amplification circuit, the second parasitic compensation circuit, the second power synthesis circuit and load are sequentially connected;
The output end of first duplicate circuitry is connect with the input terminal of the second power amplification circuit, the second power amplification electricity The output end on road is connect with the input terminal of the second duplicate circuitry, and the second duplicate circuitry is the three of an input terminal and two output ends Port network, two output end are connect with the first power synthesis circuit and the second power synthesis circuit respectively.
2. three tunnel Doherty power amplifier of double frequency according to claim 1, which is characterized in that first power closes It is made of the first impedance inverted circuit and the first impedance inverter circuit at circuit;
Second power synthesis circuit is made of the second impedance inverted circuit and the second impedance inverter circuit;
Two output ends of second duplicate circuitry are defeated with the first impedance inverted circuit and the second impedance inverted circuit respectively Enter end connection, the input terminal of the first impedance inverter circuit output end and the first Parasitic compensation with the first impedance inverted circuit respectively The output end of circuit connects, and output end and the load of first impedance inverter circuit connect;
The input terminal of second impedance inverter circuit output end and the second Parasitic compensation with the second impedance inverted circuit respectively The output end of circuit connects, and output end and the load of second impedance inverter circuit connect.
3. three tunnel Doherty power amplifier of double frequency according to claim 1, which is characterized in that the first frequency prolongs When circuit and second frequency delay circuit characteristic impedance all be 50ohm.
4. three tunnel Doherty power amplifier of double frequency according to claim 1, which is characterized in that the described first parasitic benefit The characteristic impedance for repaying circuit and the second parasitic compensation circuit is all 50ohm.
5. three tunnel Doherty power amplifier of double frequency according to claim 1, which is characterized in that the first power amplification electricity Road is the peak power amplifying circuit for being biased in C classes for being operated in first frequency, and third power amplification circuit is to be operated in second The peak power amplifying circuit for being biased in C classes of frequency, the second power amplification circuit are to be operated in first frequency and second frequency The double frequency carrier power amplifying circuit for being biased in AB classes.
CN201820142027.8U 2018-01-26 2018-01-26 A kind of three tunnel Doherty power amplifier of double frequency that carrier power amplifier is shared Expired - Fee Related CN207835415U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109274343A (en) * 2018-11-09 2019-01-25 华南理工大学 A kind of power amplifier stackable with energy
CN111682852A (en) * 2020-06-23 2020-09-18 重庆邮电大学 High-efficiency three-way doherty power amplifier based on power dividing ratio and phase-adjustable bridge

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109274343A (en) * 2018-11-09 2019-01-25 华南理工大学 A kind of power amplifier stackable with energy
CN109274343B (en) * 2018-11-09 2024-05-31 华南理工大学 Power amplifier with energy superposition function
CN111682852A (en) * 2020-06-23 2020-09-18 重庆邮电大学 High-efficiency three-way doherty power amplifier based on power dividing ratio and phase-adjustable bridge
CN111682852B (en) * 2020-06-23 2024-01-26 重庆嘉旦微电子有限公司 High-efficiency three-way doherty power amplifier based on power ratio and phase adjustable bridge

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