CN207651477U - Semiconductor package body and lead frame item - Google Patents
Semiconductor package body and lead frame item Download PDFInfo
- Publication number
- CN207651477U CN207651477U CN201820017640.7U CN201820017640U CN207651477U CN 207651477 U CN207651477 U CN 207651477U CN 201820017640 U CN201820017640 U CN 201820017640U CN 207651477 U CN207651477 U CN 207651477U
- Authority
- CN
- China
- Prior art keywords
- thickness
- carrying tablet
- semiconductor package
- package body
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model is related to semiconductor package body and lead frame items.According to the lead frame item of one embodiment of the utility model comprising carrying tablet, cooling fin and several pins.Wherein, which has first thickness, and has the supporting region being set on first surface and the radiating area being set on second surface, and first surface is opposite with second surface；The cooling fin has second thickness, and is connect with the first side of the carrying tablet；Several pins have third thickness, and extend outwardly from the second side of carrying tablet, and the first side is opposite with the second side.In addition, radiating area is not directly contacted with several pins, and first thickness is more than second thickness and third thickness.Semiconductor package body provided by the utility model and lead frame item have thickness compared with the carrying tablet of pin thickness, can the heat that high-power die generates effectively be transmitted to the external world, improve the heat dissipation performance of semiconductor package body.
Description
Technical field
The utility model is related to technical field of semiconductors, more particularly to semiconductor package body and lead frame item.
Background technology
Consumer it is expected the portable electronic products such as mobile phone, digital camera, laptop on thickness and weight
It can accomplish frivolous and not influence its treatment effeciency and function, therefore, the manufacturing enterprise of electronic product needs to further decrease
The size of final products.In the fabrication process, this purpose can be reached using smaller size of semiconductor package body.
However, if integrating the chip of multiple and different functions in single semiconductor packages body, what chip generated when running
Heat is easy to keep the temperature in semiconductor packages body excessively high, there is certain damage to internal component, affects the stability of product
And shorten the service life of semiconductor package body.
Therefore, to ensure the quality and service life of semiconductor package body, how to be preferably semiconductor package body radiates
The problem of as industry urgent need to resolve.
Utility model content
One of the purpose of this utility model is to provide semiconductor packaging body and lead frame item, can solve semiconductor
The heat dissipation problem of packaging body.
One embodiment of the utility model provides a kind of lead frame item, which includes carrying tablet, cooling fin
And several pins.Wherein, which has first thickness, and has the supporting region being set on first surface and be set to
Radiating area on second surface, first surface are opposite with second surface；The cooling fin have second thickness, and with the carrying tablet
First side connects；Several pins have third thickness, and extend outwardly from the second side of carrying tablet, the first side and the second side phase
It is right.In addition, radiating area is not directly contacted with several pins, and first thickness is more than second thickness and third thickness.
Another embodiment according to the present utility model, on the first surface of the carrying tablet on the region of the supporting region also
It is provided with square groove, annular groove, annular dovetail groove and vertical groove.First thickness is 2.5 times of third thickness.First
Thickness is 50 mils, and third thickness is 20 mils.Carrying tablet is made of copper.
One embodiment of the utility model also provides a kind of semiconductor package body, the semiconductor package body include carrying tablet,
Cooling fin, several pins, circuit to be packaged and insulation shell.Wherein, which has first thickness, and has and be set to
Supporting region on first surface and the radiating area being set on second surface, first surface are opposite with second surface.The cooling fin
It is connect with second thickness, and with the first side of the carrying tablet.Several pins have third thickness, and from the second side of carrying tablet
Extend outwardly, the first side is opposite with the second side.The circuit to be packaged is fixed on supporting region, and is configured to and several pins electricity
Connection.The insulation shell is configured to masking carrying tablet and circuit to be packaged.In addition, radiating area does not connect directly with several pins
It touches, and first thickness is more than second thickness and third thickness.
Another embodiment according to the present utility model, on the first surface of the carrying tablet on the region of the supporting region also
It is provided with square groove, annular groove, annular dovetail groove and vertical groove.First thickness is 2.5 times of third thickness.This is waited for
Encapsulated circuit is fixed on the carrying tablet by viscose, which is the mixture of tin and silver.Carrying tablet can be made of copper.
Semiconductor package body provided by the utility model and lead frame item have thickness compared with the carrying tablet of pin thickness, can be with
The heat that high-power die generates effectively is transmitted to the external world, improves the heat dissipation performance of semiconductor package body.
Description of the drawings
It is the schematic diagram according to the lead frame item of one embodiment of the utility model shown in Fig. 1；
It is the schematic diagram according to the region I of the lead frame item of one embodiment of the utility model shown in Fig. 2；
It is the schematic diagram according to the region II of the lead frame item of one embodiment of the utility model shown in Fig. 3；
It is the schematic diagram according to the region III of the lead frame item of one embodiment of the utility model shown in Fig. 4；
It is the schematic diagram according to the semiconductor package body of one embodiment of the utility model shown in Fig. 5.
Specific implementation mode
To be better understood from the spirit of the utility model, it is made below in conjunction with the part preferred embodiment of the utility model
It further illustrates.
Fig. 1 is the schematic diagram according to the lead frame item 10 of the utility model one embodiment.On the lead frame item 10
It can be configured to carry corresponding circuit 14 to be packaged and other respective elements, connected after a series of processing of packaging technologies
Semiconductor package body 20 (please referring to Fig. 5) together.
As shown in Figure 1, including according to the lead frame item 10 of one embodiment of the utility model：Carrying tablet 11, cooling fin 12
And several pins 13.Wherein, carrying tablet 11 is with first thickness d1Copper sheet, be provided with carrying on first surface 111
Area 113 is configured the corresponding circuit 14 to be packaged of carrying.And the second surface 112 opposite with first surface 111 of carrying tablet 11
On be then provided with radiating area (not shown in figure 1), convenient for subsequently distributing the heat generated inside semiconductor package body.Carrying tablet 11
Also there are two opposite sides, that is, the first side 115 and the second side 116.Cooling fin 12 has second thickness d2, and be set
To be connect with the first side 115 of carrying tablet 11.Several pins 13 have third thickness d3, and from the second side of carrying tablet 11 116
Epitaxial lateral overgrowth is stretched.Circuit 14 to be packaged can be configured to bonding wire 15 in encapsulation process and is electrically connected with several pins 13.
In addition, the radiating area of carrying tablet 11 is not directly contacted with several pins 13, and first thickness d1More than the second thickness
Spend d2And third thickness d3.According to the definition of material thermal conductivity：Material thermal conductivity refers to 1m under the conditions of steady heat transfer
Thick material, the temperature difference of both side surface be 1 degree (K, DEG C), in 1 second (1s), pass through the heat of 1 square metre of area transmission, unit
For watt/ meter Du (W/ (mK), herein by K available DEG C replace), by using thickness, i.e. first thickness d in the present embodiment1Compared with
The copper carrying tablet 11 of other position thickness such as pin 13, can not only improve the intensity of lead frame item 10, avoid subsequently encapsulating
The deformation generated in operation can also improve the heat dissipation performance of obtained semiconductor package body, meet dissipating for high-power die
Heat demand.In addition, having second thickness d2Cooling fin 12 facilitation also is played to the heat dissipation of carrying tablet 11.
An embodiment according to the present utility model, the first thickness d of carrying tablet 111It can be the third thickness of several pins 13
Spend d32.5 times, for example, the first thickness d of carrying tablet 111For 50 mils, the third thickness d of several pins 133For 20 mils.
In other embodiments according to the present utility model, the first thickness d of carrying tablet 111It can be the third thickness d than pin 133
Big other numerical value, it is not limited to the example above.
As in Figure 2-4, lead frame item 10 provided in this embodiment also has some functional grooves, for example, holding
On the first surface 111 of slide glass 11 around supporting region 113 region I, region II and region III on be respectively arranged with it is rectangular recessed
Slot 201, annular groove 202, annular dovetail groove 203 and vertical groove 204.
Fig. 2-4 respectively shows the region I, region II and region of the lead frame item of one embodiment of the utility model
The schematic diagram of III.Specifically, the region I in Fig. 2 includes mainly square groove 201, which sets in array way
It sets near circuit 14 to be packaged.Region II in Fig. 3 includes mainly annular groove 202 and annular dovetail groove 203.In Fig. 4
Region III includes mainly vertical groove 204, is arranged in the both sides of supporting region 113.Above-mentioned functional groove is mainly used for
Enhance the reliability combined between carrying tablet 11 and insulation shell 201 (referring to Fig. 5) in subsequent encapsulation process.
It is according to the schematic diagram of the semiconductor package body 20 of one embodiment of the utility model, the semiconductor packages shown in Fig. 5
The lead frame item 10 in embodiment illustrated in fig. 1 can be used to be made for body 20.The semiconductor package body 20 includes carrying tablet 11, heat dissipation
Piece 12, several pins 13, circuit to be packaged 14 and insulation shell 201.Due to the masking of insulation shell 201, Fig. 5 fails to holding
Slide glass 11 and circuit to be packaged 14 make mark.Viscose is used between the supporting region 113 of circuit 14 and carrying tablet 11 to be packaged
Fixed, which can be the mixture of tin and silver, by the viscose heat that circuit 14 to be packaged generates can be conducted to
The radiating area of carrying tablet 11.Circuit 14 to be packaged can be transistor, rectifier or other can work under high voltage condition
Semiconductor element.Insulation shell 201 may include phenolic group resin (Novolac-based resin), epoxy (epoxy-
Based resin), silicone (silicone-based resin) or other coverings appropriate.Insulation shell 201 also may be used
Including filler appropriate, the e.g. silica of powdery.
In addition, the embodiments of the present invention additionally provide the manufacturing method of semiconductor package body 20 comprising following step
Suddenly：Lead frame item 10 is provided, which can be the lead frame item 10 according to the utility model embodiment.Make
Circuit 14 to be packaged is set on the supporting region 113 of carrying tablet 11 with viscose.With bonding wire 15 connect circuit 14 to be packaged with it is several
Pin 13 is to realize electrical connection configuration between the two.Then the insulation shell for covering circuit 14 and carrying tablet 11 to be packaged can be formed
Body 201.Specifically, forming insulation shell 201, such as compression forming (compression using following encapsulation technology
Molding), injection molding (injection molding) or metaideophone molding (transfer molding).Then, if can incite somebody to action
13 punch forming of main pipe foot ultimately forms semiconductor package body 20 shown in fig. 5.
The technology contents and technical characterstic of the utility model have revealed that as above, however those skilled in the art still may be used
Teaching and announcement that can be based on the utility model and make various replacements and modification without departing substantially from the spirit of the present invention.Therefore, originally
The protection domain of utility model should be not limited to the revealed content of embodiment, and should include various replacing without departing substantially from the utility model
It changes and modifies, and covered by present patent application claims.
Claims (10)
1. a kind of lead frame item comprising：
Carrying tablet with first thickness, and with the supporting region being set on first surface and is set on second surface
Radiating area, the first surface are opposite with the second surface；
Cooling fin is connect with second thickness, and with the first side of the carrying tablet；
Several pins extend outwardly with third thickness, and from the second side of the carrying tablet, first side and described the
Two sides are opposite,
It is characterized in that：The radiating area is not directly contacted with several pins, and the first thickness is more than described second
Thickness and the third thickness.
2. lead frame item according to claim 1, which is characterized in that surrounded on the first surface of the carrying tablet
Square groove, annular groove, annular dovetail groove and vertical groove are additionally provided on the region of the supporting region.
3. lead frame item according to claim 1, which is characterized in that the first thickness is the third thickness
2.5 again.
4. lead frame item according to claim 3, which is characterized in that the first thickness is 50 mils, the third
Thickness is 20 mils.
5. lead frame item according to claim 1, which is characterized in that the carrying tablet is made of copper.
6. a kind of semiconductor package body, the semiconductor package body include：
Carrying tablet with first thickness, and with the supporting region being set on first surface and is set on second surface
Radiating area, the first surface are opposite with the second surface；
Cooling fin is connect with second thickness, and with the first side of the carrying tablet；
Several pins extend outwardly with third thickness, and from the second side of the carrying tablet, first side and described the
Two sides are opposite；
Circuit to be packaged is fixed on the supporting region, and is configured to be electrically connected with several pins；And
Insulation shell is configured to cover the carrying tablet and the circuit to be packaged；
It is characterized in that：The radiating area is not directly contacted with several pins, and the first thickness is more than described second
Thickness and the third thickness.
7. semiconductor package body according to claim 6, which is characterized in that enclosed on the first surface of the carrying tablet
Square groove, annular groove, annular dovetail groove and vertical groove are additionally provided on the region of the supporting region.
8. semiconductor package body according to claim 6, which is characterized in that the first thickness is the third thickness
2.5 again.
9. semiconductor package body according to claim 6, which is characterized in that the circuit to be packaged is fixed on by viscose
The carrying tablet, the viscose are the mixture of tin and silver.
10. semiconductor package body according to claim 6, which is characterized in that the carrying tablet is made of copper.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820017640.7U CN207651477U (en) | 2018-01-05 | 2018-01-05 | Semiconductor package body and lead frame item |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201820017640.7U CN207651477U (en) | 2018-01-05 | 2018-01-05 | Semiconductor package body and lead frame item |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207651477U true CN207651477U (en) | 2018-07-24 |
Family
ID=62876103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201820017640.7U Active CN207651477U (en) | 2018-01-05 | 2018-01-05 | Semiconductor package body and lead frame item |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207651477U (en) |
-
2018
- 2018-01-05 CN CN201820017640.7U patent/CN207651477U/en active Active
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 264205 No. 16-1, Hainan Road, North District, comprehensive bonded zone, Weihai Economic and Technological Development Zone, Shandong Province Patentee after: Riyuexin semiconductor (Weihai) Co.,Ltd. Address before: 264205 no.16-1 Hainan Road, export processing zone, Weihai Economic Development Zone, Shandong Province Patentee before: RIYUEGUANG SEMICONDUCTOR(WEIHAI) Co.,Ltd. |
|
| CP03 | Change of name, title or address |