CN207490907U - A kind of four-way driver - Google Patents
A kind of four-way driver Download PDFInfo
- Publication number
- CN207490907U CN207490907U CN201721697010.0U CN201721697010U CN207490907U CN 207490907 U CN207490907 U CN 207490907U CN 201721697010 U CN201721697010 U CN 201721697010U CN 207490907 U CN207490907 U CN 207490907U
- Authority
- CN
- China
- Prior art keywords
- processing circuit
- circuit
- output
- signal
- digital processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The utility model embodiment discloses four-way driver, including：Audio front end processing circuit is exported for externally input audio signal to be converted to digital audio and video signals to digital processing circuit；Constant-temperature crystal oscillator circuit, for providing clock signal to digital processing circuit；Digital processing circuit for the digital audio and video signals received and the carrier signal itself generated to be modulated, generates four railway digital pumping signals, and export；Output circuit is filtered, input terminal is connected with the output terminal of digital processing circuit, for four railway digital pumping signals to be converted to four tunnel analogue stimulus signals, and is exported after filtered and amplification；Radio frequency amplifying circuit is connect with filtering output circuit, for by four tunnel analogue stimulus signal power amplifications to predetermined power grade；Power circuit, for powering.The four-way driver can be applied in the Shortwave Communication System using multichannel space combination, and effective excitation is provided for each road power amplification device.
Description
Technical field
The utility model embodiment is related to New Technology Of Shortwave Communication more particularly to a kind of four-way driver.
Background technology
Short wave communication relies on ionospheric communication, and communications cost is low, is widely used in the fields such as maritime affairs, fishery, military affairs.For intending
For single-sideband communication equipment using the synthesis of multichannel space phase, it is desirable that existed by the radio-frequency power for entering antenna after transmitter
It is completely the same in phase.
For intend using multichannel space phase synthesis single-sideband communication equipment for, due to the amplification in entire signal with
It is difficult to ensure that being all strict conformance per phase all the way in transmittance process, then require driver conventional sharp in addition to meeting
It encourages except the indices requirement of device while can realize each road output drive signal coherent in phase, and can independently connect
Continuous adjustable, just can guarantee the radiofrequency signal of each antenna in this way, there is best space phase to synthesize.
Utility model content
The utility model embodiment provides a kind of four-way driver, is carried with the four tunnel pumping signals for realizing driver output
Wave frequency rate is continuously adjusted, four tunnel pumping signal phase coherents and Independent adjustable.
The utility model embodiment provides a kind of four-way driver, including：
Audio front end processing circuit, output terminal are connected with digital processing circuit, for by externally input audio signal
Digital audio and video signals are converted to export to the digital processing circuit；
Constant-temperature crystal oscillator circuit, output terminal are connect with the digital processing circuit, for being carried to the digital processing circuit
For clock signal；
The digital processing circuit, for by the digital audio and video signals received and itself generate carrier signal into
Row modulation, generates four railway digital pumping signals, and digital stimulus signal described in tetra- tunnels of Bing Jiang is exported respectively by four output terminals；
Output circuit is filtered, input terminal is connected with the output terminal of the digital processing circuit, for will be counted described in four tunnels
Word pumping signal is converted to four tunnel analogue stimulus signals, analogue stimulus signal described in tetra- tunnels of Bing Jiang is filtered and amplification after respectively by
Four output terminal outputs；
Radio frequency amplifying circuit, four output terminals of four input terminals and the filtering output circuit connect one to one,
For by analogue stimulus signal power amplification described in four tunnels to predetermined power grade；
Power circuit, for powering for the four-way driver.
Further, the audio front end processing circuit includes：
Audio filter amplification circuit, for filtering out the noise in the externally input audio signal, and by the audio
The range-adjusting of signal to suitable A/D sampling A/D chips range；
A/D conversion circuits, including the A/D sampling A/D chips, for the audio signal of filtered amplification to be converted
For the digital audio and video signals, and export to the digital processing circuit.
Further, the filtering output circuit includes：
Four D/A chips are corresponded with the four railway digitals pumping signal of digital processing circuit output, are used for
Digital stimulus signal described in four tunnels is converted into analogue stimulus signal described in four tunnels；
Four excitation filter amplification circuits, correspond with the output terminal of four D/A chips, for described in four tunnels
Analogue stimulus signal is filtered and range-adjusting.
Further, the radio frequency amplifying circuit includes four radio frequencies amplification branches, wherein, the radio frequency amplifies branch packet
HE315 amplification chips are included, the analogue stimulus signal power amplification that will be inputted to predetermined power grade.
Further, the digital processing circuit includes：Fpga chip, wherein, the model of the fpga chip
EP2S90F1020I3。
Further, four-way driver further includes：
Ethernet interface circuit, for connecting host computer and communication processing circuit, to realize the host computer and institute
State the information transmission of communication processing circuit；
The communication processing circuit is connected by bus and/or dual port RAM with the digital processing circuit, for by institute
The control instruction for stating host computer transmission is transmitted to the digital processing circuit, so that the digital processing circuit is according to the control
Instruction adjustment output and the work state information and parameter preset that send the digital processing circuit are transmitted to described upper
Machine.
Further, four-way driver further includes：
Input interface circuit, for external pulse signal to be converted to the fiduciary level for adapting to the digital processing circuit；
Output interface circuit, the output drive signal for the digital processing circuit to be exported are converted to preset standard electricity
Ordinary mail number, and output is isolated, the output driving circuit in the output interface circuit to be driven externally to export.
Further, the input interface circuit includes：
First electrical level transferring chip, for input terminal for receiving external electric impulse signal, output terminal connects the number
Processing circuit, wherein, the model 74FCT164245 of first electrical level transferring chip.
Further, the input interface circuit further includes：
First light-coupled isolation element, for input terminal for receiving external light pulse signal, output terminal connects described first
The input terminal of electrical level transferring chip, wherein, the peak data transfer rate of the first light-coupled isolation element is more than or equal to 10,000,000.
Further, the output interface circuit includes：
Second electrical level conversion chip, input terminal connect the digital processing circuit, and output terminal connects the second light-coupled isolation
The input terminal of element, for the output drive signal that the digital processing circuit exports to be converted to the preset standard electricity
Ordinary mail number；
The second light-coupled isolation element, output terminal connect the input port of the output driving circuit；
The output driving circuit, for according to the output drive signal for being converted to the preset standard level signal
Externally output.
The utility model embodiment provides four tunnel pumping signals by using digital mode, solves using multichannel space
The problem of phase equalization on the single-sideband communication equipment Zhong Ge roads of phase measurements is not high realizes the carrier frequency of four tunnel pumping signals
Rate is continuously adjusted, the effect of phase coherent and Independent adjustable.
Description of the drawings
Fig. 1 is a kind of structure diagram of four-way driver in the utility model embodiment one；
Fig. 2 is a kind of structure diagram of four-way driver in the utility model embodiment two；
Fig. 3 is the circuit diagram of the audio filter amplification circuit in the utility model embodiment two；
Fig. 4 is the circuit diagram of the A/D conversion circuits in the utility model embodiment two；
Fig. 5 is the circuit diagram of the chips of D/A all the way and excitation filter amplification circuit in the utility model embodiment two；
Fig. 6 is the gain frequency response curve of the HE315 chips in the utility model embodiment two；
Fig. 7 is that the output power of the HE315 chips in the utility model embodiment two and 3 ranks intercept and capture point curve；
Fig. 8 is a kind of structure diagram of four-way driver in the utility model embodiment three；
Fig. 9 is the circuit diagram of the ethernet interface circuit in the utility model embodiment three；
Figure 10 is the circuit diagram of the communication processing circuit in the utility model embodiment three；
Figure 11 is the circuit diagram of the input interface circuit in the utility model embodiment three；
Figure 12 is the circuit diagram of the output interface circuit in the utility model embodiment three；
Figure 13 is the circuit diagram of the serial line interface in the utility model embodiment three；
Figure 14 is the circuit diagram of the power circuit in the utility model embodiment three；
Figure 15 is the flow chart of the four-way driver ethernet communication in the utility model embodiment three；
Figure 16 is the signal flow diagram under the four-way driver SSB modulating modes in the utility model embodiment three.
Specific embodiment
The utility model is described in further detail with reference to the accompanying drawings and examples.It is understood that herein
Described specific embodiment is used only for explaining the utility model rather than the restriction to the utility model.It further needs exist for
It is bright, part relevant with the utility model rather than entire infrastructure are illustrated only for ease of description, in attached drawing.
Embodiment one
Fig. 1 is the structure diagram of a kind of four-way driver that the utility model embodiment one provides, and the present embodiment can
Suitable for intending the single-sideband communication equipment using the synthesis of multichannel space phase, which specifically includes：
Audio front end processing circuit 110, output terminal is connected with digital processing circuit, for externally input audio to be believed
Number being converted to digital audio and video signals exports to digital processing circuit 130.
Wherein, externally input audio signal is subjected to front-end processing first, is primarily referred to as filtering and enhanced processing, it can be with
Understand, enhanced processing refers to adjust externally input audio signal to externally input audio signal is made to be converted to A/D
Then the analog signal that sampling A/D chip can be handled normally is converted the analog signal obtained after conversion by A/D sample circuits
It is input in digital processing circuit 130 and is calculated for digital audio and video signals.
Constant-temperature crystal oscillator circuit 120, output terminal are connect with digital processing circuit 130, for being provided to digital processing circuit
Clock signal.
Digital processing circuit 130, for the digital audio and video signals received and the carrier signal itself generated to be adjusted
System generates four railway digital pumping signals, and four railway digital pumping signals is exported respectively by four output terminals.
Wherein, digital processing circuit 130 includes having the microprocessor handled digital signal, the microprocessor
Built-in digital controlled oscillator (Numerically Controlled Oscillators, NCO), then just need to be input to microprocessor
The quality of the clock signal of device reaches preset standard, such as the indexs such as the frequency stability of clock signal and phase stability meet
It is required that.Ensure the quality of clock signal using constant-temperature crystal oscillator circuit 120, utilize the IP kernel of the NCO in microprocessor
(intellectual property core) builds carrier wave output signal, and such carrier frequency also can be by external control signal
Control, realizes the variation of external output frequency, just obtains digitized carrier signal in the microprocessor in this way.It is exemplary,
Microprocessor is fpga chip, wherein, the model EP2S90F1020I3 of fpga chip.
Output circuit 140 is filtered, input terminal is connected with the output terminal of digital processing circuit, for four railway digitals to be encouraged
Signal is converted to four tunnel analogue stimulus signals, tetra- tunnel analogue stimulus signals of Bing Jiang are filtered and amplification after respectively by four output terminals
Output.
Radio frequency amplifying circuit 150, four input terminals connect one to one with filtering four output terminals of output circuit, use
Tetra- tunnel analogue stimulus signal power amplifications of Yu Jiang are to predetermined power grade.
Power circuit 160, for powering for four-way driver.
Wherein, for double-side band (double-sideband, DSB) modulation system, by digital audio and video signals and carrier wave
Signal will generate digital stimulus signal after being directly modulated, which is input in filtering output circuit 140 and is converted into
Analogue stimulus signal externally exports, and carries out certain smothing filtering by filter circuit and amplifying circuit carries out range-adjusting, can
To ensure the quality of external output drive signal.For the modulation of single-side belt (single-sideband, SSB), difference is only
It is to modulate the programming difference calculated, hardware circuit is then duplicate.
The principle analysis of the four-way driver is as follows：
The Core Feature of SSB drivers combination is to generate the pumping signal under multiple-working mode, driving short wavelength emissions
Machine externally exports broadcast, and upper side band (upper-sideband, USB), lower sideband (low- are supported in the combination of this driver
Sideband, LSB) modulation system, wherein USB and LSB are collectively referred to as SSB modulation systems.
DSB modulation refers to mode of the audio signal to the direct amplitude-modulating modulation of carrier signal, and the envelope of signal is after modulation
For audio signal；
If single-tone frequency modulation is：
M (t)=Am cos ωmT formulas (1)
Carrier wave is：
C (t)=cos ωcT formulas (2)
Then the time-domain representation formula of the modulated signals of DSB is：
It is complete symmetrical frequency spectrum by visible two the Sideband Spectrums in carrier wave both sides of the principle analysis of DSB, while can
KnowAndAll include complete audio-frequency information, as long as therefore transmitting it
In the information of a sideband transmission of entire audio-frequency information can be realized, this modulation system is referred to as SSB modulation, retains top
Band partModulation system be USB modulation, retain sideband portionReferred to as
For LSB modulation systems.
The method for realizing SSB modulation can be generally divided into filter method, phase-shifting method, weaver methods etc..
The operation principle that wherein filter method is realized is obtained to carry out DSB modulation to single audio signal and carrier signal first
Symmetrical two side informations (With), then pass through the method for filtering
One of sideband is filtered and retains another sideband, is amplified and emits so as to obtain single-side belt pumping signal.Using
The difficult point that filter method is realized is that the frequency of left side band and the right band is broadband signal of the bandwidth for 300Hz-3000Hz,
And it is closely spaced between two sidebands, wave filter is needed to have precipitous cut-off characteristics, wave filter in order to ensure signal quality
Manufacture difficulty is larger.Realized that difficulty is all larger by the way of analog circuit or using the method for number, therefore
The rarely found of SSB modulation is carried out using this method at present.
The realization principle of phase-shifting method is described below, retaining in formula 3 after top information is decomposed can obtain：
Retaining side information can obtain：
By in above-mentioned two formula it is seen that realize SSB modulation can be by realizing sin ωmtsinωcThe mode of t realizes,
And sin ωmT can be regarded as audio signal cos ωmT phase shiftsAs a result, similary sin ωmT can be regarded as phase-shifting carrier waveKnot
Fruit realizes that SSB modulation systems are referred to as phase-shifting method by this method.Constant (gain is stick signal amplitude in the method
1), signal carries outThe transform method of phase shift is converted for Hilbert, and the difficult point that this method is realized is the system of broadband phase-shift network
Make, if realizing that its difficult point is the realization of Hilbert transformation using the method for number.It to be realized for audio signal whole
All signals are accurately in a audio frequency rangePhase shift, if it is considered that carrier signal working frequency points in information exchanging process
Variation, then also to realize in entire carrier operation frequency rangePhase shift.It is real for the method using analog circuit
Existing difficulty is very big, and difficult to realize accuratePhase shift, while certain fluctuation is also brought along in signal gain.It is right
For being realized by the way of number, for NCO built in particularly FPGA realizes the method for carrier frequency, for different carrier waves
The phase shift of frequency has no longer been difficult point, and key problem is the Hilbert transformation to single audio signal, generally use high-order
FIR filter goes to approach Hilbert transformation, needs to ensure that FPGA has stronger signal handling capacity, but with current
The high speed development of FPGA, operational capability is no longer problem already at this stage, therefore realizes phase-shifting method SSB using digital method at present
The method of modulation has had been provided with ripe condition.
Weaver methods are finally introduced, this method is a kind of method for being combined filter method and phase-shifting method, can be effective
Overcome disadvantage existing for above two method, the stage particularly not yet to grow up in FPGA technology is realized in analog circuit
Application in, this method has significant advantage and is used widely.
If the highest frequency of single audio signal is ωM, single audio signal is subjected to first time orthogonal modulation first：
By above-mentioned it can be seen that ωMFor known fixed frequency, therefore to realize that phase shift is simple, and two obtained
The frequency interval of a orthogonal signalling can reach ωM, design is filtered under the conditions of this filtering one of sideband signals is
It is easier what is realized, then by taking LSB is modulated as an example, by that can be obtained after low-pass filter：
Second of orthogonal modulation is carried out again to above-mentioned two formula：
Likewise, to realize that above-mentioned orthogonal modulation is also fairly simple feasible, for single carrier wave.But
It is that also easily analysis is learnt from analysis above, realizes that the modulation of the SSB under weaver methods needs to be modulated twice, but also
It needs to be filtered, implement more complicated for the phase-shifting method that compares.This method in the angle realized in analog circuit
Optimal selection is still, but for the digital modulation mode of current increased popularity, party's rule is realized than phase-shifting method
It is more complicated, therefore in the circuit being modulated using digital method, this method is using also less extensive.
By above-mentioned analysis, the utility model realizes SSB modulation, i.e., the side converted using Hilbert using phase-moving method
Method carries out SSB modulation designs, and realize that also allowing for the later stage realizes remote control using the method for number, including carrier frequency
Rate switching, modulation system selection, the adjustment of excitation amplitude, phase adjustment etc..
The utility model embodiment provides four tunnel pumping signals by using digital mode, solves using multichannel space
The problem of phase equalization on the single-sideband communication equipment Zhong Ge roads of phase measurements is not high realizes the carrier frequency of four tunnel pumping signals
Rate is continuously adjusted, the effect of phase coherent and Independent adjustable.
Embodiment two
Fig. 2 is the structure diagram of a kind of four-way driver that the utility model embodiment two provides, the present embodiment
Technical solution is further refined on the basis of the technical solution of above-described embodiment, optionally, audio front end processing circuit 110
Including：
Audio filter amplification circuit 111, for filtering out the noise in externally input audio signal, and by audio signal
Range-adjusting to suitable A/D sampling A/D chips range.Wherein, it is exemplary, as shown in figure 3, being adopted in audio filter amplification circuit 111
The audio signal for balancing input is converted to single-ended signal with the high-precision differential amplifier N6 of model AD629 to export, later
By the DC component that capacitance C3 removal circuits are brought, being made of resistance R19 and resistance R21 for rear end is then sequentially entered
Bleeder circuit, by what the amplifier N9C and peripheral element of model OP07 were formed follow circuit and by model OP07's
In the amplifying circuit of amplifier N9A and peripheral element composition, audio signal is carried out appropriate scale conversion can locate for A/D chips
The signal of reason.Optionally, enter A/D sampling A/D chips before be designed with by model be NE5532 operational amplifier N3A and
The audio filter circuit of N3B and peripheral element composition improve the quality of input signal.
A/D conversion circuits 112, including A/D sampling A/D chips, for the audio signal of filtered amplification to be converted to number
Audio signal, and export to digital processing circuit 130.Wherein, it is exemplary, as shown in figure 4, A/D conversion circuits are using dedicated
High-precision A/D sampling A/D chips are designed realization.CS5351 is a 24 sampling A/D chips dedicated for audio A/D samplings,
Dynamic range may be up to 108dB, and sample rate may be up to 192k, and external digital interface is compatible LVTTL and TLL level, can
It is seamlessly connected with FPGA circuitry, does not need to carry out the processing such as additional level conversion again.
Optionally, digital processing circuit 130 is realized using the stratix II Series FPGAs of altera companies, selected
Model EP2S90F1020I3, the chip possess resource and quick arithmetic speed in enough pieces, can be good at meeting system
It unites and data is calculated and the demand of logical operation, particularly its internal signal processing unit and to NCO, phaselocked loop
(PhaseLockedLoop, PLL), low-voltage differential signal (Low-Voltage Differential Signaling, LVDS)
Deng support function greatly facilitate the realization of system.
Optionally, filtering output circuit 140 includes：
Four D/A chips 141 are corresponded with the four railway digital pumping signals that digital processing circuit 130 exports, for inciting somebody to action
Four railway digital pumping signals are converted to four tunnel analogue stimulus signals；
Four excitation filter amplification circuits 142, correspond with the output terminal of four D/A chips, for being simulated to four tunnels
Pumping signal is filtered and range-adjusting.It is exemplary, as shown in figure 5, being shown in which that D/A chips all the way and excitation filtering are put
Big circuit, pumping signal is obtained, therefore by smothing filtering after D/A circuits directly output to the more demanding of D/A chips, in order to right
The guarantee of output drive signal, the model AD9744 for the D/A chips D2 that this system is selected.The chip is quick for 14 high-precisions
D/A chips, highest frequency is up to 210MSPS, for carrier frequency is the signal of 3M-27MHz, even highest carrier wave
27MHz can at least ensure have more than 7 points in each period, the signal of D/A chips output can be good at completing signal
Reduction.It is realized and filtered using capacitance C14, the amplifying circuit pair formed using the amplifier D3 and peripheral element of model AD8047
Analogue stimulus signal carries out range-adjusting.
Optionally, radio frequency amplifying circuit 150 includes four radio frequencies amplification branches, wherein, radio frequency amplification branch includes HE315
Amplification chip, by the analogue stimulus signal power amplification inputted to predetermined power grade.The amplification core that amplifier circuit uses
Piece HE315, the key technical indexes are as follows：
Frequency range：1~110MHz；Typical gains：20dB；Noise coefficient：4.5；P1dB output powers：27dBm；Standing wave
Than：1.5:1；As shown in Figure 6 and Figure 7, it is 25 DEG C, 85 DEG C and -55 that HE315 is set forth in temperature to the gain curve of the chip
The output power P of gain frequency response curve and HE315 at DEG C-1With 3 rank capture point OIP3 curves.
The technical solution of the present embodiment, the function that system is facilitated using fpga chip is realized, coordinates other circuit modules,
Realize four tunnel pumping signals of output.
Embodiment three
Fig. 8 is the structure diagram of a kind of four-way driver that the utility model embodiment three provides, the present embodiment
Technical solution is further refined on the basis of the technical solution of above-described embodiment, and optionally, four-way driver also wraps
It includes：
Ethernet interface circuit 170, for connecting host computer and communication processing circuit 180, with realize host computer and
The information transmission of communication processing circuit 170；
Communication processing circuit 180 can be connected by bus and/or dual port RAM with digital processing circuit 130, for inciting somebody to action
The control instruction that host computer is sent is transmitted to digital processing circuit 130, so that digital processing circuit 130 is adjusted according to control instruction
Output and the work state information and parameter preset that send digital processing circuit 130 are transmitted to host computer.
Wherein, exemplary, ethernet interface circuit is as shown in Figure 9.Ethernet segment uses Ethernet interface core
Piece W5100 is designed realization, which is built-in with 10/100 ethernet controller, it may be convenient to applied to not grasping
Make the Ethernet connection of system, be internally integrated ICP/IP protocol stack, MAC layer and the PHY layer of devices at full hardware.Use the chip
Without the concern for the control of Ethernet, simple socket programmings only need to be carried out.It is exemplary, communication processing circuit such as Figure 10
Shown in, communication processing circuit realizes the relevant function of ethernet communication using dsp chip.
Optionally, four-way driver further includes：
Input interface circuit 190, for external pulse signal to be converted to the standard electric for adapting to digital processing circuit 130
It is flat；Wherein, external pulse signal can be electric impulse signal, can also be light pulse signal.
Output interface circuit 200, the output drive signal for digital processing circuit 130 to be exported are converted to preset standard
Level signal, and output is isolated, the output driving circuit in output interface circuit to be driven externally to export.
Optionally, input interface circuit 190 includes：
First electrical level transferring chip 191, for receiving external electric impulse signal, output terminal connects at number input terminal
Circuit 130 is managed, wherein, the model 74FCT164245 of the first electrical level transferring chip 191.
Optionally, input interface circuit 190 further includes：
First light-coupled isolation element 192, for input terminal for receiving external light pulse signal, output terminal connection first is electric
The input terminal of flat conversion chip 191, wherein, the peak data transfer rate of the first light-coupled isolation element 192 is more than or equal to 10,000,000.Show
Example, input interface circuit is as shown in figure 11, can be by TTL electricity by the first electrical level transferring chip of model 74FCT162245
Flat turn is changed to LVTTL level, realizes the matching with FPGA and dsp chip interface level.First light-coupled isolation element can be adopted
With the rapid light coupling of model TLP113, peak data transfer rate may be up to 10M.
Further, output interface circuit 200 includes：
Second electrical level conversion chip 201, input terminal connection digital processing circuit 130, output terminal connect the second optocoupler every
Input terminal from element 202, the output drive signal for digital processing circuit 130 to be exported are converted to preset standard level letter
Number；
Second light-coupled isolation element 202, output terminal connect the input port of output driving circuit 203；
Output driving circuit 203, for externally being exported according to the output drive signal for being converted to preset standard level signal.
Wherein, exemplary, the primary structure of output interface circuit is as shown in figure 12.Output par, c, first by LVTTL level
Transistor-Transistor Logic level is converted to, is then isolated through the second light-coupled isolation element, model may be used in the second light-coupled isolation element
The rapid light coupling of TLP113, driving output driving circuit externally export, and model may be used in driving output driving circuit
The chip of ULN2003, the chip maximum drive cable may be up to 0.5A, can meet the driving output of multiple use.
Optionally, four-way driver further includes：Serial line interface is set for the compatibility for fully considering a variety of serial line interfaces
Meter, is designed with 232 interface circuits and 422 interface circuits of standard, the design about this part is very ripe, no longer in detail
It states, exemplary, the circuit diagram of serial line interface is as shown in figure 13.
Further, the power supply of a variety of different voltages grades is related to inside the four-way driver, from simplified power supply
Interface angularly sets out the external power interface of circuit board equipped with+5V and two kinds of power interfaces of+3.3V, inside need+3.3V ,+
5V ,+2.5V ,+1.4V and+1.2V etc., exemplary, the circuit diagram of partial power circuit is as shown in figure 14.
Specifically, software of both being mainly concerned in the four-way driver：Dsp software and FPGA programs are set
Meter.Wherein DSP mainly handles ethernet communication related content, and FPGA is used to implement the correlations such as modulation, filtering and logical operation
Content, the flow chart of four-way driver ethernet communication, as shown in figure 16.
The Core Feature of FPGA is the realization of more modulation function, and since the program of FPGA performs structure and DSP not
Together, it is parallel organization, then from the point of view of signal stream, the signal flow diagram under four-way driver SSB modulating modes, other
Modulation system is similar therewith, and concrete signal stream will no longer provide detailed description.
The technical solution of the present embodiment, by the way of digital, external interface is standard work for external man-machine interface
Industrial Ethernet interface, easy to use, perfect in shape and function and powerful.Since each road output of the device can spirit in amplitude and phase
The device can be conveniently applied in the Shortwave Communication System using multichannel space combination, be each by the features such as adjustment living
Road power amplification device provides effective excitation.
Note that it above are only the preferred embodiment of the utility model and institute's application technology principle.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, can carry out for a person skilled in the art various bright
Aobvious variation is readjusted and is substituted without departing from the scope of protection of the utility model.Therefore, although passing through above example
The utility model is described in further detail, but the utility model is not limited only to above example, is not departing from
In the case that the utility model is conceived, other more equivalent embodiments can also be included, and the scope of the utility model is by appended
Right determine.
Claims (10)
1. a kind of four-way driver, which is characterized in that including：
Audio front end processing circuit, output terminal are connected with digital processing circuit, for externally input audio signal to be converted
It is exported for digital audio and video signals to the digital processing circuit；
Constant-temperature crystal oscillator circuit, output terminal are connect with the digital processing circuit, during for being provided to the digital processing circuit
Clock signal；
The digital processing circuit, for the digital audio and video signals received and the carrier signal itself generated to be adjusted
System, generates four railway digital pumping signals, and digital stimulus signal described in tetra- tunnels of Bing Jiang is exported respectively by four output terminals；
Output circuit is filtered, input terminal is connected with the output terminal of the digital processing circuit, for number described in four tunnels to be swashed
Encourage signal and be converted to four tunnel analogue stimulus signals, analogue stimulus signal described in tetra- tunnels of Bing Jiang is filtered and amplification after respectively by four
Output terminal exports；
Radio frequency amplifying circuit, four output terminals of four input terminals and the filtering output circuit connect one to one, are used for
By analogue stimulus signal power amplification described in four tunnels to predetermined power grade；
Power circuit, for powering for the four-way driver.
2. four-way driver according to claim 1, which is characterized in that the audio front end processing circuit includes：
Audio filter amplification circuit, for filtering out the noise in the externally input audio signal, and by the audio signal
Range-adjusting to suitable A/D sampling A/D chips range；
A/D conversion circuits, including the A/D sampling A/D chips, for the audio signal of filtered amplification to be converted to institute
Digital audio and video signals are stated, and are exported to the digital processing circuit.
3. four-way driver according to claim 1, which is characterized in that the filtering output circuit includes：
Four D/A chips are corresponded with the four railway digitals pumping signal of digital processing circuit output, for by four
Digital stimulus signal described in road is converted to analogue stimulus signal described in four tunnels；
Four excitation filter amplification circuits, correspond with the output terminal of four D/A chips, for simulation described in four tunnels
Pumping signal is filtered and range-adjusting.
4. four-way driver according to claim 1, which is characterized in that the radio frequency amplifying circuit includes four radio frequencies
Amplify branch, wherein, the radio frequency amplification branch includes HE315 amplification chips, the analogue stimulus signal work(that will be inputted
Rate is amplified to predetermined power grade.
5. four-way driver according to claim 1, which is characterized in that the digital processing circuit includes：FPGA cores
Piece, wherein, the model EP2S90F1020I3 of the fpga chip.
6. four-way driver according to claim 1, which is characterized in that further include：
Ethernet interface circuit, for connecting host computer and communication processing circuit, to realize the host computer and described logical
Believe the information transmission of processing circuit；
The communication processing circuit is connected by bus and/or dual port RAM with the digital processing circuit, for will be described
The control instruction that position machine is sent is transmitted to the digital processing circuit, so that the digital processing circuit is according to the control instruction
Adjustment output and the work state information and parameter preset that send the digital processing circuit are transmitted to the host computer.
7. four-way driver according to claim 1, which is characterized in that further include：
Input interface circuit, for external pulse signal to be converted to the fiduciary level for adapting to the digital processing circuit；
Output interface circuit, the output drive signal for the digital processing circuit to be exported are converted to preset standard level letter
Number, and output is isolated, the output driving circuit in the output interface circuit to be driven externally to export.
8. four-way driver according to claim 7, which is characterized in that the input interface circuit includes：
First electrical level transferring chip, for input terminal for receiving external electric impulse signal, output terminal connects the digital processing
Circuit, wherein, the model 74FCT164245 of first electrical level transferring chip.
9. four-way driver according to claim 8, which is characterized in that the input interface circuit further includes：
First light-coupled isolation element, for input terminal for receiving external light pulse signal, output terminal connects first level
The input terminal of conversion chip, wherein, the peak data transfer rate of the first light-coupled isolation element is more than or equal to 10,000,000.
10. four-way driver according to claim 7, which is characterized in that the output interface circuit includes：
Second electrical level conversion chip, input terminal connect the digital processing circuit, and output terminal connects the second light-coupled isolation element
Input terminal, believe for the output drive signal that the digital processing circuit exports to be converted to the preset standard level
Number；
The second light-coupled isolation element, output terminal connect the input port of the output driving circuit；
The output driving circuit, for external according to the output drive signal for being converted to the preset standard level signal
Output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721697010.0U CN207490907U (en) | 2017-12-08 | 2017-12-08 | A kind of four-way driver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721697010.0U CN207490907U (en) | 2017-12-08 | 2017-12-08 | A kind of four-way driver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207490907U true CN207490907U (en) | 2018-06-12 |
Family
ID=62457761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721697010.0U Active CN207490907U (en) | 2017-12-08 | 2017-12-08 | A kind of four-way driver |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207490907U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107888209A (en) * | 2017-12-08 | 2018-04-06 | 北京航天广通科技有限公司 | A kind of four-way driver |
-
2017
- 2017-12-08 CN CN201721697010.0U patent/CN207490907U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107888209A (en) * | 2017-12-08 | 2018-04-06 | 北京航天广通科技有限公司 | A kind of four-way driver |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103795474B (en) | A kind of signal interference method and device | |
| CN204731577U (en) | A kind of multifunctional signal generator based on FPGA | |
| CN104570010B (en) | portable standard interference source | |
| CN106230516B (en) | Radar communication based on microwave photon fights integral system | |
| CN207490907U (en) | A kind of four-way driver | |
| WO2011116578A1 (en) | Method and device for determining bias point of modulator | |
| CN104485893B (en) | Wideband electrical signal frequency mixer and method | |
| CN103986484A (en) | Compensation method for unbalanced broadband intermediate frequency signal amplitudes | |
| CN106899355B (en) | Full light technology microwave receiving system and method | |
| CN103926577B (en) | A kind of ultrasonic emitting receives system | |
| CN105324941B (en) | The modulation of differential current mode low latency and demodulation connected for chip to chip | |
| CN107888209A (en) | A kind of four-way driver | |
| CN208046596U (en) | A kind of transmission channel signal processing system for multi-channel digital TR components | |
| CN107517174B (en) | A kind of phase-shift keying (PSK) demodulator circuit based on analog switch | |
| CN216751799U (en) | Digital-analog simulcast broadcast transmitting system | |
| CN207053517U (en) | A kind of optical signal launch end and millimeter wave light carrier radio communication system | |
| CN102984106B (en) | Binary frequency shift keying modulation system | |
| CN110198194A (en) | Radio modulation signal generation apparatus | |
| CN106059683B (en) | Pulse-modulated signal transmitting device and method, communication device and signal processing device | |
| CN210807235U (en) | FM modulation transmitting system with two-way signal simultaneous transmission | |
| CN204669342U (en) | Based on the Low phase noise small sized wide-band signal source of PLL frequency multiplication and frequency splitting technology | |
| CN102946370A (en) | FPGA (field programmable gate array)-based method for realizing FM (frequency modulation) and demodulating digital logic circuit | |
| CN103763001B (en) | Based on the shortwave transceiving digital signals treatment circuit of cpci bus | |
| CN206060813U (en) | A kind of multicarrier synthesizes modulating system | |
| CN105933072A (en) | Device for simulating optical link linearization |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |