CN207475210U - A kind of device for inhibiting inverter parallel system disturbance - Google Patents

A kind of device for inhibiting inverter parallel system disturbance Download PDF

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Publication number
CN207475210U
CN207475210U CN201721664371.5U CN201721664371U CN207475210U CN 207475210 U CN207475210 U CN 207475210U CN 201721664371 U CN201721664371 U CN 201721664371U CN 207475210 U CN207475210 U CN 207475210U
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voltage
input
output
subtraction
module
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何国锋
杨瑞娟
郑长兵
李佳佳
胡玥
韩耀飞
兰奇逊
弓亚超
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Henan University of Urban Construction
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Henan University of Urban Construction
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Abstract

A kind of device for inhibiting inverter parallel system disturbance, the inverter module being arranged in parallel including at least two, inverter module include inverter main circuit, sample circuit, control circuit.Apparatus structure described in the utility model is simple, the characteristics of realizing conveniently, not only remained original parallel system, but also eliminates simultaneously machine disturbance.Automatic disturbance rejection controller therein can disturb to external synthesis in real time and give corresponding compensation in observation system inside, so as to which automatic disturbance rejection controller be enable to inhibit the deviation because of sampled value in sample circuit to the disturbance caused by electric current, voltage between disturbance and inverter module, so as to which the disturbance for controlling inverter module parallel system is zero.

Description

A kind of device for inhibiting inverter parallel system disturbance
Technical field
The utility model belongs to inverter disturbance rejection technical field more particularly to a kind of inhibition inverter parallel system disturbance Device.
Background technology
With the development of information technology, requirement of the user to AC power power supply capacity and power supply reliability also constantly carries Height, inverter redundant parallel technology are the effective technology means to solve the above problems.
Inverter current sharing control method mainly has master & slave control, droop control, instantaneous Average Current Control and has Work(power, the control of reactive power share current, the key of above-mentioned current equalizing method are to realize dividing equally for load current, it is ensured that negative The active power and reactive power of load are distributed evenly in each parallel module that parallel module inversion is controlled to export alternating current The amplitude of pressure, phase and frequency moment are equal, otherwise will generate active circulation, reactive circular power flow.
Equal Flow Technique using active power, reactive power method is the method controlled based on power averaging, i.e., with active The reference voltage of power controller and reactive power controller control inverter, keep the output of each inverter active power and Reactive power is identical, is controlled so as to fulfill dividing equally for load current.It is controlled based on active power, reactive power share current Method, since its good equal mobility and reliability are widely used in actual industrial.
The inverter parallel device controlled based on active power, reactive power share current used now, works as inverter It is not right since switching tube saturation voltage drop is inconsistent, driving pulse distributes above and below same bridge arm during using SPWM Technique The reasons such as claim, the deviation of sampled value in sample circuit can be caused to disturb electric current, voltage band, in addition to this, also inversion mould The disturbance of disturbance between block, using effect are bad.
Utility model content
The utility model is intended to provide a kind of dress for inhibiting inverter parallel system disturbance simple in structure, using effect is good It puts.
In order to solve the above technical problems, the utility model provides following technical solution:A kind of inhibition inverter parallel The device of system disturbance, the inverter module being arranged in parallel including at least two, inverter module include inverter main circuit, sampling electricity Road, control circuit;
Sample circuit includes inductive current sample circuit and inverter output voltage sample circuit, inductive current sample circuit packet Include Hall sensor;
Control circuit includes active power and reactive power calculates module, power automatic disturbance rejection controller, lock phase module, sine Reference wave generation module, voltage automatic disturbance rejection controller, current regulator module and drive module, active power and wattless power meter Two input terminals for calculating module connect the signal output end and inverter output voltage of Hall current sensor in sample circuit respectively The signal output end of sample circuit, two input terminals of power automatic disturbance rejection controller are connected separately with work(power and wattless power meter Two output terminals of module are calculated, other two input terminal of power automatic disturbance rejection controller connects average active power generation mould respectively Block and average reactive power generation module;The of the output terminal connection sinusoid fiducial wave generation module of power automatic disturbance rejection controller 3rd, the 4th input terminal;The signal input part connection synchronous bus of phase module is locked, locks the sinusoidal base of signal output end connection of phase module Second input terminal of quasi wave generation module;The first input end connection voltage magnitude reference value setting of sinusoid fiducial wave generation module Module;The output terminal of sinusoid fiducial wave generation module is connected to the first input end of voltage automatic disturbance rejection controller;Voltage active disturbance rejection Second input terminal of controller is connected with inverter output voltage sample circuit, the output terminal connection electric current of voltage automatic disturbance rejection controller The first input end of adjustor module, the signal output of the second input terminal connection Hall current sensor of current regulator module End;The input terminal of the output terminal connection drive module of current regulator module, the output terminal of drive module drive the first power tube With the conducting and shutdown of the second power tube.
Power automatic disturbance rejection controller includes the first subtraction comparator, the first Nonlinear Tracking Differentiator, the second subtraction comparator, third Subtraction comparator, linear condition error feedback, the 4th subtraction comparator, generator rotor angle converter, the first compensating factor, second compensation because Son, the first extended mode observer ESO, the 5th subtraction comparator, the second Nonlinear Tracking Differentiator, the 6th subtraction comparator, the 7th subtract Method comparator, third compensating factor, reactive voltage converter, the 4th compensating factor, the second extended mode observer ESO;
Average active power generation module connects the positive polarity input terminal of the first subtraction comparator;Active power calculates module and connects The negative polarity input terminal of first subtraction comparator, the output terminal of the first subtraction comparator connect the input of the first Nonlinear Tracking Differentiator End, first, second output terminal of the first Nonlinear Tracking Differentiator connect the positive polarity input terminal and third of the second subtraction comparator respectively The positive polarity input terminal of subtraction comparator, the first extended mode observer ESO of negative polarity input termination of the second subtraction comparator The first output terminal;The first input end of the output end wiring state error ultramagnifier of second subtraction comparator, third subtraction The negative polarity input terminal of comparator connects the second output terminal of the first extended mode observer ESO;Third subtraction comparator it is defeated Second input terminal of outlet connection linear condition error feedback, the output of linear condition error feedback terminate the 4th subtraction comparator Positive polarity input terminal;The output terminal of negative polarity input the first compensating factor of termination of 4th subtraction comparator, the 4th subtraction ratio Compared with the first input end of the output termination generator rotor angle converter of device, the second input terminal connection reactive power of generator rotor angle converter calculates mould Block, the output of generator rotor angle converter connect the third input terminal of sinusoid fiducial wave generation module;The output terminal of generator rotor angle converter is also connected with The first input end of first extended mode observer ESO;Second the second compensation of input termination of first extended mode observer ESO The output terminal of the factor, the output terminal of input the 4th subtraction comparator of termination of the second compensating factor;First extended mode observer The input terminal of third output the first compensating factor of termination of ESO;
Average reactive power generation module connects the positive polarity input terminal of the 5th subtraction comparator;Reactive power calculates module Connect the negative polarity input terminal of the 5th subtraction comparator, the input of output the second Nonlinear Tracking Differentiator of connection of the 5th subtraction comparator End, first, second output terminal of the second Nonlinear Tracking Differentiator connect the positive polarity input terminal and the 7th of the 6th subtraction comparator respectively The positive polarity input terminal of subtraction comparator, the second extended mode observer ESO of negative polarity input termination of the 6th subtraction comparator The first output terminal;The first input end of the output end wiring state error ultramagnifier of 6th subtraction comparator, the 7th subtraction Comparator negative polarity input terminal connects the second output terminal of the second extended mode observer ESO;The output of 7th subtraction comparator The second input terminal of linear condition error feedback is connected, the 8th subtraction comparator of output termination of linear condition error feedback is just Polarity input terminal;The output terminal of the negative polarity input termination third compensating factor of 8th subtraction comparator, the 8th subtraction comparator Output termination reactive voltage converter first input end, reactive voltage converter second input be terminated with work(power generation Module, the 4th input terminal of the output terminal connection sinusoid fiducial wave generation module of reactive voltage converter;Reactive voltage converter Output terminal be also connected with the first input end of the second extended mode observer ESO;The second of second extended mode observer ESO is defeated Enter the output terminal of the 4th compensating factor of termination, the output terminal of input the 8th subtraction comparator of termination of the 4th compensating factor;Second The input terminal of the third output termination third compensating factor of extended mode observer ESO.
Voltage automatic disturbance rejection controller includes voltage extended mode observer ESO, voltage-tracing differentiator, voltage regulation one and subtracts Method comparator, two subtraction comparator of voltage regulation, voltage linear state error feedback, one compensating factor of voltage regulation, voltage regulation three subtract Method comparator, two compensating factor of voltage regulation;The first input end connection sinusoid fiducial wave generation module of voltage-tracing differentiator;Electricity Press the second input terminal of the first output terminal connection one subtraction comparator of voltage regulation of Nonlinear Tracking Differentiator, the of voltage-tracing differentiator Two output terminals connect the second input terminal of two subtraction comparator of voltage regulation, the first input end connection of one subtraction comparator of voltage regulation The first output terminal of voltage extended mode observer ESO;The first input end connection voltage extension of two subtraction comparator of voltage regulation The second output terminal of state observer ESO;The output terminal difference of two subtraction comparator of one subtraction comparator of voltage regulation and voltage regulation Connect two input terminals of voltage linear state error feedback, the output terminal connection voltage regulation three of voltage linear state error feedback The first input end of subtraction comparator;Voltage extended mode observer ESO third output terminal connection voltage regulation one compensation because Son, the second input terminal of the signal output end connection three subtraction comparator of voltage regulation of one compensating factor of voltage regulation;Voltage regulation three subtracts The first output terminal connection two compensating factor of voltage regulation of method comparator, the output terminal connection voltage extension of two compensating factor of voltage regulation The feedback input end of state observer ESO;The second output terminal of three subtraction comparator of voltage regulation is connected by voltage filter module Current regulator module, another input terminal connection inverter output voltage sample circuit of voltage filter module.
The signal output end of average active power generation module and average reactive power generation module is all connected with CAN bus, Average active power and average reactive power are transferred to two inputs of power automatic disturbance rejection controller by signal wire by CAN bus End.
Inverter main circuit includes the first derided capacitors, the second derided capacitors, the first power tube, the second power tube, filtered electrical Sense and filter capacitor;The negative polarity end of first derided capacitors is connected with the positive ends of the second derided capacitors, the first power tube Source electrode and the collector of the second power tube be connected, the collector of the positive ends of the first derided capacitors and the first power tube connects It connects;The negative polarity end of second derided capacitors is connected with the source electrode of the second power tube;Filter inductance one end connects the first power tube Source electrode, filter inductance other end connect one end of filter capacitor, and the other end of filter capacitor connects the first derided capacitors Negative polarity end;The both ends of filter capacitor are connected to after being connected on ac bus.
There are two the inverter module is common.
By above technical scheme, the beneficial effects of the utility model are:Apparatus structure described in the utility model is simple, The characteristics of realizing conveniently, not only having remained original parallel system, but also eliminate simultaneously machine disturbance.Automatic disturbance rejection controller therein can be real When observation system inside with it is external it is comprehensive disturb and give corresponding compensation, so as to which automatic disturbance rejection controller be enable to inhibit because sampling The deviation of sampled value is to the disturbance caused by electric current, voltage between disturbance and inverter module in circuit, so as to control inversion The disturbance of wired in parallel system is zero.
Description of the drawings
Fig. 1 is the utility model circuit diagram;
Fig. 2 is power automatic disturbance rejection controller structure diagram;
Fig. 3 is voltage automatic disturbance rejection controller structure diagram.
Specific embodiment
A kind of device for inhibiting inverter parallel system disturbance, as depicted in figs. 1 and 2, is arranged in parallel including at least two Inverter module, inverter module described in the present embodiment altogether there are two, the structure of two of which inverter module is identical.
Each inverter module has independent power automatic disturbance rejection controller GKR 1 and voltage automatic disturbance rejection controller in this system YKR 1, power automatic disturbance rejection controller GKR 1 and voltage automatic disturbance rejection controller YKR 1 pass through inside observation system and outside It is comprehensive to disturb and give corresponding compensation, so as to which the disturbance for controlling this system is zero.It is real since each inverter module is independent control The decoupling in the system disturbance inhibition of the more inverter modules of this system is showed, control method is simple, reliably, is easy to Project Realization.
Two inverter modules include inverter main circuit, sample circuit, control circuit.
Inverter main circuit includes the first derided capacitors C11, the second derided capacitors C12, the first power tube V1, the second power tube V2, filter inductance L1 and filter capacitor C13.
The negative polarity end of first derided capacitors C11 is connected with the positive ends of the second derided capacitors C12, the first power tube The collector of the source electrode of V1 and the second power tube V2 are connected, the positive ends and the first power tube V1 of the first derided capacitors C11 Collector connection;The negative polarity end of second derided capacitors C12 is connected with the source electrode of the second power tube V2;Filter inductance L1 one end The source electrode of the first power tube V1 is connected, filter inductance L1 other ends connect one end of filter capacitor C13, filter capacitor C13's Other end connects the negative polarity end of the first derided capacitors C11;The both ends of filter capacitor C13 are connected to ac bus after being connected On, load R is parallel on ac bus.
Sample circuit includes inductive current sample circuit and inverter output voltage sample circuit YCY1, inductive current sampling electricity Road includes the Hall current sensor LCY1 being set between the source electrode of the first power tube V1 and filter inductance L1;Inverter output voltage The input terminal of sample circuit YCY1 is connected to the both ends of filter capacitor C13.
Control circuit includes active power and reactive power calculates module J S1, power automatic disturbance rejection controller GKR 1, lock phase Module PLL, sinusoid fiducial wave generation module ZX1, voltage automatic disturbance rejection controller YKR 1, current regulator module TJ 1 and driving Module PWM1.
Two input terminals that active power and reactive power calculate module J S1 connect Hall current sensor LCY1's respectively The signal output end of signal output end and inverter output voltage sample circuit YCY1, two of power automatic disturbance rejection controller GKR 1 Input terminal is connected separately with work(power and reactive power calculates two output terminals of module J S1, power automatic disturbance rejection controller GKR 1 Other two input terminal connect average active power generation module and average reactive power generation module respectively, average wattful power Rate generation module and average reactive power generation module are that the prior art is not shown in the diagram.Wherein, average active power is given birth to Signal output end into module and average reactive power generation module is all connected with CAN bus, and CAN bus will be average by signal wire Active power and average reactive power are transferred to power automatic disturbance rejection controller GKR 1.
The third of the output terminal connection sinusoid fiducial wave generation module ZX1 of power automatic disturbance rejection controller GKR 1, the 4th input End;The signal input part of lock phase module PLL is connected to synchronous bus TB by signal wire, and synchronous bus TB is in parallel two Genlock between inverter module.
Lock the second input terminal of the signal output end connection sinusoid fiducial wave generation module ZX1 of phase module PLL;Sinusoid fiducial The first input end connection voltage magnitude reference value setting module of wave generation module ZX1, voltage magnitude reference value setting module are Existing technology.The output terminal of sinusoid fiducial wave generation module ZX1 is connected to the first input of voltage automatic disturbance rejection controller YKR 1 End;The second input terminal of voltage automatic disturbance rejection controller YKR 1 is connected with inverter output voltage sample circuit YCY1, voltage active disturbance rejection The first input end of the output terminal connection current regulator module TJ 1 of controller YKR 1, the of current regulator module TJ 1 The signal output end of two input terminals connection Hall current sensor LCY1;The output terminal connection driving of current regulator module TJ 1 The input terminal of module PWM1, conducting and the pass of output terminal driving the first power tube V1 and the second power tube V2 of drive module PWM1 It is disconnected.In each inverter module original power governor is substituted with power automatic disturbance rejection controller, voltage automatic disturbance rejection controller respectively And voltage regulator, the circuit structure of the Disturbance Rejection circuit of each inverter module are identical.Each inverter module is by substituting Automatic disturbance rejection controller observation system inside with external comprehensive disturbance and giving corresponding compensation, so as to control inverter parallel system The disturbance of system is zero.
Wherein, as shown in Fig. 2, power automatic disturbance rejection controller GKR 1, which includes the first subtraction comparator 1, first, tracks differential Device 2, the second subtraction comparator 3, third subtraction comparator 4, linear condition error feed back the 5, the 4th subtraction comparator 6, generator rotor angle turns Parallel operation 7, the first compensating factor 8, the second compensating factor 9, the first extended mode observer ESO10, the 5th subtraction comparator 11, Two Nonlinear Tracking Differentiators 12, the 6th subtraction comparator 13, the 7th subtraction comparator 14, linear condition error ultramagnifier the 15, the 8th subtract Method comparator 16, reactive voltage converter 17, third compensating factor 18, the 4th compensating factor 19, the second extended mode observer ESO 20。
Average active power generation module connects the positive polarity input terminal of the first subtraction comparator 1;Active power calculates mould Block connects the negative polarity input terminal of the first subtraction comparator 1, and the output terminal of the first subtraction comparator connects the first Nonlinear Tracking Differentiator 2 Input terminal, first, second output terminal of the first Nonlinear Tracking Differentiator 2 connects the positive polarity input of the second subtraction comparator 3 respectively End and the positive polarity input terminal of third subtraction comparator 4.
The first output terminal of the first extended mode observer ESO10 of negative polarity input termination of second subtraction comparator 3;The The first input end of the output end wiring state error ultramagnifier 5 of two subtraction comparators 3, the cathode of third subtraction comparator 4 Property input terminal connect the first extended mode observer ESO10 second output terminal;The output terminal connecting line of third subtraction comparator 4 Property state error feedback 5 the second input terminal, linear condition error feedback 5 output termination the 4th subtraction comparator 6 anode Property input terminal;The output terminal of negative polarity input the first compensating factor 8 of termination of 4th subtraction comparator 6, the 4th subtraction comparator 6 Output termination generator rotor angle converter 7 first input end, the second input termination wattless power meter of generator rotor angle converter 7 calculates module, The output of generator rotor angle converter 7 connects the third input terminal of sinusoid fiducial wave generation module ZX1.
The output terminal of generator rotor angle converter 7 is also connected with the first input end of the first extended mode observer ESO10;First extension The output terminal of second input the second compensating factor 9 of termination of state observer ESO10, the input termination the of the second compensating factor 9 The output terminal of four subtraction comparators 6.The third output of first extended mode observer ESO10 terminates the defeated of the first compensating factor 8 Enter end.
Average reactive power generation module connects the positive polarity input terminal of the 5th subtraction comparator 11;Reactive power calculates mould Block connects the negative polarity input terminal of the 5th subtraction comparator 11, and the output of the 5th subtraction comparator 11 connects the second Nonlinear Tracking Differentiator 12 Input terminal, the positive polarity that first, second output terminal of the second Nonlinear Tracking Differentiator 12 connects the 6th subtraction comparator 13 respectively is defeated Enter the positive polarity input terminal of end and the 7th subtraction comparator 14.
The first output terminal of the second extended mode observer ESO20 of negative polarity input termination of 6th subtraction comparator 13; The first input end of the output end wiring state error ultramagnifier 15 of 6th subtraction comparator 13, the 7th subtraction comparator 14 Negative polarity input terminal connect the second extended mode observer ESO 20 second output terminal;The output of 7th subtraction comparator 14 The second input terminal of linear condition error feedback 15 is connected, the output of linear condition error feedback 15 terminates the 8th subtraction comparator 16 positive polarity input terminal.
The output terminal of the negative polarity input termination third compensating factor 18 of 8th subtraction comparator 16, the 8th subtraction comparator The first input end of 16 output termination reactive voltage converter 17, the second input of reactive voltage converter 17 are terminated with work(work( Rate generation module, the output of reactive voltage converter 17 connect the 4th input terminal of sinusoid fiducial wave generation module ZX1.
The output terminal of reactive voltage converter 17 is also connected with the first input end of the second extended mode observer ESO20;The Two extended mode observer ESO20 second input termination the 4th compensating factor 19 output terminal, the 4th compensating factor 19 it is defeated Enter the output terminal of the 8th subtraction comparator 16 of termination.The third output termination third compensation of second extended mode observer ESO20 The input terminal of the factor 18.
As shown in figure 3, voltage automatic disturbance rejection controller YKR 1 includes voltage extended mode observer ESO 21, voltage-tracing Differentiator 22, one subtraction comparator 23 of voltage regulation, two subtraction comparator 24 of voltage regulation, voltage linear state error feedback LSEF 25th, one compensating factor module 26 of voltage regulation, three subtraction comparator 27 of voltage regulation, two compensating factor module 28 of voltage regulation, voltage filter Wave module 29.
The first input end connection sinusoid fiducial wave generation module of voltage-tracing differentiator 22, voltage-tracing differentiator 22 The first output terminal connection one subtraction comparator 23 of voltage regulation the second input terminal, the second output terminal of voltage-tracing differentiator 22 Connect the second input terminal of two subtraction comparator 24 of voltage regulation.The first input end connection voltage of one subtraction comparator 23 of voltage regulation The first output terminal of extended mode observer ESO21.The first input end connection voltage extension of two subtraction comparator 24 of voltage regulation The second output terminal of state observer ESO21.
The output terminal of two subtraction comparator 24 of one subtraction comparator 23 of voltage regulation and voltage regulation connects pressure-wire character respectively State error feeds back two input terminals of LSEF25, and the output terminal connection voltage regulation three of voltage linear state error feedback LSEF25 subtracts The first input end of method comparator 27;Voltage extended mode observer ESO21 third output terminal connection voltage regulation one compensation because Submodule 26, the second input of the signal output end connection three subtraction comparator 27 of voltage regulation of one compensating factor module 26 of voltage regulation End.Three subtraction comparator 27 of voltage regulation the first output terminal connection two compensating factor module 28 of voltage regulation, voltage regulation two compensation because The feedback input end of the output terminal connection voltage extended mode observer ESO21 of submodule 28, three subtraction comparator 27 of voltage regulation Second output terminal pass through voltage filter module 29 connect current regulator module TJ1, another input of voltage filter module 29 End connection inverter output voltage sample circuit YCY1.
Since power automatic disturbance rejection controller GKR 1 and voltage automatic disturbance rejection controller YKR 1 can be in real time inside observation system It is disturbed to external synthesis and gives corresponding compensation, so as to which power automatic disturbance rejection controller, voltage automatic disturbance rejection controller be enable to press down Make because sampled value in sample circuit deviation to caused by electric current, voltage disturbance and the second inverter module to the first inversion mould The disturbance of block, so as to which the disturbance for controlling inverter module parallel system is zero.
Apparatus structure described in the utility model is simple, the characteristics of realizing conveniently, not only remained original parallel system, but also disappears In addition to simultaneously machine disturbance.

Claims (6)

1. a kind of device for inhibiting inverter parallel system disturbance, it is characterised in that:The inversion being arranged in parallel including at least two Module, inverter module include inverter main circuit, sample circuit, control circuit;
Sample circuit includes inductive current sample circuit and inverter output voltage sample circuit, and inductive current sample circuit is included suddenly That sensor;
Control circuit includes active power and reactive power calculates module, power automatic disturbance rejection controller, lock phase module, sinusoid fiducial Wave generation module, voltage automatic disturbance rejection controller, current regulator module and drive module, active power and reactive power calculate mould Two input terminals of block connect the signal output end of Hall current sensor and inverter output voltage sampling in sample circuit respectively The signal output end of circuit, two input terminals of power automatic disturbance rejection controller are connected separately with work(power and reactive power calculates mould Two output terminals of block, other two input terminal of power automatic disturbance rejection controller connect respectively average active power generation module and Average reactive power generation module;The third of the output terminal connection sinusoid fiducial wave generation module of power automatic disturbance rejection controller, the Four input terminals;The signal input part connection synchronous bus of phase module is locked, locks the signal output end connection sinusoid fiducial wave of phase module Second input terminal of generation module;The first input end connection voltage magnitude reference value setting mould of sinusoid fiducial wave generation module Block;The output terminal of sinusoid fiducial wave generation module is connected to the first input end of voltage automatic disturbance rejection controller;Voltage active disturbance rejection control Second input terminal of device processed is connected with inverter output voltage sample circuit, the output terminal connection electric current tune of voltage automatic disturbance rejection controller Save the first input end of device module, the signal output of the second input terminal connection Hall current sensor of current regulator module End;The input terminal of the output terminal connection drive module of current regulator module, the output terminal of drive module drive the first power tube With the conducting and shutdown of the second power tube.
2. inhibit the device of inverter parallel system disturbance as described in claim 1, it is characterised in that:Power Active Disturbance Rejection Control Device, which includes the first subtraction comparator, the first Nonlinear Tracking Differentiator, the second subtraction comparator, third subtraction comparator, linear condition, to be missed Poor feedback, the 4th subtraction comparator, generator rotor angle converter, the first compensating factor, the second compensating factor, the first extended mode observer ESO, the 5th subtraction comparator, the second Nonlinear Tracking Differentiator, the 6th subtraction comparator, the 7th subtraction comparator, third compensating factor, Reactive voltage converter, the 4th compensating factor, the second extended mode observer ESO;
Average active power generation module connects the positive polarity input terminal of the first subtraction comparator;Active power calculates module and connects first The negative polarity input terminal of subtraction comparator, the output terminal of the first subtraction comparator connect the input terminal of the first Nonlinear Tracking Differentiator, the First, second output terminal of one Nonlinear Tracking Differentiator connects the positive polarity input terminal of the second subtraction comparator and third subtraction ratio respectively Compared with the positive polarity input terminal of device, the negative polarity input of the second subtraction comparator terminates the first of the first extended mode observer ESO Output terminal;The first input end of the output end wiring state error ultramagnifier of second subtraction comparator, third subtraction comparator Negative polarity input terminal connect the first extended mode observer ESO second output terminal;The output terminal of third subtraction comparator connects Connect the second input terminal of linear condition error feedback, the anode of output the 4th subtraction comparator of termination of linear condition error feedback Property input terminal;The output terminal of negative polarity input the first compensating factor of termination of 4th subtraction comparator, the 4th subtraction comparator The first input end of output termination generator rotor angle converter, the second input terminal connection reactive power of generator rotor angle converter calculate module, work( The output of angle converter connects the third input terminal of sinusoid fiducial wave generation module;The output terminal of generator rotor angle converter is also connected with the first expansion Open up the first input end of state observer ESO;Second input the second compensating factor of termination of first extended mode observer ESO Output terminal, the output terminal of input the 4th subtraction comparator of termination of the second compensating factor;The of first extended mode observer ESO The input terminal of three output the first compensating factors of termination;
Average reactive power generation module connects the positive polarity input terminal of the 5th subtraction comparator;Reactive power calculates module connection The negative polarity input terminal of 5th subtraction comparator, the input terminal of output the second Nonlinear Tracking Differentiator of connection of the 5th subtraction comparator, First, second output terminal of the second Nonlinear Tracking Differentiator connects the positive polarity input terminal and the 7th subtraction of the 6th subtraction comparator respectively The positive polarity input terminal of comparator, the of the second extended mode observer ESO of negative polarity input termination of the 6th subtraction comparator One output terminal;The first input end of the output end wiring state error ultramagnifier of 6th subtraction comparator, the 7th subtraction compare Device negative polarity input terminal connects the second output terminal of the second extended mode observer ESO;The output connection of 7th subtraction comparator Second input terminal of linear condition error feedback, the positive polarity of output the 8th subtraction comparator of termination of linear condition error feedback Input terminal;8th subtraction comparator negative polarity input termination third compensating factor output terminal, the 8th subtraction comparator it is defeated Go out to terminate the first input end of reactive voltage converter, the second input of reactive voltage converter is terminated with work(power generation mould Block, the 4th input terminal of the output terminal connection sinusoid fiducial wave generation module of reactive voltage converter;Reactive voltage converter Output terminal is also connected with the first input end of the second extended mode observer ESO;The second input of second extended mode observer ESO Terminate the output terminal of the 4th compensating factor, the output terminal of input the 8th subtraction comparator of termination of the 4th compensating factor;Second expands Open up the input terminal of the third output termination third compensating factor of state observer ESO.
3. inhibit the device of inverter parallel system disturbance as claimed in claim 1 or 2, it is characterised in that:Voltage active disturbance rejection Controller includes voltage extended mode observer ESO, voltage-tracing differentiator, one subtraction comparator of voltage regulation, voltage regulation two and subtracts Method comparator, voltage linear state error feedback, one compensating factor of voltage regulation, three subtraction comparator of voltage regulation, voltage regulation two are mended Repay the factor;The first input end connection sinusoid fiducial wave generation module of voltage-tracing differentiator;The first of voltage-tracing differentiator Output terminal connects the second input terminal of one subtraction comparator of voltage regulation, the second output terminal connection voltage regulation of voltage-tracing differentiator Second input terminal of two subtraction comparators, the first input end connection voltage extended mode observer of one subtraction comparator of voltage regulation The first output terminal of ESO;The of the first input end connection voltage extended mode observer ESO of two subtraction comparator of voltage regulation Two output terminals;The output terminal of two subtraction comparator of one subtraction comparator of voltage regulation and voltage regulation connects voltage linear state mistake respectively Two input terminals of difference feedback, the first of the output terminal connection three subtraction comparator of voltage regulation of voltage linear state error feedback are defeated Enter end;Third output terminal connection one compensating factor of voltage regulation of voltage extended mode observer ESO, one compensating factor of voltage regulation Signal output end connection three subtraction comparator of voltage regulation the second input terminal;First output terminal of three subtraction comparator of voltage regulation Connect two compensating factor of voltage regulation, the feedback of the output terminal connection voltage extended mode observer ESO of two compensating factor of voltage regulation Input terminal;The second output terminal of three subtraction comparator of voltage regulation connects current regulator module, voltage by voltage filter module Another input terminal connection inverter output voltage sample circuit of filter module.
4. inhibit the device of inverter parallel system disturbance as claimed in claim 3, it is characterised in that:Average active power is given birth to Signal output end into module and average reactive power generation module is all connected with CAN bus, and CAN bus will be average by signal wire Active power and average reactive power are transferred to two input terminals of power automatic disturbance rejection controller.
5. inhibit the device of inverter parallel system disturbance as claimed in claim 4, it is characterised in that:Inverter main circuit includes First derided capacitors, the second derided capacitors, the first power tube, the second power tube, filter inductance and filter capacitor;First partial pressure electricity The negative polarity end of appearance is connected with the positive ends of the second derided capacitors, the current collection of the source electrode of the first power tube and the second power tube Pole is connected, and the positive ends of the first derided capacitors are connected with the collector of the first power tube;The negative polarity of second derided capacitors End is connected with the source electrode of the second power tube;Filter inductance one end connects the source electrode of the first power tube, and filter inductance other end connects One end of filter capacitor is connect, the other end of filter capacitor connects the negative polarity end of the first derided capacitors;The both ends of filter capacitor It is connected on ac bus after being connected.
6. inhibit the device of inverter parallel system disturbance as claimed in claim 5, it is characterised in that:The inverter module has Two.
CN201721664371.5U 2017-12-04 2017-12-04 A kind of device for inhibiting inverter parallel system disturbance Withdrawn - After Issue CN207475210U (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107706944A (en) * 2017-12-04 2018-02-16 河南城建学院 A kind of device for suppressing inverter parallel system disturbance

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107706944A (en) * 2017-12-04 2018-02-16 河南城建学院 A kind of device for suppressing inverter parallel system disturbance
CN107706944B (en) * 2017-12-04 2023-06-09 河南城建学院 Device for inhibiting disturbance of inverter parallel system

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