CN207281204U - A kind of voltage check device - Google Patents
A kind of voltage check device Download PDFInfo
- Publication number
- CN207281204U CN207281204U CN201721198504.4U CN201721198504U CN207281204U CN 207281204 U CN207281204 U CN 207281204U CN 201721198504 U CN201721198504 U CN 201721198504U CN 207281204 U CN207281204 U CN 207281204U
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- output terminal
- door
- power supply
- under test
- equipment under
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- 238000012360 testing method Methods 0.000 claims abstract description 37
- 238000000034 method Methods 0.000 claims abstract description 8
- 230000005611 electricity Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 abstract description 4
- 238000013461 design Methods 0.000 abstract description 2
- 230000001960 triggered effect Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 5
- 230000032683 aging Effects 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 1
- 210000005069 ears Anatomy 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
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Abstract
The utility model discloses a kind of voltage check device, including NOT gate, with door 1, with door 2, delayer, latch, alarm indication circuit, input voltage and output voltage can be detected at the same time, cause equipment under test without output when not powering due to power supply unit, or when power supply unit powers off, failure is when so as to cause equipment under test power down, alarm will not be triggered, when there is power down again after power supply unit power supply, warning circuit will not false alarm, only power supply unit normal power supply when, since equipment under test operation irregularity causes output voltage power down, such situation can just trigger warning circuit alarm.The design can effectively avoid the erroneous judgement of equipment under test operation irregularity, improve the quality of detection, and method is simple, and cost is low, small.
Description
Technical field
The utility model is related to a kind of voltage check device, more particularly to being inputted with DC voltage, DC voltage it is defeated
The voltage while the device of detection gone out.
Background technology
Existing various equipment, to prevent the failure of early stage, can all carry out burn-in screen, for only in height after the manufacturing
The abnormal phenomenon that Wen Shicai can be shown, and abnormal phenomenon will not show when returning to room temperature, problems are difficult to
Screened by typical aging method.
Existing ageing and screening method is high temperature ageing, and whether the forward and backward observation product input voltage of aging is normal, it is impossible to will
The exception detected is latched, and in ageing process, even if output voltage abnormal phenomenon occurs in product, can not be screened
Out.
And existing voltage check device mostly be only output voltage is detected, at the same time input voltage is not detected and
The extremely caused output voltage abnormal conditions of input voltage are excluded.Therefore, existing voltage check device detects output
Voltage power down can not confirm that product causes extremely or abnormal electrical power supply causes.
Utility model content
Have in view of that, can be to input the technical problem to be solved by the present invention is to provide a kind of voltage check device
Detection is carried out at the same time with output voltage, the output that equipment under test during machine is opened due to power supply unit is not also set up or powered
Device power-off, exception will not trigger alarm when causing equipment under test power down.
What the utility model was achieved through the following technical solutions：
A kind of voltage check device：Including NOT gate, with door 1, with door 2, delayer, latch, alarm indication circuit, specifically
Functional block diagram is shown in Fig. 1.
The output terminal Vin of power supply unit connects the input terminal of equipment under test, an input terminal and delayer with door 1 at the same time
Input terminal, the output end vo of equipment under test connects NOT gate input terminal；The output terminal Va connections of NOT gate and another input of door 1
End, is connected and an input terminal of door 2, the output terminal V2 connections of delayer and another input of door 2 with the output terminal V1 of door 1
End, the input terminal of latch, the input of the output terminal VL connection alarm indication circuits of latch are connected with the output terminal V3 of door 2
End.
Power supply unit is powered for equipment under test, and the ground of equipment under test is connected with the ground of power supply unit；The output of equipment under test
End Vo carries out high and low level inversion processing after NOT gate；As the output terminal Va voltages of NOT gate and the output terminal Vin of power supply unit
When voltage is high level at the same time, the output terminal V1 voltages with door 1 are high level.
The output terminal Vin voltages of power supply unit carry out delay process by delayer, and the time delay of the delayer is big
In the starting-up delay time of equipment under test.
When the output terminal V2 voltages of delayer and when being at the same time high level with the output terminal V1 voltages of door 1, the output with door 2
It is high level to hold V3 voltages.
When being high level with the output terminal V3 of door 2, latch is latched the high level of the output terminal V3 with door 2,
And latch outputs VL outputs are high level；When the output terminal VL of latch remains continuously high level, alarm indication
Circuit is persistently alarmed；When being low level with the output terminal V3 of door 2, latch outputs VL outputs be low level, are alarmed
Display circuit is not alarmed.
Compared with prior art, the utility model has following significant effect：
1st, detection can be carried out at the same time to outputting and inputting voltage, equipment under test is different caused by power supply unit exception
Often, alarm will not be triggered, can effectively avoid the erroneous judgement of equipment fault.
2nd, circuit implementations are simple, reliable, small, cost is extremely low, can be largely used to the burn-in screen of equipment under test.
Brief description of the drawings
Fig. 1 is the functional block diagram of the utility model；
Fig. 2 is the application block diagram of the utility model；
Fig. 3 is the schematic diagram of the utility model；
Fig. 4 is voltage check device each point voltage change sequential in first embodiment.
Embodiment
First embodiment
Fig. 1 shows functional block diagram, it then follows the connection relation of above-mentioned initial technical solution, in specific first embodiment
Voltage check device in each point voltage change sequential such as Fig. 4.
The utility model has following 3 features：
1st, equipment under test opens machine process, alarm indication circuit not false alarm.
2nd, there is power down again after power supply unit power supply, alarm indication circuit not false alarm.
3rd, after power supply unit normal power supply, because equipment under test operation irregularity causes output voltage power down, such a situation can
It can just touch
Transmit messages police.
The NOT gate of the utility model and door 1 and door 2, delayer, latch, the tool of each circuit module of alarm indication circuit
The circuit connecting relation of body belongs to the prior art, for each circuit module, using circuit in detail below to 3 spies above
Sign is specifically described, and the operation principle of the utility model is described as follows with reference to attached drawing 3：
NOT gate and door 1 described in the utility model include the first amplifier IC1A, first resistor R1 and second resistance R2.Institute
The first resistor R1 stated is connected to the 8 foot feeder ears of the output terminal Vin and the first amplifier IC1A of the power supply unit
Between VCC；The second resistance R2 is connected to 8 feet of the ground GND and the first amplifier IC1A of the equipment under test
Between feeder ear VCC；The output end vo of equipment under test described in the 2 foot negative-phase inputs connection of the first amplifier IC1A,
4 feet of 3 foot normal phase input ends connection the reference voltage Vref1, the first amplifier IC1A of the first amplifier IC1A connect
Meet the ground GND of the equipment under test, the 1 foot output terminal V1 connections of the first amplifier IC1A and one of the door 2
Input terminal.
It is described in the utility model to include the first diode D1 and 3rd resistor R3 with door 2.The first diode D1
Cathode connection the output terminal V1, the first diode D1 with door 1 the anode connection latch it is defeated
Enter end；The 3rd resistor R3 be connected to the first diode D1 anode and the delayer output terminal V2 it
Between.
Delayer described in the utility model includes the 4th resistance R4, the 5th resistance R5 and the first capacitance C1.Described
Four resistance R4 are connected between the input terminal Vin and the first capacitance C1 of the power supply unit；The first capacitance C1 connects
It is connected between the ground GND and the 4th resistance R4 of the equipment under test；The 5th resistance R5 is connected to described
Between the ground GND of equipment under test and the 4th resistance R4.
Latch described in the utility model includes the 6th resistance R6, the second diode D2, the 3rd diode D3 and second
Amplifier IC1B.The 6th resistance R6 is connected to the 5 foot normal phase input ends of the second amplifier IC1B and described tested
Between the ground GND of equipment；The anode connection of the second diode D2 is described with door 2 output terminal V3, and described second
The 5 foot normal phase input ends of the second amplifier IC1B described in the cathode connection of diode D2；The anode of the 3rd diode D3
Second that the cathode connection of 7 foot the output terminal VL, the 3rd diode D3 of the connection second amplifier IC1B is described is transported
Put the 5 foot normal phase input ends of IC1B；The 6 feet connection reference voltage Vref2 of the second amplifier IC1B, second amplifier
Described in the 4 feet connection of the feeder ear VCC, the second amplifier IC1B of the first amplifier IC1A described in the 8 feet connection of IC1B
The input terminal of alarm indication circuit described in the 7 feet connection of the ground GND of equipment under test, the second amplifier IC1B.
Alarm indication circuit described in the utility model includes the 7th resistance R7 and the first Light-emitting diode LED.Described
7th resistance R7 is connected between the cathode of first Light-emitting diode LED and the ground GND of the equipment under test；Described
The anode of first Light-emitting diode LED is connected between the output terminal VL and the 7th resistance R7 of the latch.
1 equipment under test of feature opens machine process, and alarm indication circuit not false alarm, realizes operation principle：
In t0 to the t1 periods, the output terminal Vin voltages of power supply unit are low level, and the output end voltage V1 with door 1 is
Low level, the output end voltage V3 with door 2 are low level, and the output terminal VL voltages of latch are low level, alarm indication circuit
Do not alarm.
The output terminal Vin voltages of power supply unit rise to high level at the t1 moment, in t1 to the t4 periods, remain high electricity
It is flat.
The output end vo voltage of equipment under test is low level in t1 to the t2 periods, after time delay t2-t1, in t2
Engrave and be upgraded to high level, in t2 to the t4 periods, remain high level.
High level is risen at the t1 moment with the output terminal V1 voltages of door 1, high level is remained in t1 to the t2 periods,
The t2 moment falls to low level, in t2 to the t4 periods, remains low level.
The output terminal Vin voltages of power supply unit are after delayer is delayed, and the output end voltage V2 of delayer is in t1 to t3
Period, is low level, is high level in t3 to the t4 periods.During circuit design, it is desirable to which the time delay t3-t1 of delayer is big
In the starting-up delay time t2-t1 of the output end vo voltage of equipment under test.
Therefore, in t1 to the t2 periods, since the output terminal V2 of delayer is low level, the output terminal V3 with door 2 is low
Level, the output terminal VL voltages of latch are low level, and alarm indication circuit is not alarmed.
In t2 to the t4 periods, due to being low level with the output terminal V1 of door 1, the output terminal V3 with door 2 is low level, lock
The output terminal VL voltages of storage are low level, and alarm indication circuit is not alarmed.
There is power down again after the power supply of 2 power supply unit of feature, alarm indication circuit not false alarm, realizes operation principle：
There is power down at the t4 moment in the output terminal Vin voltages of power supply unit, fall to low level, are protected in t4 to the t7 periods
Hold as low level.
Due to being low level in the output terminal Vin voltages of t4 to t7 periods, power supply unit, the output terminal V1 electricity with door 1
Press as low level, the output terminal V3 voltages with door 2 are low level, and the output terminal VL voltages of latch are low level, alarm indication
Circuit is not alarmed.
After 3 power supply unit normal power supply of feature, because equipment under test operation irregularity causes output voltage power down, such a situation energy
It is enough just to trigger alarm, realize operation principle：
The output terminal Vin voltages of power supply unit rise to high level at the t7 moment, in t7 to the t11 periods, remain height
Level.
The output Vo voltages of equipment under test remain low level, by starting-up delay time t8-t7 in t7 to the t8 periods
Afterwards, high level section is risen at the t8 moment, in t8 to the t10 periods, remains high level, power down occur at the t10 moment, declined
For low level, in t10 to the t11 periods, low level is remained.
High level is risen at the t7 moment with 1 output terminal V1 voltages of door, in t7 to the t8 periods, remains high level,
The t8 moment falls to low level, in t8 to the t10 periods, remains low level.High level is risen at the t10 moment, is arrived in t10
The t11 periods, remain high level.
The output terminal V2 voltages of delayer are gradually increasing at the t7 moment, in t7 to the t9 periods, the output terminal V2 of delayer
Voltage is low level, and in t9 to the t11 periods, the output terminal V2 of delayer is high level.
Due to being low level in the output terminal V2 voltages of t7 to t8 periods, delayer, the output terminal V3 voltages with door 2 are
Low level, the output terminal VL voltages of latch are low level, and alarm indication circuit is not alarmed.
Since in t8 to the t10 periods, due to the output terminal V1 voltages with door 1, the output terminal V3 with door 2 is low level,
Alarm indication circuit is not alarmed.
In t10 to the t11 periods, the output of equipment under test is low level, and non-output terminal Va voltages behind the door are high level,
And the input terminal Vin voltages of equipment under test are high level, the output terminal V1 voltages with door 1 are high level.At this end time, delay
The output terminal V2 voltages of device are also high level, and the output terminal V3 with door 2 is high level, and the output terminal VL voltages of latch are high electricity
Flat, alarm indication circuit is alarmed.
Therefore it is such a because equipment under test operation irregularity causes output voltage power down, it can be achieved that after power supply unit normal power supply
Situation can just trigger alarm.
It the above is only the preferred embodiment of the utility model, it is noted that above-mentioned preferred embodiment should not regard
For the limitation to the utility model, on the basis of the utility model Fig. 1 functional block diagrams, for the ordinary skill of the art
For personnel, without departing from the spirit and scope of the utility model, some improvements and modifications can also be made, these improve and
Retouching also should be regarded as the scope of protection of the utility model, no longer be repeated here with embodiment, and the scope of protection of the utility model should
When being subject to claim limited range.
Claims (5)
- A kind of 1. voltage check device, it is characterised in that：Including NOT gate and door 1 and door 2, delayer, latch, alarm indication Circuit；The output terminal Vin of power supply unit connects the input terminal, defeated with an input terminal of door 1 and delayer of equipment under test at the same time Enter end, the output end vo connection NOT gate input terminal of equipment under test；The output terminal Va connections of NOT gate and another input terminal of door 1, Be connected with the output terminal V1 of door 1 with an input terminal of door 2, the output terminal V2 connections of delayer and another input terminal of door 2, The input terminal of latch, the input terminal of the output terminal VL connection alarm indication circuits of latch are connected with the output terminal V3 of door 2.
- A kind of 2. voltage check device according to claim 1, it is characterised in that：The power supply unit supplies for equipment under test Electricity, the ground of equipment under test are connected with the ground of power supply unit；It is anti-that the output end vo of equipment under test carries out high and low level after NOT gate Phase processor；When the output terminal Va voltages of NOT gate and the output terminal Vin voltages of power supply unit are at the same time high level, the output with door 1 It is high level to hold V1 voltages.
- A kind of 3. voltage check device according to claim 2, it is characterised in that：The output terminal Vin voltages of power supply unit Delay process is carried out by delayer, the time delay of the delayer is more than the starting-up delay time of equipment under test.
- A kind of 4. voltage check device according to claim 3, it is characterised in that：The output terminal V2 voltages of the delayer With the output terminal V1 voltages with door 1 at the same time be high level when, the output terminal V3 voltages with door 2 are high level.
- A kind of 5. voltage check device according to claim 4, it is characterised in that：When electric for height with the output terminal V3 of door 2 Usually, latch is latched the high level of the output terminal V3 with door 2, and latch outputs VL outputs are high level； When the output terminal VL of latch remains continuously high level, alarm indication circuit is persistently alarmed；When the output terminal with door 2 When V3 is low level, latch outputs VL outputs are low level, and alarm indication circuit is not alarmed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721198504.4U CN207281204U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage check device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721198504.4U CN207281204U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage check device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207281204U true CN207281204U (en) | 2018-04-27 |
Family
ID=61982267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721198504.4U Withdrawn - After Issue CN207281204U (en) | 2017-09-19 | 2017-09-19 | A kind of voltage check device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207281204U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107561389A (en) * | 2017-09-19 | 2018-01-09 | 广州金升阳科技有限公司 | A kind of voltage check device |
-
2017
- 2017-09-19 CN CN201721198504.4U patent/CN207281204U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107561389A (en) * | 2017-09-19 | 2018-01-09 | 广州金升阳科技有限公司 | A kind of voltage check device |
| CN107561389B (en) * | 2017-09-19 | 2024-04-12 | 广州金升阳科技有限公司 | Voltage detection device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20180427 Effective date of abandoning: 20240412 |
|
| AV01 | Patent right actively abandoned |
Granted publication date: 20180427 Effective date of abandoning: 20240412 |
|
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |