CN207251622U - A kind of Optical fiber relay chip test system - Google Patents
A kind of Optical fiber relay chip test system Download PDFInfo
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- CN207251622U CN207251622U CN201720978024.3U CN201720978024U CN207251622U CN 207251622 U CN207251622 U CN 207251622U CN 201720978024 U CN201720978024 U CN 201720978024U CN 207251622 U CN207251622 U CN 207251622U
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- error rate
- bit error
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- probe card
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Abstract
Chip testing technology field is the utility model is related to, more particularly to a kind of Optical fiber relay chip test system.In a fiber after addition Bit Error Rate Analyzer and processing unit in chip test system, the enabling signal sent by processing unit promotes Bit Error Rate Analyzer to export a detection signal, this detection signal transmission returns to Bit Error Rate Analyzer to after chip under test by chip under test generation feedback signal, Bit Error Rate Analyzer with detection signal and feedback signal it may determine that the bit error rate situation of this chip under test, so as to fulfill the test of the bit error rate to chip.Meanwhile probe card and test machine coordinate test chip operating current and associated DC parameter, the Optical fiber relay chip test system still to test chip operation electric current and associated DC parameter.
Description
Technical field
Chip testing technology field is the utility model is related to, more particularly to a kind of Optical fiber relay chip test system.
Background technology
Optical fiber communication technology has just been firmly got everybody since emerging and is liked, its main cause is year-on-year other means of communication phases
Than there is impayable superiority, as traffic capacity is big, repeater span is long, security performance is good, adaptable, speed is fast
Deng, but current technology still has some limitations, optical-fibre communications needs to aid in completing by Optical fiber relay chip
Remote data transmission, therefore high speed fibre communication optical fiber repeater chip plays vital work in this important breakthrough
With with the extensive use of optical fiber communication technology, Optical fiber relay chip demand doubles with day, and the test of Optical fiber relay chip becomes
The problem of most important.At present, the test to Optical fiber relay chip is mainly come test chip by probe card and test machine
Operating current and associated DC parameter, after the test for completing chip operation electric current and associated DC parameter, in order to save the testing time, then
Part fiber repeater chip is extracted, error rate test is carried out to the Optical fiber relay chip that these are extracted by single equipment,
And whole Optical fiber relay chips cannot be tested, chip cannot so be completely secured goes out quality.
The content of the invention
The purpose of this utility model is that avoid above-mentioned shortcoming of the prior art and a kind of Optical fiber relay core is provided
Chip test system, it is possible to achieve when testing chip operation electric current and associated DC parameter, also to the error code of chip
Rate is tested.
The purpose of this utility model is achieved through the following technical solutions：
A kind of Optical fiber relay chip test system is provided, including probe card for grafting chip under test and to chip under test
The test machine tested, further includes Bit Error Rate Analyzer and processing unit, the processing unit and the Bit Error Rate Analyzer
It is in communication with each other, the Bit Error Rate Analyzer is connected to the probe card；
The processing unit is used to receive external demand signal and send enabling signal to the Bit Error Rate Analyzer, described
Bit Error Rate Analyzer sends detection signal to the probe card, the probe card and the tested core according to received enabling signal
Piece communication is so as to transmit detection signal to the chip under test, and the chip under test is according to received detection signal output feedback letter
Number, which is transferred to Bit Error Rate Analyzer through the probe card, and the Bit Error Rate Analyzer is believed according to the detection sent
Number and the comparative result output error rate of received feedback signal judge signal to the processing unit, the processing unit according to
The bit error rate judges signal generation error rate value.
Wherein, the Bit Error Rate Analyzer and the processing unit are respectively equipped with USB port, both pass through this USB end
Mouth connection.
Wherein, the Bit Error Rate Analyzer is connected to the probe card by optical fiber, and detection signal is by the bit error rate point
Analyzer is transferred to the probe card through the optical fiber.
Wherein, the probe card is connected to the Bit Error Rate Analyzer by coaxial line, and feedback signal is by the probe card
The Bit Error Rate Analyzer is transferred to through coaxial line.
Wherein, the probe card is connected with the test machine by cable.
The beneficial effects of the utility model：It is single after adding Bit Error Rate Analyzer and processing in chip test system in a fiber
Member, the enabling signal sent by processing unit promote Bit Error Rate Analyzer to export a detection signal, this detection signal passes
It is defeated that Bit Error Rate Analyzer, Bit Error Rate Analyzer detection signal are returned to by chip under test generation feedback signal to after chip under test
With feedback signal it may determine that the bit error rate situation of this chip under test, so as to fulfill the test of the bit error rate to chip.Together
When, probe card and test machine coordinate test chip operating current and associated DC parameter, and the Optical fiber relay chip test system is still
Chip operation electric current and associated DC parameter can be tested.
Brief description of the drawings
Fig. 1 is Optical fiber relay chip test system block diagram.
Embodiment
The Optical fiber relay chip test system of the present embodiment, including probe card for grafting chip under test and to being tested core
The test machine that piece is tested, further includes Bit Error Rate Analyzer and processing unit, processing unit and Bit Error Rate Analyzer phase intercommunication
Letter, Bit Error Rate Analyzer are connected to probe card.Bit Error Rate Analyzer and processing unit are respectively equipped with USB port, both pass through this
A USB port connection；Bit Error Rate Analyzer is connected to probe card by optical fiber, and detection signal is passed by Bit Error Rate Analyzer through optical fiber
It is defeated to arrive probe card；Probe card is connected to Bit Error Rate Analyzer by coaxial line, and feedback signal is transferred to by probe card through coaxial line
Bit Error Rate Analyzer；Probe card is connected with test machine by cable.
Processing unit is used to receive external demand signal and send enabling signal to Bit Error Rate Analyzer, Bit Error Rate Analyzer
According to received enabling signal send detection signal to probe card, probe card communicate with chip under test thus transmit detect signal to
Chip under test, chip under test are transferred to error code according to received detection signal output feedback signal, the feedback signal through probe card
Rate analyzer, Bit Error Rate Analyzer are sentenced according to the detection signal and the comparative result output error rate of received feedback signal that send
Break signal judges signal generation error rate value to processing unit, processing unit according to the bit error rate.
The Optical fiber relay chip test system adds Bit Error Rate Analyzer in traditional Optical fiber relay chip test system
And processing unit, the enabling signal sent by processing unit promote Bit Error Rate Analyzer to export a detection signal, this inspection
Survey signal transmission and Bit Error Rate Analyzer is returned to by chip under test generation feedback signal to after chip under test, Bit Error Rate Analyzer is used
Signal and feedback signal are detected it may determine that the bit error rate situation of this chip under test, so as to fulfill the bit error rate to chip
Test.Meanwhile probe card and test machine coordinate test chip operating current and associated DC parameter, the Optical fiber relay chip testing system
System can still test chip operation electric current and associated DC parameter.
Claims (5)
1. a kind of Optical fiber relay chip test system, including probe card for grafting chip under test and chip under test is surveyed
The test machine of examination, it is characterised in that further include Bit Error Rate Analyzer and processing unit, the processing unit and the bit error rate point
Analyzer is in communication with each other, and the Bit Error Rate Analyzer is connected to the probe card；
The processing unit is used to receive external demand signal and send enabling signal to the Bit Error Rate Analyzer, the error code
Rate analyzer sends detection signal according to received enabling signal and leads to the probe card, the probe card with the chip under test
Believer in a certain religion and transmit detection signal give the chip under test, the chip under test according to it is received detect signal output feedback signal,
The feedback signal is transferred to Bit Error Rate Analyzer through the probe card, the Bit Error Rate Analyzer according to the detection signal sent and
The comparative result output error rate of received feedback signal judges signal to the processing unit, and the processing unit is according to
The bit error rate judges signal generation error rate value.
2. Optical fiber relay chip test system according to claim 1, it is characterised in that the Bit Error Rate Analyzer and institute
State processing unit and be respectively equipped with USB port, both are connected by this USB port.
3. Optical fiber relay chip test system according to claim 1, it is characterised in that the Bit Error Rate Analyzer passes through
Optical fiber is connected to the probe card, and detection signal is transferred to the probe card by the Bit Error Rate Analyzer through the optical fiber.
4. Optical fiber relay chip test system according to claim 3, it is characterised in that the probe card passes through coaxial line
The Bit Error Rate Analyzer is connected to, feedback signal is transferred to the Bit Error Rate Analyzer by the probe card through coaxial line.
5. Optical fiber relay chip test system according to claim 1, it is characterised in that the probe card and the test
Machine is connected by cable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720978024.3U CN207251622U (en) | 2017-08-07 | 2017-08-07 | A kind of Optical fiber relay chip test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720978024.3U CN207251622U (en) | 2017-08-07 | 2017-08-07 | A kind of Optical fiber relay chip test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207251622U true CN207251622U (en) | 2018-04-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720978024.3U Active CN207251622U (en) | 2017-08-07 | 2017-08-07 | A kind of Optical fiber relay chip test system |
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| Country | Link |
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| CN (1) | CN207251622U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109239576A (en) * | 2018-08-03 | 2019-01-18 | 光梓信息科技（上海）有限公司 | A kind of high speed optical communication chip test system and method |
-
2017
- 2017-08-07 CN CN201720978024.3U patent/CN207251622U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109239576A (en) * | 2018-08-03 | 2019-01-18 | 光梓信息科技（上海）有限公司 | A kind of high speed optical communication chip test system and method |
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