CN207074881U - A kind of high power density charger based on digital integration chip G5237F - Google Patents

A kind of high power density charger based on digital integration chip G5237F Download PDF

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Publication number
CN207074881U
CN207074881U CN201721052074.5U CN201721052074U CN207074881U CN 207074881 U CN207074881 U CN 207074881U CN 201721052074 U CN201721052074 U CN 201721052074U CN 207074881 U CN207074881 U CN 207074881U
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China
Prior art keywords
electric capacity
chip
resistance
pin
usb interface
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Expired - Fee Related
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CN201721052074.5U
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Chinese (zh)
Inventor
王刚
张枝兵
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SHENZHEN GANG CHEUNG FAIR ELECTRONICS CO Ltd
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SHENZHEN GANG CHEUNG FAIR ELECTRONICS CO Ltd
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Publication of CN207074881U publication Critical patent/CN207074881U/en
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Abstract

The utility model provides a kind of high power density charger based on digital integration chip G5237F, including the second chip U2 and the 3rd chip U3 for being integrated with the first chip U1 of digital PWM chip and power MOS, being electrically connected with the first chip;Also include current insurance silk F1,Bridge heap BD1,EMI filter inductances L1,EMI filter inductances L2,Transformer T1,Electric capacity EC1,Electric capacity EC2,Resistance R13,Resistance R4,Resistance R4A,Current sampling resistor R3 and R3A,Diode D1,Resistance R1,Resistance R2,Electric capacity C1,Resistance R6,Electric capacity C3,Electric capacity C4,Resistance R7,Resistance R8,Resistance R12,Electric capacity C6,Electric capacity C8,Electric capacity EC3,First USB interface,Secondary USB interface,Diode Z1 and resistance R18,The design practicality is wide,It can ensure fast and effectively to charge to it in the case of by electric product safety,And output current can meet the collocation charging of the mobile products such as existing mobile phone and flat board,As a result of advanced digital control technology,Small product size is compact,Ensure that product safety is reliable.

Description

A kind of high power density charger based on digital integration chip G5237F
[technical field]
It the utility model is related to technical field of charger products, more particularly to a kind of frivolous, compact, high power density base In digital integration chip G5237F high power density charger.
[background technology]
In the last few years, the development of smart mobile phone entered high speed development pattern, and the life of people increasingly be unable to do without intelligence Can a variety of different uses such as mobile phone, chat, payments, commercial affairs can be completed by smart mobile phone, its be people work with Life brings great convenience, increasing yet with the screen of smart mobile phone, and battery capacity is again increasing, required to fill Electrical power is increasing, and product develops to slimming again, and charger is too greatly not only bad for the use of reality, and may cause Unnecessary loss, so need that compact, frivolous, power is big with the supporting charger of smart mobile phone, based on this, Duo Jia mobile phone vendors Commercial city puts into more manpower and materials into the research and development of charger for mobile phone, but existing conventional simulation technology can not meet simultaneously with Upper several requirements.
Based on this, how the effective usability for improving charger for mobile phone could be reached by the improvement and improvement of technology Can, meet growing consumption demand, those skilled in the art has carried out substantial amounts of research and development and experiment, from the knot of charger All many-sides such as structure and principle are improved and improved, and achieve preferable achievement.
[utility model content]
To overcome the problems of prior art, the utility model provides a kind of frivolous, compact, high power density base In digital integration chip G5237F high power density charger.
The scheme that the utility model solves technical problem is to provide a kind of high power based on digital integration chip G5237F Density charger, including for being integrated with the first chip U1 of digital PWM chip and power MOS, being electrically connected with the first chip Two chip U2 and the 3rd chip U3;Also include current insurance silk F1, bridge heap BD1, EMI filter inductance L1, EMI filter inductance L2, Transformer T1, electric capacity EC1, electric capacity EC2, resistance R13, resistance R4, resistance R4A, current sampling resistor R3 and R3A, diode D1, Resistance R1, resistance R2, electric capacity C1, resistance R6, electric capacity C3, electric capacity C4, resistance R7, resistance R8, resistance R11, resistance R12, electric capacity C6, electric capacity C8, electric capacity EC3, the first USB interface, secondary USB interface, diode Z1 and resistance R18;The current insurance silk F1 input is connected with the L lines of AC power, and current insurance silk F1 output end is connected with bridge heap BD1 input, The N lines of AC power are connected with the rectifier bridge stack BD1 other end;Also include being used to provide voltage stabilizing power supply to the first chip U1 Diode D2, resistance R5, electric capacity C2 and electric capacity C2A;The cathode output end of the bridge heap BD1 respectively with the electric capacity EC1 just End, EMI filter inductances L1 input are connected;Bridge heap BD1 cathode output end and electric capacity EC1 negative terminal, EMI filter inductances L2 input is grounded respectively;EMI filter inductances L1 output end and electric capacity EC2 anode, the input of transformer T1 main windings End is connected;EMI filter inductances L2 output end be connected with electric capacity EC2 negative pole after as whole circuit reference ground;Electricity It is in parallel with EMI filter inductances L1 to hinder R13;Resistance R4 one end is connected with electric capacity EC2 positive poles, and the other end is connected with resistance R4A The 1st pin with resistance R5 one end, electric capacity C2 one end, electric capacity C2A one end, the first chip U1 is connected to form the first chip afterwards U1 starting up's circuit;Electric capacity C2, the electric capacity C2A other ends are connected with the first chip U1 the 7th pin is followed by electric capacity EC2's Negative pole;Transformer T1 master is connected to electric capacity EC2 positive poles around one end, the other end is connected to the 5th of the first chip U1 the, 6 pin, then Current sampling resistor R3, R3A one end is connected to by the metal-oxide-semiconductor inside the first chip U1, by the pin of the first chip U1 the 4th, electricity Resistance R3, the resistance R3A other end are connected to the reference ground of electric capacity EC2 negative terminals;The of diode D1 positive pole and the first chip U1 5th, the output of the 6th pin, transformer T1 main windings is connected, and one end of negative terminal and resistance R2 is connected, resistance the R2 other end and electricity Resistance R1, electric capacity C1 one end are connected, and resistance R1, the electric capacity C1 other end are connected with electric capacity EC2 positive pole, form peak absorbing Loop, ensure the first chip U1 work safetys;Resistance R6 one end, diode D2 anodes and one end phase of transformer T1 assists windings Connection, diode D2 negative terminals are connected with resistance R5 one end, and the 1st pin of the resistance R5 other ends and the first chip U1 is connected, just Often supply voltage is provided during work for the first chip U1;Transformer T1 assists windings it is another with terminating to electric capacity EC2 negative terminals;Electricity The resistance R6 other ends are connected with the pin of the first chip U1 the 3rd, electric capacity C3 one end, resistance R7 one end, and the electric capacity C3 other ends, resistance R7 are another One end is connected with the pin of the first chip U1 the 7th, forms output voltage detecting circuit;Resistance R11 one end and the pin phases of the first chip U1 the 1st Connection, the other end are connected with the pin of the first chip U1 the 7th, for setting the offset of output line pressure drop.
Preferably, one end of the transformer T1 secondary windings and the second chip U2 the 1st, 2,3 pin, the one of resistance R12 End, electric capacity C6 one end, electric capacity C4 one end are connected, the resistance R12 other end, the electric capacity C6 other end and the second chip U2 The 4th pin be connected, provide voltage supplied for the second chip U2;The electric capacity C4 other end is connected with resistance R8 one end, resistance The R8 other ends are connected with the second chip U2 the 5th, 6,7,8 pin, form the second chip U2 protection circuit;Second chip U2 the 5th, 6th, 7,8 pin are connected with electric capacity EC3 positive poles, the pin of the first USB interface the 1st, the pin of secondary USB interface the 1st, the positive pole as output; Electric capacity EC3 negative pole and the other end of transformer T1 secondary windings, the 4th pin of the first USB interface, the 4th pin of secondary USB interface It is connected, the negative pole as output;Electric capacity EC3 both ends are parallel with resistance R9, as output fictitious load;Diode Z1 negative terminal with Electric capacity EC3 positive pole is connected, positive pole is connected with electric capacity EC3 negative pole, there is provided the overvoltage protection for pressure of transmitting electricity;Resistance R18's One end is connected with electric capacity EC3 positive pole, and the other end is connected with the pin of the 3rd chip U3 the 5th, electric capacity the C8 other end, electric capacity C8 The other end be connected with the 3rd chip U3 the 2nd pin after be connected to electric capacity EC3 negative poles, for the 3rd chip U3 provide power supply electricity Pressure;2nd pin of the pin of the 3rd chip U3 the 6th and the first USB interface is connected, the 3rd chip U3 the 1st pin and the of the first USB interface 3 pin are connected;3rd chip U3 the 4th pin is connected with the 2nd pin of secondary USB interface, the 3rd chip U3 the 3rd pin and second 3rd pin of USB interface is connected.
Preferably, first chip is G5237F chips.
Preferably, it is connected in series with electric capacity CY1 between the positive pole of the electric capacity EC1 and electric capacity EC3 negative pole.
Compared with prior art, a kind of high power density charger based on digital integration chip G5237F of the utility model The first chip U1, the second core being electrically connected with the first chip of digital PWM chip and power MOS are integrated with by setting simultaneously Piece U2 and the 3rd chip U3, the demand of load end is detected by the 3rd chip U3, and confirms whether charger can provide foot Enough electric currents, the maximum current that final output power receiving equipment needs electric current or output charger and can exported fill for power receiving equipment Electricity, it is practical wide, it can ensure fast and effectively to charge to it in the case of by electric product safety, and output current can It is small as a result of advanced digital control technology, small product size to meet the collocation charging of the mobile products such as existing mobile phone and flat board Ingeniously, it is easy to carry, using completely isolated scheme, it is ensured that product safety is reliable, and primary uses digital PWM driving chip and power Chip integrated MOS, realize efficient while reduce peripheral components quantity, improve product can reliability, it is secondary Using synchronous rectification scheme, improve product efficiency, reduce heating.
[brief description of the drawings]
Fig. 1 is a kind of circuit connection of high power density charger based on digital integration chip G5237F of the utility model Figure.
[embodiment]
To make the purpose of this utility model, technical scheme and advantage are more clearly understood, below in conjunction with drawings and Examples, The utility model is further elaborated.It should be appreciated that specific embodiment described herein is used only for explaining this Utility model, it is not used to limit this utility model.
Referring to Fig. 1, a kind of high power density charger 1 based on digital integration chip G5237F of the utility model includes It is integrated with the first chip U1, the second chip U2 and the 3rd core being electrically connected with the first chip of digital PWM chip and power MOS Piece U3;Also include current insurance silk F1, bridge heap BD1, EMI filter inductance L1, EMI filter inductance L2, transformer T1, electric capacity EC1, Electric capacity EC2, resistance R13, resistance R4, resistance R4A, current sampling resistor R3 and R3A, diode D1, resistance R1, resistance R2, electricity Hold C1, resistance R6, electric capacity C3, electric capacity C4, resistance R7, resistance R8, resistance R11, resistance R12, electric capacity C6, electric capacity C8, electric capacity EC3, the first USB interface, secondary USB interface, diode Z1 and resistance R18;The input of the current insurance silk F1 and friendship Stream power supply L lines be connected, current insurance silk F1 output end is connected with bridge heap BD1 input, the N lines of AC power and The rectifier bridge stack BD1 other end is connected;Also include being used for diode D2, the resistance that voltage stabilizing power supply is provided to the first chip U1 R5, electric capacity C2 and electric capacity C2A;The cathode output end of the bridge heap BD1 anode with the electric capacity EC1, EMI filter inductances respectively L1 input is connected;Bridge heap BD1 cathode output end and electric capacity EC1 negative terminal, EMI filter inductances L2 input difference Ground connection;EMI filter inductances L1 output end is connected with the input of electric capacity EC2 anode, transformer T1 main windings;EMI is filtered Ripple inductance L2 output end be connected with electric capacity EC2 negative pole after as whole circuit reference ground;Resistance R13 and EMI is filtered Inductance L1 is in parallel;Resistance R4 one end is connected with electric capacity EC2 positive poles, the other end be connected with resistance R4A after with resistance R5 one end, Electric capacity C2 one end, electric capacity C2A one end, the first chip U1 the 1st pin are connected to form the first chip U1 starting up's electricity Road;Electric capacity C2, the electric capacity C2A other ends are with being connected the negative pole that is followed by electric capacity EC2 with the first chip U1 the 7th pin;Transformer T1 master is connected to electric capacity EC2 positive poles around one end, the other end is connected to the 5th of the first chip U1 the, 6 pin and then by the first chip Metal-oxide-semiconductor inside U1, current sampling resistor R3, R3A one end, resistance R3, resistance R3A are connected to by the pin of the first chip U1 the 4th The other end be connected to the reference grounds of electric capacity EC2 negative terminals;Diode D1 positive pole and the first chip U1 the 5th, the 6th pin, transformation The output of device T1 main windings is connected, and one end of negative terminal and resistance R2 is connected, resistance the R2 other end and resistance R1, electric capacity C1 mono- End is connected, and resistance R1, the electric capacity C1 other end are connected with electric capacity EC2 positive pole, composition peak absorbing loop, ensures first Chip U1 work safetys;Resistance R6 one end, diode D2 anodes are connected with one end of transformer T1 assists windings, diode D2 Negative terminal is connected with resistance R5 one end, and the 1st pin of the resistance R5 other ends and the first chip U1 is connected, and is first during normal work Chip U1 provides supply voltage;Transformer T1 assists windings it is another with terminating to electric capacity EC2 negative terminals;The resistance R6 other ends and The pin of one chip U1 the 3rd, electric capacity C3 one end, resistance R7 one end are connected, the electric capacity C3 other ends, the resistance R7 other ends and the first chip The pin of U1 the 7th are connected, and form output voltage detecting circuit;Resistance R11 one end is connected with the pin of the first chip U1 the 1st, the other end with The pin of first chip U1 the 7th are connected, for setting the offset of output line pressure drop.
The first chip U1 of digital PWM chip and power MOS is integrated with by setting simultaneously, is electrically connected with the first chip The second chip U2 and the 3rd chip U3, the demand of load end is detected by the 3rd chip U3, and confirm that charger whether may be used To provide enough electric currents, final output power receiving equipment need electric current or the maximum current that exports charger and can export be by Electric equipment charges, practical wide, can ensure fast and effectively to charge to it in the case of by electric product safety, and defeated The collocation charging of the mobile products such as existing mobile phone and flat board can be met by going out electric current, as a result of advanced digital control technology, production Product compact, is easy to carry, using completely isolated scheme, it is ensured that product safety is reliable, and primary uses digital PWM driving chip The integrated chip with power MOS, realize efficient while reduce peripheral components quantity, improve product can be reliable Property, secondary uses synchronous rectification scheme, improves product efficiency, reduces heating.
Preferably, one end of the transformer T1 secondary windings and the second chip U2 the 1st, 2,3 pin, the one of resistance R12 End, electric capacity C6 one end, electric capacity C4 one end are connected, the resistance R12 other end, the electric capacity C6 other end and the second chip U2 The 4th pin be connected, provide voltage supplied for the second chip U2;The electric capacity C4 other end is connected with resistance R8 one end, resistance The R8 other ends are connected with the second chip U2 the 5th, 6,7,8 pin, form the second chip U2 protection circuit;Second chip U2 the 5th, 6th, 7,8 pin are connected with electric capacity EC3 positive poles, the pin of the first USB interface the 1st, the pin of secondary USB interface the 1st, the positive pole as output; Electric capacity EC3 negative pole and the other end of transformer T1 secondary windings, the 4th pin of the first USB interface, the 4th pin of secondary USB interface It is connected, the negative pole as output;Electric capacity EC3 both ends are parallel with resistance R9, as output fictitious load;Diode Z1 negative terminal with Electric capacity EC3 positive pole is connected, positive pole is connected with electric capacity EC3 negative pole, there is provided the overvoltage protection for pressure of transmitting electricity;Resistance R18's One end is connected with electric capacity EC3 positive pole, and the other end is connected with the pin of the 3rd chip U3 the 5th, electric capacity the C8 other end, electric capacity C8 The other end be connected with the 3rd chip U3 the 2nd pin after be connected to electric capacity EC3 negative poles, for the 3rd chip U3 provide power supply electricity Pressure;2nd pin of the pin of the 3rd chip U3 the 6th and the first USB interface is connected, the 3rd chip U3 the 1st pin and the of the first USB interface 3 pin are connected;3rd chip U3 the 4th pin is connected with the 2nd pin of secondary USB interface, the 3rd chip U3 the 3rd pin and second 3rd pin of USB interface is connected.
Preferably, first chip is G5237F chips.
Preferably, it is connected in series with electric capacity CY1 between the positive pole of the electric capacity EC1 and electric capacity EC3 negative pole.
First chip U1 specific pin title, type and it is described as follows:
The design can also preferably carry out overcurrent protection:Pass through the first chip U1 CS pin detection resistances R3, resistance R3A On voltage flow through transformer T1 electric current to monitor, when the first chip U1 detect voltage it is super it is red be more than Vth_oc when, system Output is closed immediately, until next cycle.
Overvoltage protection:When output voltage is extremely higher, the first chip U1 works as voltage by detecting the voltage on the 3rd pin Be equal to, higher than Vfb_ovp values when, system closes output immediately, until next cycle.
Compared with prior art, a kind of high power density charger based on digital integration chip G5237F of the utility model 1 is integrated with the first chip U1 of digital PWM chip and power MOS, second with the electric connection of the first chip by setting simultaneously Chip U2 and the 3rd chip U3, the demand of load end is detected by the 3rd chip U3, and confirms whether charger can provide Enough electric currents, the maximum current that final output power receiving equipment needs electric current or output charger and can exported is power receiving equipment Charging, it is practical wide, it can ensure fast and effectively to charge to it in the case of by electric product safety, and output current The collocation charging of the mobile products such as existing mobile phone and flat board can be met, as a result of advanced digital control technology, small product size It is compact, it is easy to carry, using completely isolated scheme, it is ensured that product safety is reliable, and primary uses digital PWM driving chip and power Chip integrated MOS, realize efficient while reduce peripheral components quantity, improve product can reliability, it is secondary Using synchronous rectification scheme, improve product efficiency, reduce heating.
Above-described the utility model embodiment, does not form the restriction to scope of protection of the utility model.It is any Made within spirit of the present utility model and principle modifications, equivalent substitutions and improvements etc., should be included in the utility model Claims within.

Claims (4)

  1. A kind of 1. high power density charger based on digital integration chip G5237F, it is characterised in that:Including being integrated with numeral First chip U1 of the PWM chip with power MOS, the second chip U2 and the 3rd chip U3 with the electric connection of the first chip;Also wrap Include current insurance silk F1, bridge heap BD1, EMI filter inductance L1, EMI filter inductance L2, transformer T1, electric capacity EC1, electric capacity EC2, Resistance R13, resistance R4, resistance R4A, current sampling resistor R3 and R3A, diode D1, resistance R1, resistance R2, electric capacity C1, resistance R6, electric capacity C3, electric capacity C4, resistance R7, resistance R8, resistance R11, resistance R12, electric capacity C6, electric capacity C8, electric capacity EC3, the first USB Interface, secondary USB interface, diode Z1 and resistance R18;The input of the current insurance silk F1 and the L lines of AC power It is connected, current insurance silk F1 output end is connected with bridge heap BD1 input, N lines and the rectifier bridge stack BD1 of AC power The other end be connected;Also include being used for diode D2, resistance R5, electric capacity C2 and the electricity that voltage stabilizing power supply is provided to the first chip U1 Hold C2A;The cathode output end of the bridge heap BD1 anode with the electric capacity EC1, EMI filter inductances L1 input phase respectively Connection;Bridge heap BD1 cathode output end and electric capacity EC1 negative terminal, EMI filter inductances L2 input are grounded respectively;EMI is filtered Inductance L1 output end is connected with electric capacity EC2 anode, the input of transformer T1 main windings;EMI filter inductances L2's is defeated Go out after end is connected with electric capacity EC2 negative pole as the reference ground of whole circuit;Resistance R13 is in parallel with EMI filter inductances L1;Electricity Resistance R4 one end be connected with electric capacity EC2 positive poles, the other end be connected with resistance R4A after with resistance R5 one end, electric capacity C2 one end, Electric capacity C2A one end, the first chip U1 the 1st pin are connected to form the first chip U1 starting up's circuit;Electric capacity C2, electric capacity The C2A other ends are with being connected the negative pole that is followed by electric capacity EC2 with the first chip U1 the 7th pin;Transformer T1 master couples around one end To electric capacity EC2 positive poles, the other end be connected to the first chip U1 the 5th, 6 pin then by the metal-oxide-semiconductor inside the first chip U1, Current sampling resistor R3, R3A one end is connected to by the pin of the first chip U1 the 4th, resistance R3, the resistance R3A other end are connected to The reference ground of electric capacity EC2 negative terminals;Diode D1 positive pole and the first chip U1 the 5th, the 6th pin, transformer T1 main windings it is defeated Go out to be connected, one end of negative terminal and resistance R2 is connected, and the resistance R2 other end is connected with resistance R1, electric capacity C1 one end, resistance R1, the electric capacity C1 other end are connected with electric capacity EC2 positive pole, composition peak absorbing loop, ensure the first chip U1 work peaces Entirely;Resistance R6 one end, diode D2 anodes are connected with one end of transformer T1 assists windings, diode D2 negative terminals and resistance R5 One end be connected, the 1st pin of the resistance R5 other ends and the first chip U1 is connected, and provides confession for the first chip U1 during normal work Piezoelectric voltage;Transformer T1 assists windings it is another with terminating to electric capacity EC2 negative terminals;The resistance R6 other ends and the first chip U1 the 3rd Pin, electric capacity C3 one end, resistance R7 one end are connected, the electric capacity C3 other ends, the resistance R7 other ends and the pin phases of the first chip U1 the 7th Connection, form output voltage detecting circuit;Resistance R11 one end is connected with the pin of the first chip U1 the 1st, the other end and the first chip U1 7th pin is connected, for setting the offset of output line pressure drop.
  2. 2. a kind of high power density charger based on digital integration chip G5237F as claimed in claim 1, its feature exist In:One end of the transformer T1 secondary windings and the second chip U2 the 1st, 2,3 pin, resistance R12 one end, the one of electric capacity C6 End, electric capacity C4 one end are connected, and the resistance R12 other end, the electric capacity C6 other end are connected with the second chip U2 the 4th pin Connect, voltage supplied is provided for the second chip U2;The electric capacity C4 other end is connected with resistance R8 one end, the resistance R8 other ends and Two chip U2 the 5th, 6,7,8 pin are connected, and form the second chip U2 protection circuit;Second chip U2 the 5th, 6,7,8 pin and electricity Hold EC3 positive poles, the pin of the first USB interface the 1st, the pin of secondary USB interface the 1st to be connected, the positive pole as output;Electric capacity EC3's is negative Pole is connected with the 4th pin of the other end of transformer T1 secondary windings, the 4th pin of the first USB interface, secondary USB interface, as The negative pole of output;Electric capacity EC3 both ends are parallel with resistance R9, as output fictitious load;Diode Z1 negative terminal and electric capacity EC3 is just Pole is connected, positive pole is connected with electric capacity EC3 negative pole, there is provided the overvoltage protection for pressure of transmitting electricity;Resistance R18 one end and electric capacity EC3 positive pole is connected, and the other end is connected with the pin of the 3rd chip U3 the 5th, electric capacity the C8 other end, the electric capacity C8 other end with 3rd chip U3 the 2nd pin is connected to electric capacity EC3 negative poles after being connected, and supply voltage is provided for the 3rd chip U3;3rd chip 2nd pin of the pin of U3 the 6th and the first USB interface is connected, and the 3rd chip U3 the 1st pin is connected with the 3rd pin of the first USB interface; 3rd chip U3 the 4th pin is connected with the 2nd pin of secondary USB interface, the 3rd chip U3 the 3rd pin and secondary USB interface 3rd pin is connected.
  3. 3. a kind of high power density charger based on digital integration chip G5237F as claimed in claim 1, its feature exist In:First chip is G5237F chips.
  4. 4. a kind of high power density charger based on digital integration chip G5237F as claimed in claim 1, its feature exist In:Electric capacity CY1 is connected in series between the positive pole of the electric capacity EC1 and electric capacity EC3 negative pole.
CN201721052074.5U 2017-08-21 2017-08-21 A kind of high power density charger based on digital integration chip G5237F Expired - Fee Related CN207074881U (en)

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CN201721052074.5U CN207074881U (en) 2017-08-21 2017-08-21 A kind of high power density charger based on digital integration chip G5237F

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201721052074.5U CN207074881U (en) 2017-08-21 2017-08-21 A kind of high power density charger based on digital integration chip G5237F

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CN207074881U true CN207074881U (en) 2018-03-06

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Granted publication date: 20180306