CN206993145U - Multifunctional gateway route development board - Google Patents
Multifunctional gateway route development board Download PDFInfo
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- CN206993145U CN206993145U CN201720794308.7U CN201720794308U CN206993145U CN 206993145 U CN206993145 U CN 206993145U CN 201720794308 U CN201720794308 U CN 201720794308U CN 206993145 U CN206993145 U CN 206993145U
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Abstract
The utility model discloses a kind of Multifunctional gateway to route development board, is related to signal distribution or conversion equipment technical field.Including master chip, the master chip uses MT7623N type microprocessors, and 40 PIN GPIO pins of the master chip are connected with serial line interface respectively, and the RGMII pins of the master chip are connected with wan interface and LAN interface respectively through route switch module；The MIPI pins of the master chip are connected with LCD interfaces；The HDMI Tx pins of the master chip are connected with HDMI；The Keys pins of the master chip are PWR/Reset/boot module terminals；Another PCle2.0 pin of the master chip turns SATA interface module through Pcle interfaces and is connected respectively with power module and SATA modules；802.11 b/g/n BT4.0 pins of the master chip are connected through wireless connection module with wave point；The IR RX pins of the master chip are connected with infrared receiving module.HDMI, PCI E, SATA are concentrated on one by the development board, vdiverse in function.
Description
Technical field
Signal distribution or conversion equipment technical field are the utility model is related to, more particularly to a kind of Multifunctional gateway route is opened
Send out plate.
Background technology
At present, the function of common router development board is relatively simple, it is difficult to meet current family or enterprise to it is new when
For the requirement of network.
Utility model content
Technical problem to be solved in the utility model is how to provide a kind of Multifunctional gateway route development board, to meet
A variety of exploitation demands.
In order to solve the above technical problems, technical solution adopted in the utility model is：A kind of Multifunctional gateway route is opened
Send out plate, it is characterised in that：Including master chip, the master chip uses MT7623N type microprocessors, 40 of the master chip
PIN GPIO pins are connected with serial line interface respectively, and the RGMII pins of the master chip connect with WAN respectively through route switch module
Mouth and LAN interface connection；The UART pins of the master chip are connected with test interface；The GPIO pin of the master chip with
RGB LED connections；The MIPI pins of the master chip are connected with LCD interfaces；HDMI Tx pins and the HDMI of the master chip connect
Mouth connection；The Keys pins of the master chip are PWR/Reset/boot module terminals；The PMIC IF pins of the master chip
It is connected with power management module；The DRAMC pins of the master chip are connected with DDR3 memory interfaces；The eMMC of the master chip draws
Pin is connected with BGA interfaces；The SDC1 pins of the master chip are connected with TF card interface；The OSC pins and crystal oscillator of the master chip
Module connects；The USB3.0 pins of the master chip are connected with a USB3.0 interface；The USB3.0/ of the master chip
Pcle2.0 pins are connected with another USB3.0 interface；The USB2.0 OTG pins of the master chip connect with MicroUSB interfaces
Connect；One PCle2.0 pin of the master chip is connected with MINICARD interfaces；Another PCle2.0 of the master chip draws
Pin turns SATA interface module through Pcle interfaces and is connected respectively with power module and SATA modules；The 802.11 of the master chip
B/g/n pins are connected through wireless connection module with wave point；The IR-RX pins of the master chip connect with infrared receiving module
Connect.
Further technical scheme is：The route switch module uses MT7530 cake cores.
Further technical scheme is：The wireless connection module uses MT6625 cake cores.
Further technical scheme is：The power management module uses MT6323 cake cores.
It is using beneficial effect caused by above-mentioned technical proposal：The development board concentrates HDMI, PCI-E, SATA
In one, while the interfaces such as wifi, USB3.0 are provided, linux and Android system can be run, realize that intelligent centre etc. is more
Kind exploitation purposes.
Brief description of the drawings
The utility model is described in further detail with reference to the accompanying drawings and detailed description.
Fig. 1 is the theory diagram of development board described in the utility model embodiment；
Fig. 2 is the theory diagram that the routing function of development board described in the utility model embodiment is realized；
Fig. 3 is the theory diagram that the amusement function of development board described in the utility model embodiment is realized.
Embodiment
With reference to the accompanying drawing in the utility model embodiment, the technical scheme in the embodiment of the utility model is carried out clear
Chu, it is fully described by, it is clear that described embodiment is only part of the embodiment of the present utility model, rather than whole
Embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not under the premise of creative work is made
The every other embodiment obtained, belong to the scope of the utility model protection.
Many details are elaborated in the following description in order to fully understand the utility model, but this practicality is new
Type can also be different from other manner described here using other to be implemented, and those skilled in the art can be without prejudice to this reality
With doing similar popularization in the case of new intension, therefore the utility model is not limited by following public specific embodiment.
As shown in figure 1, the utility model discloses a kind of Multifunctional gateway to route development board, including master chip, the master
Chip uses MT7623N type microprocessors, and 40 PIN GPIO pins of the master chip are connected with serial line interface respectively, institute
The RGMII pins for stating master chip are connected with wan interface and LAN interface respectively through route switch module；The master chip
UART pins are connected with test interface；The GPIO pin of the master chip is connected with RGB LED；The MIPI pins of the master chip
It is connected with LCD interfaces；The HDMI Tx pins of the master chip are connected with HDMI；The Keys pins of the master chip are
PWR/Reset/boot module terminals；The PMIC IF pins of the master chip are connected with power management module；The master chip
DRAMC pins be connected with DDR3 memory interfaces；The eMMC pins of the master chip are connected with BGA interfaces；The master chip
SDC1 pins are connected with TF card interface；The OSC pins of the master chip are connected with crystal oscillator module；The USB3.0 of the master chip draws
Pin is connected with a USB3.0 interface；The USB3.0/Pcle2.0 pins of the master chip are connected with another USB3.0 interface；
The USB2.0 OTG pins of the master chip are connected with MicroUSB interfaces；One PCle2.0 pin of the master chip with
MINICARD interfaces connect；Another PCle2.0 pin of the master chip through Pcle interfaces turn SATA interface module respectively with
Power module and the connection of SATA modules；802.11 b/g/n pins of the master chip are through wireless connection module with wirelessly connecing
Mouth connection；The IR-RX pins of the master chip are connected with infrared receiving module.
Master chip uses MediaTek MT7623N chips, four cores, frequency 1GHz, inside saves as 2G DDR3, operation system
System uses Linux or android system：Route switching network interface is connected to CPU by MT7530；The data wire of IR receivers
It is connected to CPU IR-RX pins；SATA interface is transferred by PCIE and realized；Embedded with bluetooth and WIFI use MT6625 chips,
Connected by UART with SDIO modes；Mic and audio, which play, directly uses built-in audio codec；The pipe of power supply and battery
Reason is managed using PMU MT6323；Storage uses 8G eMMC.
As shown in Fig. 2 the mode of the router development board networking has two kinds, it is connected and function is as follows：By wired
（Routing module）Realize traditional connection, and exporting can then realize that wired connection or WIFI are exported simultaneously；The router
Can be with the access way of unrestricted choice network（Wired or WIFI）；By the priority of software set access way, realize automatic
Seamlessly switch access way, speed-priority, signal priority or cost priority may be selected.
As shown in figure 3, the router development board passes through built-in microphone and loudspeaker can realize voice call or meeting electricity
Talk about function；Visual communications can be realized by built-in camera；Entertainment systems function can be realized by HDMI and infrared interface；It is logical
The operation and broadcasting of extraneous hard disk or USB flash disk content can be realized by crossing USB interface.
To sum up, HDMI, PCI-E, SATA are concentrated on one by the development board, while are provided wifi, USB3.0 etc. and connect
Mouthful, linux and Android system can be run, realizes a variety of exploitation purposes such as intelligent centre.
Claims (4)
1. a kind of Multifunctional gateway route development board, it is characterised in that：Including master chip, the master chip uses MT7623N types
Microprocessor, 40 PIN GPIO pins of the master chip are connected with serial line interface respectively, and the RGMII of the master chip draws
Pin is connected with wan interface and LAN interface respectively through route switch module；The UART pins of the master chip connect with test interface
Connect；The GPIO pin of the master chip is connected with RGB LED；The MIPI pins of the master chip are connected with LCD interfaces；The master
The HDMI Tx pins of chip are connected with HDMI；The Keys pins of the master chip are PWR/Reset/boot module wiring
End；The PMIC IF pins of the master chip are connected with power management module；The DRAMC pins of the master chip and DDR3 internal memories
Interface connects；The eMMC pins of the master chip are connected with BGA interfaces；The SDC1 pins of the master chip connect with TF card interface
Connect；The OSC pins of the master chip are connected with crystal oscillator module；The USB3.0 pins of the master chip and a USB3.0 interface connect
Connect；The USB3.0/Pcle2.0 pins of the master chip are connected with another USB3.0 interface；The USB2.0 of the master chip
OTG pins are connected with MicroUSB interfaces；One PCle2.0 pin of the master chip is connected with MINICARD interfaces；It is described
Another PCle2.0 pin of master chip turns SATA interface module through Pcle interfaces and connected respectively with power module and SATA modules
Connect；802.11 b/g/n BT4.0 pins of the master chip are connected through wireless connection module with wave point；The master chip
IR-RX pins be connected with infrared receiving module.
2. Multifunctional gateway as claimed in claim 1 route development board, it is characterised in that：The route switch module uses
MT7530 cake cores.
3. Multifunctional gateway as claimed in claim 1 route development board, it is characterised in that：The wireless connection module uses
MT6625 cake cores.
4. Multifunctional gateway as claimed in claim 1 route development board, it is characterised in that：The power management module uses
MT6323 cake cores.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720794308.7U CN206993145U (en) | 2017-07-03 | 2017-07-03 | Multifunctional gateway route development board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720794308.7U CN206993145U (en) | 2017-07-03 | 2017-07-03 | Multifunctional gateway route development board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206993145U true CN206993145U (en) | 2018-02-09 |
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ID=61399493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720794308.7U Active CN206993145U (en) | 2017-07-03 | 2017-07-03 | Multifunctional gateway route development board |
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| Country | Link |
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| CN (1) | CN206993145U (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108280039A (en) * | 2018-02-13 | 2018-07-13 | 龙迅半导体（合肥）股份有限公司 | A kind of input signal decoding circuit at the ends MIPI C-Phy RX |
| CN109032991A (en) * | 2018-08-10 | 2018-12-18 | 广州友善电子科技有限公司 | A kind of AIR integrated circuit board of super-small |
| CN109101459A (en) * | 2018-08-10 | 2018-12-28 | 广州友善电子科技有限公司 | A kind of CORE integrated circuit board of super-small |
| CN109101458A (en) * | 2018-08-10 | 2018-12-28 | 广州友善电子科技有限公司 | A kind of ARM architecture integrated circuit board of super-small |
-
2017
- 2017-07-03 CN CN201720794308.7U patent/CN206993145U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108280039A (en) * | 2018-02-13 | 2018-07-13 | 龙迅半导体（合肥）股份有限公司 | A kind of input signal decoding circuit at the ends MIPI C-Phy RX |
| CN108280039B (en) * | 2018-02-13 | 2021-02-26 | 龙迅半导体（合肥）股份有限公司 | Input signal decoding circuit of MIPI C-Phy RX end |
| CN109032991A (en) * | 2018-08-10 | 2018-12-18 | 广州友善电子科技有限公司 | A kind of AIR integrated circuit board of super-small |
| CN109101459A (en) * | 2018-08-10 | 2018-12-28 | 广州友善电子科技有限公司 | A kind of CORE integrated circuit board of super-small |
| CN109101458A (en) * | 2018-08-10 | 2018-12-28 | 广州友善电子科技有限公司 | A kind of ARM architecture integrated circuit board of super-small |
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