CN206878708U - Buck converting means - Google Patents
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- CN206878708U CN206878708U CN201720114584.4U CN201720114584U CN206878708U CN 206878708 U CN206878708 U CN 206878708U CN 201720114584 U CN201720114584 U CN 201720114584U CN 206878708 U CN206878708 U CN 206878708U
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Abstract
The utility model provides a kind of buck converting means, including：Main circuit, there is first port and second port, for the input voltage received via one of first port and second port to be converted into output voltage via another output in first port and second port according to pulse control signal；Control circuit, for providing pulse control signal, control circuit produces Regulate signal according to the feedback signal of the output voltage, under boost mode, the pulse control signal is produced according to the Regulate signal, in buck mode, the pulse control signal is produced according to the inversion signal of the Regulate signal.The buck converting means of the utility model embodiment boosting of main circuit and control of decompression mode in unified circuit realiration is utilized on the basis of ensureing performance and function to buck converting means, the conversion that designer can be allowed easily to be boosted to circuit between buck functionality, so as to reduce operation difficulty, circuit area and cost.
Description
Technical field
Electronic technology field is the utility model is related to, more particularly, to buck converting means.
Background technology
At present, in switching power circuit, main circuit is mainly realized by two kinds of frameworks：Buck frameworks and Boost frameworks,
Every kind of framework includes two transistors for each serving as on-off action and afterflow effect.Wherein, Buck frameworks are used to realize to defeated
Enter the decompression of voltage, Boost frameworks are used to realize the decompression to input voltage, and both structures are generally by different types of chip
Realize.
In order to save resource, as depicted in figs. 1 and 2, a kind of prior art realizes two kinds of framves using unified main circuit 100
Structure.
As shown in figure 1, when main circuit 100 is operated in decompression mode, the second port IO_2 of main circuit receive by with
The input voltage vin of input capacitance Cin input power offer, first port IO_1 provide output voltage Vout so that main electricity
Road 100 forms Buck frameworks.When pulse control signal pwm is low level, the transistor Q1 conductings of p-type, the transistor Q2 of N-type
Shut-off, now energy is transferred to inductance L from the input power for providing input voltage through transistor Q1；Work as pulse control signal
When pwm is high level, energy is transferred to first port IO_1 load capacitance Cout by inductance L, so as to export stable be less than
The output voltage Vout of input voltage vin.
As shown in Fig. 2 when main circuit 100 is operated in boost mode, the first port IO_1 of main circuit receive by with
The input voltage vin of input capacitance Cin input power offer, second port IO_2 provide output voltage Vout so that main electricity
Road 100 forms Boost frameworks.When pulse control signal pwm is high level, the transistor Q2 conductings of N-type, the transistor of p-type
Q1 is turned off, and now energy is transferred to inductance L from for providing the input power of input voltage；When pulse control signal pwm is low
During level, energy is transferred to second port IO_2 load capacitance Cout by inductance L, stable is higher than input voltage so as to export
Vin output voltage Vout.
Above-mentioned prior art realizes the unified main circuit with boost mode and decompression mode, but main circuit also needs
Output voltage could be correctly provided under the control of matching control circuit.As noted previously, as in different modes
For controlling the pulse control signal of main circuit different, therefore two kinds of different control circuits are needed at present respectively to both of which
Under main circuit be controlled, in the design that only designer does not bring and operational difficulty, waste resource with into
This.
Therefore, a kind of buck converting means realized using unified circuit framework is expected.
Utility model content
In order to solve the above-mentioned problems of the prior art, the utility model provides a kind of buck converting means, its energy
The control to the boost mode and decompression mode of main circuit is enough realized by unified circuit structure.
The utility model provides a kind of buck converting means, including：Main circuit, there is first port and the second end
Mouthful, for the input voltage received via one of first port and second port to be converted into output according to pulse control signal
Voltage is via another output in first port and second port；And control circuit, it is connected with the main circuit, for carrying
For the pulse control signal, wherein, the control circuit produces Regulate signal according to the feedback signal of the output voltage,
Under boost mode, the pulse control signal is produced according to the Regulate signal, in buck mode, according to the Regulate signal
Inversion signal produce the pulse control signal.
Preferably, the control circuit includes：Voltage sample module, is switchably connected to first port and second port
One of to provide the first sampled voltage or the second sampled voltage；Pulse generation module, provided according to the voltage sample module
First sampled voltage or second sampled voltage and the feedback signal produce the pulse control signal.
Preferably, the voltage sample module includes：First voltage sample circuit and second voltage sample circuit, the first electricity
Pressure sample circuit is connected to the first port to provide first sampled voltage, and second voltage sample circuit is connected to described
Second port is to provide second sampled voltage；First switch unit, in buck mode connecting pulse generation module
The first voltage sample circuit is connected to, pulse generation module is connected into the second voltage under boost mode samples electricity
Road.
Preferably, the first voltage sample circuit include being connected on first resistor between the first port and
Second resistance, the node between the first resistor and second resistance are connected to the first switch unit, the second voltage
Sample circuit include being connected on 3rd resistor and the 4th resistance between the second port, the 3rd resistor and the 4th
Node between resistance is connected to the first switch unit.
Preferably, the pulse generation module includes：Circuit is detected, it is connected with the main circuit, for from the master
Circuit obtains the feedback signal；Error amplifier, its first input end are connected to described the first of the voltage sample module
Switch element, the second input receive reference voltage, and output end provides error signal；Compensation circuit, itself and the detection circuit
It is connected, for carrying out slope compensation to the feedback signal to be compensated signal；Comparator, its with the error amplifier and
The compensation circuit is connected, for providing the Regulate signal according to the error signal and the thermal compensation signal；Logic circuit,
The Regulate signal for being exported under control of the clock signal according to the comparator produce the pulse control signal with
And second switch unit, for the Regulate signal to be directly inputted into the logic circuit under boost mode, in decompression mould
It will be inputted under formula according to the inversion signal of the Regulate signal to the logic circuit.
Preferably, the detection circuit includes current detection circuit, and the pulse generation module also includes change-over circuit, uses
Comparator is supplied in the form that the error signal is converted into electric current.
Preferably, the change-over circuit includes electric capacity and the 5th resistance, and the first end of the 5th resistance receives the mistake
Difference signal, the second end export the 3rd electric current, the first end ground connection of the electric capacity, the second end and the second of the 5th resistance
End is connected.
Preferably, the second switch unit includes switch and phase inverter, and the switch is with input, the first output end
And second output end, under boost mode, the input of the switch is turned on the first output end of the switch with by institute
State Regulate signal and be supplied to the logic circuit, in buck mode, the second of the input of the switch and the switch is defeated
Go out end conducting and the logic circuit is supplied to the inversion signal for obtaining the Regulate signal via the phase inverter.
Preferably, the first switch unit is controlled by switching signal with the second switch unit.
Preferably, the first input end of the error amplifier is inverting input, and the second of the error amplifier is defeated
It is normal phase input end to enter end.
Preferably, the normal phase input end of the comparator receives the error signal, the inverting input of the comparator
The thermal compensation signal is received, the output end of the comparator provides the Regulate signal.
Preferably, the main circuit includes first switch pipe, second switch pipe and inductance, one end of the inductance and institute
State first port to be connected, one of the source electrode of the other end of the inductance and the first switch pipe and drain electrode and described second open
Close the source electrode of pipe and one of drain and be connected, another and the second port phase in the source electrode and drain electrode of the first switch pipe
Even, another ground connection in the source electrode and drain electrode of the second switch pipe, the grid of the first switch pipe are opened with described second
The grid for closing pipe receives the pulse control signal.
According to the buck converting means of the utility model embodiment on the basis of performance and function is ensured, unification is utilized
Circuit structure realize control to the boost mode and decompression mode of main circuit in buck converting means, can allow circuit
Designer more easily carries out the conversion between boost function and buck functionality to circuit, so as to reduce operation difficulty and electricity
Area is realized on road, also reduces cost.
Brief description of the drawings
By the description to the utility model embodiment referring to the drawings, of the present utility model above-mentioned and other mesh
, feature and advantage will be apparent from.
Fig. 1 shows the circuit diagram of the main circuit of prior art in buck mode.
Fig. 2 shows circuit diagram of the main circuit of prior art under boost mode.
Fig. 3 shows the structural representation of the buck converting means of the utility model embodiment.
Fig. 4 shows respectively to switch state signal in buck mode in the buck converting means of the utility model embodiment
Figure.
Fig. 5 shows the time diagram that the buck converting means of the utility model embodiment works in buck mode.
Fig. 6 shows respectively to switch the state signal under boost mode in the buck converting means of the utility model embodiment
Figure.
Fig. 7 shows the time diagram that the buck converting means of the utility model embodiment works in buck mode.
Embodiment
The utility model is more fully described hereinafter with reference to accompanying drawing.In various figures, identical element is using similar
Reference represent.For the sake of clarity, the various pieces in accompanying drawing are not necessarily to scale.In addition, may in figure
Some known parts are not shown.
It describe hereinafter many specific details of the present utility model, such as the structure of device, material, size, place
Science and engineering skill and technology, to be more clearly understood that the utility model.But just as the skilled person will understand,
The utility model can not be realized according to these specific details.
Fig. 3 shows the structural representation of the buck converting means of the utility model embodiment.
As shown in figure 3, the buck converting means 1000 of the utility model embodiment includes main circuit 1100 and control electricity
Road 1200.
Main circuit 1100 includes two switching tube Q1 and Q2 and inductance L, wherein, switching tube Q1 is p-type metal-oxide
Semiconductor field effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET),
Switching tube Q2 is N-type MOSFET.Main circuit 1100 has first port IO_1 and second port IO_2.Switching tube Q1 drain electrode,
Switching tube Q2 drain electrode is connected with inductance L one end, and the inductance L other end is connected to first port IO_1, switching tube Q1 source
Pole is connected to second port IO_2, switching tube Q2 source ground.Switching tube Q1 and Q2 grid are controlled by Pulse Width Control simultaneously
Signal pwm.Wherein, switching tube Q1 source electrode is interchangeable with draining, and switching tube Q2 source electrode is interchangeable with draining.
Control circuit 1200 includes voltage sample module, first switch unit 1230 and pulse generation module 1240.Electricity
Pressure sampling module includes first voltage sample circuit 1210 and second voltage sample circuit 1220.
First switch unit includes switch S1 and switch S2, switch S1 are connected to pulse with switching S2 the first non-controlling end
Generation module 1240.Switch S1 and switch S2 control terminal can be controlled by the anti-phase of switching signal mod and switching signal
Signal mod_b.Such as when switching signal mod is effective, the inversion signal mod_b of switching signal is invalid, S1 conductings are now switched
And switch S2 shut-offs；When switching signal mod is invalid, the inversion signal mod_b of switching signal is effective, now switch S1 shut-off and
Switch S2 conductings.First switch unit 1230 is practiced without limitation to this.
First voltage sample circuit 1210 includes the resistance R11 and R12 being connected between first port IO_1 and ground, resistance
R11 and R12 common port is connected to switch S1 the second non-controlling end.
Second voltage sample circuit 1220 is identical with the structure of first voltage sample circuit 1210.Second voltage sample circuit
1220 resistance R21 and R22 including being connected between second port IO_2 and ground, resistance R21 and R22 common port are connected to out
Close S2 the second non-controlling end.
Pulse generation module 1240 includes detection circuit 1241, error amplifier 1242, comparator 1243, compensation circuit
1244th, second switch unit 1245 and logic circuit 1246.It can be that voltage detecting circuit or electric current are examined to detect circuit 1241
Slowdown monitoring circuit.
When it is current detection circuit to detect circuit 1241：Pulse generation module 1240 also includes change-over circuit 1247.This
When, detection circuit 1241 is used to detect the electric current I_hs for flowing through switching tube Q1 as feedback signal.Error amplifier 1242 it is anti-
Phase input is connected to switch S1 the second non-controlling end and switch S2 the second non-controlling end, and normal phase input end is received with reference to electricity
Press Vref, output end output error signal Vc.Change-over circuit 1247 includes resistance Rint and electric capacity Cint, resistance Rint one end
Error signal Vc is received, the normal phase input end of the resistance Rint other end, electric capacity Cint one end and comparator 1243 is connected,
Electric capacity Cint other end ground connection.Compensation circuit 1244 carries out slope compensation to electric current I_hs and obtains the electric current I_tr of triangle wave mode
As thermal compensation signal.The inverting input of comparator 1243 receives electric current I_tr.
Second switch unit 1245 includes switch S3 and phase inverter inv, and switch S3 can be controlled by switching signal mod.When
When switching signal mod is invalid, the output end of comparator 1243 and the control terminal of logic circuit 1246 are joined directly together by switch S3, when
When switching signal mod is invalid, the output end of comparator 1243 is connected by switch S3 with phase inverter inv, phase inverter inv output end
It is connected with the control terminal of logic circuit 1246.Similarly, switch S3 can also be controlled by the inversion signal mod_b of switching signal,
This is repeated no more.Second switch unit 1245 is practiced without limitation to this.
The clock end of logic circuit 1246 receives clock signal clk, logic circuit 1246 export pulse control signal pwm and
The inversion signal pwm_b of pulse control signal.The structure of logic circuit 1246 can be trigger structure, the control of logic circuit
The set end for trigger structure is held, the clock end of logic circuit is the reset terminal of trigger structure.
Buck converting means 1000 has two kinds of mode of operations：Boost mode and decompression mode.First below to decompression
The course of work of buck converting means 1000 under pattern is described.
Fig. 4 shows respectively to switch state in buck mode in the buck converting means of the utility model embodiment.
For into decompression mode, in the buck converting means 1000 of the present embodiment, the switch in control circuit 1200
S1 is turned on and is switched S2 shut-offs, and the switch S3 in pulse generation module 1240 is by the output end of comparator 1243 and phase inverter inv
It is connected.Switch S1 and S3 is for example controlled by switching signal mod, and switchs the inversion signal mod_b that S2 is controlled by switching signal.
In buck mode, the second port IO_2 of buck converting means 1000 receives input voltage as input
Vin so that input capacitance Cin has been accessed at second port IO_2；The first port IO_1 of buck converting means is as output
End provides the output voltage Vout after decompression so that load resistance Cout has been accessed at first port IO_1.Now, buckling is lifted
Changing device 1000 forms the main circuit of Buck frameworks, and output voltage Vout value is less than the value of input voltage vin.
In buck mode, the buck converting means 1000 with Buck frameworks uses peak current detection pattern
(Peak Current Sense) realizes current feedback.Due to switch S1 conductings, first voltage sample circuit 1210 is to from the
Single port IO_1 output voltage Vout carries out partial pressure and obtains sampled voltage Vp, between sampled voltage Vp and reference voltage Vref
Resistance Rints and electric capacity Cint of the error voltage Vc that difference obtains after the amplification of error amplifier 1242 in change-over circuit 1247
In the presence of produce peak reference electric current Ipk.
Fig. 5 shows the time diagram that the buck converting means of the utility model embodiment works in buck mode.
As shown in Fig. 5 and Fig. 4, when each switch periods T (clock signal clk cycle) starts, clock signal clk controls
Logic circuit 1246 processed exports low level pulse control signal pwm.Therefore the switching tube Q1 as p-type MOSFET is turned on, and is made
Turned off for N-type MOSFET switching tube Q2.Now, switching tube Q1 electric current I_hs approximately linear increasings by initial value are flowed through
Greatly, therefore compensation circuit 1244 starts closely to the electric current I_tr obtained from electric current I_hs progress slope compensations as thermal compensation signal
Seemingly linearly increase and (there is the current waveform risen).When electric current I_tr increases to peak reference electric current Ipk, comparator
Phase inverter inv upset of 1243 Regulate signals exported through being switched on and off S3 conductings is high level so that logic circuit 1246 is defeated
Go out high level with on-off switching tube Q1, conducting switching tube Q2, so as to flow through switching tube Q1 electric current I_hs zero setting, inductance L passes through
Switching tube Q2 is to the first port IO_1 afterflows as output end.Until the clock signal clk arrivals of next cycle, then start
One new switch periods T, repeat said process.
Fig. 6 shows respectively to switch the state signal under boost mode in the buck converting means of the utility model embodiment
Figure.
For into boost mode, in the buck converting means 1000 of the present embodiment, the switch in control circuit 1200
S1 is turned off and is switched S2 conductings, and the output end of comparator 1243 is directly connected in by the switch S3 in pulse generation module 1240 patrols
Collect the control terminal of circuit 1246.
Under boost mode, the first port IO_1 of buck converting means 1000 receives input voltage as input
Vin so that input capacitance Cin has been accessed at first port IO_1；The second port IO_2 of buck converting means is as output
End provides the output voltage Vout after boosting so that load resistance Cout has been accessed at second port IO_2.Now, buckling is lifted
Changing device 1000 forms the main circuit of Boost frameworks, and output voltage Vout value is more than the value of input voltage vin.
Under boost mode, the buck converting means 1000 with Boost frameworks uses valley point current detection pattern
(Valley Current Sense) realizes current feedback.Due to switch S2 conducting, second voltage sample circuit 1220 to from
Second port IO_2 output voltage Vout carries out partial pressure and obtains sampled voltage Vp, between sampled voltage Vp and reference voltage Vref
Difference after the amplification of error amplifier 1242 obtained error voltage Vc resistance Rint and electric capacity in change-over circuit 1247
Valley reference current Ivy is produced in the presence of Cint.
Fig. 7 shows the time diagram that the buck converting means of the utility model embodiment works in buck mode.
As shown in Fig. 7 and Fig. 6, when each switch periods T (clock signal clk cycle) starts, clock signal clk controls
Logic circuit 1246 processed exports low level pulse control signal pwm.Therefore the switching tube Q1 as p-type MOSFET is turned on, and is made
Turned off for N-type MOSFET switching tube Q2.Now, inductance L begins through switching tube Q1 to second port IO_2 afterflows, flows through out
The electric current I_hs for closing pipe Q1 approximately linearly reduces by initial value, therefore compensation circuit 1244 carries out slope to electric current I_hs
Electric current I_tr obtained from compensation as thermal compensation signal starts approximately linearly to reduce and (have the current waveform declined).When
When current signal I_tr is reduced to valley reference current Ivy, the signal upset that comparator 1243 is exported is high level so that is patrolled
Collect circuit 1246 and export high level with on-off switching tube Q1, conducting switching tube Q2, put so as to flow through switching tube Q1 electric current I_hs
Zero, inductance L put aside energy by switching tube Q2.Until the clock signal clk of next cycle arrives, then start one and new open
Close cycle T, repeat said process.
It should be noted that the circuit topological structure of the utility model embodiment is not limited to above-described concrete structure,
For same in the scope of protection of the utility model with implementation principle identical structure of the present utility model.For example, as upper
A kind of alternative embodiment of embodiment is stated, under boost mode, the buck converting means with Boost frameworks uses peak value
Amperometric detection mode realizes current feedback, and in buck mode, the buck converting means with Buck frameworks uses valley
Amperometric detection mode realizes current feedback, and detailed process is similar to the aforementioned embodiment, will not be repeated here.
According to the buck converting means of the utility model embodiment on the basis of performance and function is ensured, unification is utilized
Circuit structure realize control to the boost mode and decompression mode of main circuit in buck converting means, can allow circuit
Designer more easily carries out the conversion between boost function and buck functionality to circuit, so as to reduce operation difficulty and electricity
Area is realized on road, also reduces cost.
It should be noted that herein, such as first and second or the like relational terms are used merely to a reality
Body or operation make a distinction with another entity or operation, and not necessarily require or imply and deposited between these entities or operation
In any this actual relation or order.Moreover, term " comprising ", "comprising" or its any other variant are intended to
Nonexcludability includes, so that process, article or equipment including a series of elements not only include those key elements, and
Also include the other element that is not expressly set out, or also include for this process, article or the intrinsic key element of equipment.
In the absence of more restrictions, the key element limited by sentence "including a ...", it is not excluded that including the key element
Process, other identical element also be present in article or equipment.
According to embodiment of the present utility model as described above, these embodiments do not have all details of detailed descriptionthe,
Also it is only described specific embodiment not limit the utility model.Obviously, as described above, many modification and change can be made
Change.This specification is chosen and specifically describes these embodiments, is to preferably explain that principle of the present utility model and reality should
With so that skilled artisan can repairing using the utility model and on the basis of the utility model well
Change use.The utility model is only limited by claims and its four corner and equivalent.
Claims (12)
1. a kind of buck converting means, including：
Main circuit, there is first port and second port, for will be via first port and the second end according to pulse control signal
The input voltage that one of mouth receives is converted to output voltage via another output in first port and second port；And
Control circuit, it is connected with the main circuit, for providing the pulse control signal,
Wherein, the control circuit produces Regulate signal according to the feedback signal of the output voltage,
Under boost mode, the pulse control signal is produced according to the Regulate signal,
In buck mode, the pulse control signal is produced according to the inversion signal of the Regulate signal.
2. buck converting means according to claim 1, wherein, the control circuit includes：
Voltage sample module, one of first port and second port are switchably connected to provide the first sampled voltage or second
Sampled voltage；
Pulse generation module, first sampled voltage or second sampled voltage provided according to the voltage sample module
The pulse control signal is produced with the feedback signal.
3. buck converting means according to claim 2, wherein, the voltage sample module includes：
First voltage sample circuit and second voltage sample circuit, first voltage sample circuit are connected to the first port to carry
For first sampled voltage, second voltage sample circuit is connected to the second port to provide second sampled voltage；
First switch unit, for pulse generation module to be connected into the first voltage sample circuit in buck mode,
Pulse generation module is connected to the second voltage sample circuit under boost mode.
4. buck converting means according to claim 3, wherein, the first voltage sample circuit includes being connected on ground
First resistor and second resistance between the first port, the node between the first resistor and second resistance are connected to
The first switch unit,
The second voltage sample circuit include being connected on 3rd resistor and the 4th resistance between the second port, institute
State the node between 3rd resistor and the 4th resistance and be connected to the first switch unit.
5. buck converting means according to claim 3, wherein, the pulse generation module includes：
Circuit is detected, it is connected with the main circuit, for obtaining the feedback signal from the main circuit；
Error amplifier, its first input end are connected to the first switch unit of the voltage sample module, the second input
End receives reference voltage, and output end provides error signal；
Compensation circuit, it is connected with the detection circuit, for carrying out slope compensation to the feedback signal to be compensated letter
Number；
Comparator, it is connected with the error amplifier and the compensation circuit, for according to the error signal and the benefit
Repay signal and the Regulate signal is provided；
Logic circuit, the Regulate signal for being exported under control of the clock signal according to the comparator produce the arteries and veins
Rush control signal；And
Second switch unit, for the Regulate signal to be directly inputted into the logic circuit under boost mode, it is being depressured
It will be inputted under pattern according to the inversion signal of the Regulate signal to the logic circuit.
6. buck converting means according to claim 5, wherein, the detection circuit includes current detection circuit, institute
Stating pulse generation module also includes change-over circuit, and the form for the error signal to be converted into electric current is supplied to comparator.
7. buck converting means according to claim 6, wherein, the change-over circuit includes electric capacity and the 5th resistance,
The first end of 5th resistance receives the error signal, the second end exports the 3rd electric current, the first end ground connection of the electric capacity,
Second end is connected with the second end of the 5th resistance.
8. buck converting means according to claim 5, wherein, the second switch unit includes switch and anti-phase
Device, the switch have input, the first output end and the second output end,
Under boost mode, the input of the switch is turned on the first output end of the switch so that the Regulate signal to be carried
The logic circuit is supplied,
In buck mode, the input of the switch is turned on the second output end of the switch so that the Regulate signal to be passed through
The inversion signal obtained by the phase inverter is supplied to the logic circuit.
9. buck converting means according to claim 5, wherein, the first switch unit and the second switch list
Member is controlled by switching signal.
10. buck converting means according to claim 5, wherein, the first input end of the error amplifier is anti-
Phase input, the second input of the error amplifier is normal phase input end.
11. buck converting means according to claim 6, wherein, described in the normal phase input end reception of the comparator
Error signal, the inverting input of the comparator receive the thermal compensation signal, and the output end of the comparator provides the tune
Save signal.
12. the buck converting means according to any one of claim 1 to 11, wherein, the main circuit is opened including first
Guan Guan, second switch pipe and inductance, one end of the inductance are connected with the first port, the other end of the inductance and institute
State the source electrode of one of the source electrode of first switch pipe and drain electrode and the second switch pipe and one of drain and be connected, described first opens
Another closed in the source electrode and drain electrode of pipe is connected with the second port, another in the source electrode and drain electrode of the second switch pipe
One ground connection, the grid of the grid of the first switch pipe and the second switch pipe receive the pulse control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720114584.4U CN206878708U (en) | 2017-02-07 | 2017-02-07 | Buck converting means |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720114584.4U CN206878708U (en) | 2017-02-07 | 2017-02-07 | Buck converting means |
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|---|---|
| CN206878708U true CN206878708U (en) | 2018-01-12 |
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ID=61326359
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106602878A (en) * | 2017-02-07 | 2017-04-26 | 北京集创北方科技股份有限公司 | Buck-boost conversion device |
| CN115664206A (en) * | 2022-12-29 | 2023-01-31 | 安华数据(东莞)有限公司 | Energy-saving scheduling device for data center |
-
2017
- 2017-02-07 CN CN201720114584.4U patent/CN206878708U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106602878A (en) * | 2017-02-07 | 2017-04-26 | 北京集创北方科技股份有限公司 | Buck-boost conversion device |
| CN115664206A (en) * | 2022-12-29 | 2023-01-31 | 安华数据(东莞)有限公司 | Energy-saving scheduling device for data center |
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