CN206743207U - A kind of jamproof on-off circuit of false-touch prevention - Google Patents
A kind of jamproof on-off circuit of false-touch prevention Download PDFInfo
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- CN206743207U CN206743207U CN201720503901.1U CN201720503901U CN206743207U CN 206743207 U CN206743207 U CN 206743207U CN 201720503901 U CN201720503901 U CN 201720503901U CN 206743207 U CN206743207 U CN 206743207U
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Abstract
The utility model provides a kind of jamproof on-off circuit of false-touch prevention, including false-touch prevention delay control circuit (101), to the level signal of Rreceive output circuit (104) feedback, in the threshold time of false-touch prevention delay, mask switch SW operation；Power cut off delay control circuit (102), when the duration for pressing the switch SW exceedes the threshold time of power cut off delay, to output switching activity control signal to reverse circuit (103)；Reverse circuit (103), to bypass inputted interference signal, and receive the upset control signal of power cut off delay control circuit (102) output, low level is exported to trigger the upset of the trigger of the output circuit (104) to the output circuit (104) output control signal, is completed to load power down；Output circuit (104), low level is powered or exported to load to load power down to receive control signal and export high level.The utility model is completed using the cheap discrete component of cost and trigger, has that simple and reliable, cost is cheap, the beneficial effect of working stability.
Description
Technical field
It the utility model is related to electronic circuit technology field, and in particular to a kind of on-off circuit, more particularly to it is a kind of anti-error
Touch jamproof on-off circuit.
Background technology
On-off circuit refers to the circuit with " on " and "off" two states.With the flourishing hair of whole electronics industry
Exhibition and the continuous progress of electronic technology, the application of on-off circuit are also more and more extensive.
When with electronic touch on-off circuit of the prior art, due to the interference brought such as long of control line, or
False touch, loose contact of the person due to switch, and the reason such as artificial maloperation, electronic touch of the prior art is caused to switch
Circuit can be frequently switched on/disconnect, and cause control circuit to enter stable working condition, so that the abnormity of power supply of load
Ground turns on/off and causes the damage to load equipment.
In addition, triggers circuit of the prior art causes one easily by the coupled interference on circuit board and the interference of electromagnetic field
Switching tube is likely to occur false triggering several times in the individual cycle so that whole circuit work is abnormal.
Furthermore the effect quivered that in the prior art, disappears for the simple capacitance-resistance using routine is undesirable, unstable, no-delay
With it is unlimited when control function；And realize that delay control circuit is excessively complicated, manufacturing cost is higher using single-chip microcomputer.
Utility model content
The utility model is in view of the shortcomings of the prior art and above mentioned problem, there is provided a kind of jamproof switch electricity of false-touch prevention
Road, it can realize and interference signal is shielded after switching on power, and the operation of switch is not responding in the threshold time of on off delay, keep away
Exempt from continually break-make, false touch, loose contact etc. influences to caused by load；In addition, when needs power-off and by the duration to compress switch
More than power cut off delay threshold time when, to load power down, avoid the load accident power-off caused by artificial maloperation etc..This
Utility model, which provides a kind of jamproof on-off circuit of false-touch prevention, to be included：
False-touch prevention delay control circuit (101), after switching on power by the SW that compresses switch and being powered to load, to receive defeated
Go out the level signal of circuit (104) feedback, in the threshold time of false-touch prevention delay, shield the operation of the switch SW；
Power cut off delay control circuit (102), when the duration for pressing the switch SW exceedes the threshold time of power cut off delay,
To output switching activity control signal to reverse circuit (103)；
Reverse circuit (103), to bypass inputted interference signal, and receive the power cut off delay control circuit
(102) the upset control signal of output, the upset control signal trigger reverse circuit (103) output and overturn
Afterwards, exported low to the output circuit (104) output control signal with triggering the upset of the trigger of the output circuit (104)
Level, complete to load power down；
Output circuit (104), to receive the control signal of the reverse circuit (103) output, the control signal is touched
The trigger for sending out output circuit (104) described overturns and exports that high level is powered to load or output low level is to load power down.
Preferably, the false-touch prevention delay control circuit (101) includes triode Q3, resistance R11, resistance R5 and electricity
Hold C5, wherein, after the other end parallel connection of triode Q3 emitter stage and resistance R4 with being electrically connected to power supply, triode Q3 base
Pole, resistance R11, resistance R5, electric capacity C5 are sequentially connected in series, and by electric capacity C5 one end with being electrically connected to power supply.
Preferably, the power cut off delay control circuit (102) includes resistance R2, resistance R7, resistance R8, electric capacity C2, two
Pole pipe D1 and voltage-regulator diode D2, wherein, voltage-regulator diode D2 negative pole and the three of the false-touch prevention delay control circuit (101)
Pole pipe Q3 colelctor electrodes, diode D1 positive pole, resistance R2 one end and electric capacity C2 one end are connected in parallel, and resistance R2's is another
End electrically connects with diode D1 negative pole, the C2 other end with being electrically connected to power supply, voltage-regulator diode D2 positive pole and resistance R7,
Resistance R8 is sequentially connected in series, and the resistance R8 other end is with being electrically connected to power supply.
Preferably, the reverse circuit (103) includes triode Q1, triode Q2 and resistance R9, wherein, triode Q1
Base stage be electrically connected to resistance R8 one end, with being electrically connected to power supply, triode Q1 colelctor electrode is electrically connected the resistance R8 other end
Triode Q2 base stage is connected to, and is electrically connected to resistance R9 one end, the resistance R9 other end is electrically connected to output end OUT, and three
Pole pipe Q2 colelctor electrode is electrically connected to the 3rd pin 1CP of the trigger U1, and is electrically connected to resistance R6 one end, triode
Q1 and triode Q2 emitter stage are with being electrically connected to power supply.
Preferably, the output circuit (104) includes trigger U1, resistance R3, resistance R10, electric capacity C3, electric capacity C4,
Wherein,
The 1st pin 1Q ends of the trigger U1 as the jamproof on-off circuit of the false-touch prevention output end and be electrically connected
It is connected to resistance R10 one end and electric capacity C4 one end, with being electrically connected to power supply, and R10 is as described defeated for the resistance R10 other end
Go out the load resistance at end, the electric capacity C4 other end is electrically connected to resistance R4 one end and the 11st pin 2CP of the trigger U1
End, the resistance R4 other end is with being electrically connected to power supply；
The 2nd pin of the trigger U1End electrically connects with the 5th pin 1D ends, and the 3rd pin 1CP ends are electrically connected to institute
The triode Q2 of reverse circuit (103) colelctor electrode and resistance R6 one end are stated, the 4th pin 1R ends are electrically connected to the one of resistance R3
End and electric capacity C3 one end, with being electrically connected to power supply, the electric capacity C3 other end is electrically connected to the triggering to the resistance R3 other end
Device U1 the 9th pin 2D ends and positive source VCC, the 6th pin 1S ends connect the 7th pin Vss ends and with being electrically connected to power supply；
The 8th pin 2S ends of the trigger U1 are electrically connected to electric capacity C6 one end and electric capacity C5 one end, electric capacity C6's
One end is with being electrically connected to power supply and the other end is electrically connected to positive source VCC, and the electric capacity C5 other end is electrically connected to resistance R5's
One end, the 10th pin 2R ends are electrically connected between the electric capacity C5 other end and resistance R5 one end, the electrical connection of the 13rd pin 2Q ends
To resistance R5 the other end and resistance R11 one end between, the 9th pin 2D ends are electrically connected to electric capacity C3 positive pole, the 12nd pin
Hanging unused, the 14th pin vdd terminal and switch SW are electrically connected to positive source VCC in parallel.
Preferably, the trigger U1 is flip and flop generator.
Preferably, the electric capacity C6 is filter capacitor, the parallel circuit of resistance R1 and electric capacity the C1 composition is de-noising
Circuit and filter circuit.
Preferably, the threshold time of the false-touch prevention delay is not less than 1 second and no more than the valve of the power cut off delay
It is worth the time.
Compared with prior art, the utility model is completed using the cheap discrete component of cost and trigger, is had simple
Reliably, cost is cheap, beneficial effect of working stability.
Brief description of the drawings
Fig. 1 shows the structured flowchart of on-off circuit of the present utility model.
Fig. 2 shows the circuit diagram of the on-off circuit of the utility model embodiment.
Embodiment
Following description referring to the drawings is provided, to help this practicality that comprehensive understanding is limited by claim and its equivalent
New embodiment and various specific details, but these details are considered only as being exemplary.Therefore, the ordinary skill of this area
Personnel can be carried out it will be recognized that in the case where not departing from the scope of the utility model and spirit to embodiment described herein
Various changes and modifications.In addition, for clarity and brevity, omit the description to known function and structure.Below in conjunction with the accompanying drawings
The utility model is further elaborated with embodiment.
Fig. 1 shows the structured flowchart of the on-off circuit of the utility model embodiment.As shown in figure 1, a kind of false-touch prevention resists
The on-off circuit of interference, including：
False-touch prevention delay control circuit (101), after switching on power by the SW that compresses switch and being powered to load, to receive defeated
Go out the level signal of circuit (104) feedback, in the threshold time of false-touch prevention delay, mask switch SW operation；
Power cut off delay control circuit (102), when exceeding the threshold time of power cut off delay by the duration for the SW that compresses switch, to
Output switching activity control signal is to reverse circuit (103)；
Reverse circuit (103), to bypass inputted interference signal, and it is defeated to receive power cut off delay control circuit (102)
The upset control signal gone out, after upset control signal triggering reverse circuit (103) output is overturn, to output circuit (104)
Output control signal is completed to load power down so that the trigger of trigger output circuit (104) is overturn and exports low level；
Output circuit (104), to receive the control signal of reverse circuit (103) output, control signal triggering output electricity
The trigger on road (104) overturns and exports high level is powered or exports low level to load power down to load.
Fig. 2 shows the circuit diagram of the on-off circuit of the utility model embodiment, as shown in Fig. 2 trigger U1 is bistable
State trigger, its inside include two d type flip flops, i.e. trigger 1 and trigger 2, wherein, the 1st pin to the 6th pin belongs to tactile
Hair pin to the 13rd pin of device the 1, the 8th belongs to trigger 2, and the 7th pin is Vss, and the 14th pin is VDD.
As shown in Fig. 2 when power supply VCC powers, electric capacity C3 provides a level to the 4th pin R1 ends makes trigger 1
State is reset, and its 1st pin 1Q end is set to 0, no high level output；Resistance R3 provides repid discharge loop to electric capacity C3；Due to the 9th
Pin 2D ends are electrically connected to power supply VCC, therefore the 13rd pin 2Q ends, also without high level output, now, circuit waits control signal
Arrive.
As shown in Fig. 2 when needing to load supplying, touch in wink/touch-switch SW, power supply VCC high level is by electric capacity C1
After shaping, by resistance R6 amplitude limits, the control signal of high level is exported to the 3rd pin 1CP ends of trigger 1, by touching
After sending out the inside Schmidt circuit upset of device 1, at the 1st pin 1Q ends, output high level to load supplying and locks working condition；Electricity
Load resistances of the R10 as the 1st pin 1Q output ends is hindered, also serves as electric capacity C4 discharge loop.
As shown in Fig. 2 the high level of the pin 1Q ends of trigger 1 the 1st output, on the one hand leads triode Q2 by resistance R9
It is every to be exported by resistance R6 to the level signal at the 3rd pin 1CP ends by the 3rd pin 1CP ends shorted to earth after logical including dry
Disturb the level signals such as signal, false touch, loose contact and artificial maloperation, be bypassed due to triode Q2 conducting into
Ground, trigger 1 are not overturn, and the output of the 1st pin 1Q ends maintains high level constant and persistently powered to the load, and circuit enters steady
Determine output state；On the other hand, the high level of the 1st pin 1Q ends output by electric capacity C4 to the 11st pin 2CP ends of trigger 2
One triggering level of synchronism output, after the inside Schmidt circuit upset of trigger 2, high electricity is exported at the 13rd pin 2Q ends
It is flat.The high level is divided into two-way again, turns on triode Q3 by R11 all the way, the delay electricity that resistance R2 and electric capacity C2 is formed
The stored charge on road is released totally, and triode Q1 is not turned on, and triode Q2 does not end, and the 3rd pin 1CP ends still will not receive it
Its various level signal, the output of the 1st pin 1Q ends continue to stable high level；Another way is filled by resistance R5 to electric capacity C5
Electricity, due to the characteristic of the resistance R5 and electric capacity C5 RC delay circuits formed, electric capacity C5 can be set to be full of the time of electric charge, and set
The threshold time that the time is on off delay is put, in this embodiment, the threshold time of on off delay is arranged to 1 second, 1 second
The 10th pin 2R ends of trigger 2 obtain level signal and reset upset afterwards so that the 13rd pin 2Q ends are without output, triode Q3
Cut-off, offer condition is charged normal for resistance R2 and electric capacity the C2 delay circuit formed, hereafter, long-press switch SW operation by regarding
For effective power operation (as described below).In the present embodiment, electric capacity C5 electric charge passes through resistance R5, resistance R11, triode Q3
Loop is formed to release, and resistance R4 provides discharge loop for electric capacity C4.
As shown in Fig. 2 because triode Q3 has been switched off, when needing power-off long-press switch SW, VCC by switch SW and
Resistance R2 continues to charge to electric capacity C2, and the level of C2 positive poles (A points) persistently raises, the RC formed due to resistance R2 and electric capacity C2
The characteristic for the conducting voltage that the characteristic and voltage-regulator diode of delay circuit have, electric capacity C2 can be set full of electric charge and reached
The time of voltage-regulator diode conducting voltage, and the threshold time that the time is power cut off delay is set；In the present embodiment, power cut off delay
Threshold time be arranged to 3 seconds, when reaching 3 seconds by the SW that compresses switch, voltage-regulator diode D2 conducting, electric current flow through resistance R7
Make triode Q1 conductings, triode Q2 cut-offs.Required power down control signal is exported to the 3rd pin 1CP ends by resistance R6, is touched
The inside Schmidt circuit upset of device 1 is sent out, the 1st pin 1Q ends output low level, is completed to load power down.In the present embodiment, resistance
R1 is electric capacity C1 discharge loop, and diode D1 and resistance R1 are electric capacity C2 discharge loops.
, for those of ordinary skills, can be with it should be appreciated that the utility model is not limited to above-mentioned citing
Improved or converted according to the above description, all these modifications and variations should all belong to the appended claims for the utility model
Protection domain.
Claims (8)
1. a kind of jamproof on-off circuit of false-touch prevention, it is characterised in that the on-off circuit includes：
False-touch prevention delay control circuit (101), to after switching on power by the SW that compresses switch and being powered to load, Rreceive output is electric
The level signal of road (104) feedback, in the threshold time of false-touch prevention delay, shield the operation of the switch SW；
Power cut off delay control circuit (102), when the duration for pressing the switch SW exceedes the threshold time of power cut off delay, to
Output switching activity control signal is to reverse circuit (103)；
Reverse circuit (103), to bypass inputted interference signal, and it is defeated to receive the power cut off delay control circuit (102)
The upset control signal gone out, after upset control signal triggering reverse circuit (103) output is overturn, to institute
Output circuit (104) output control signal is stated to trigger the upset of the trigger of the output circuit (104) and exports low level, it is complete
Paired load power down；
Output circuit (104), to receive the control signal of the reverse circuit (103) output, the control signal triggers institute
The trigger for stating output circuit (104) overturns and exports high level to load energization or output low level to load power down.
A kind of 2. jamproof on-off circuit of false-touch prevention according to claim 1, it is characterised in that the false-touch prevention delay
Control circuit (101) includes triode Q3, resistance R11, resistance R5 and electric capacity C5, wherein, triode Q3 emitter stage and electricity
After resistance R4 other end parallel connection with being electrically connected to power supply, triode Q3 base stage, resistance R11, resistance R5, electric capacity C5 are sequentially connected in series
Connection, and by electric capacity C5 one end with being electrically connected to power supply.
A kind of 3. jamproof on-off circuit of false-touch prevention according to claim 2, it is characterised in that the power cut off delay control
Circuit (102) processed includes resistance R2, resistance R7, resistance R8, electric capacity C2, diode D1 and voltage-regulator diode D2, wherein, voltage stabilizing two
Pole pipe D2 negative pole and triode Q3 colelctor electrodes, diode D1 positive pole, the resistance of the false-touch prevention delay control circuit (101)
R2 one end and electric capacity C2 one end are connected in parallel, and the resistance R2 other end electrically connects with diode D1 negative pole, and C2's is another
With being electrically connected to power supply, voltage-regulator diode D2 positive pole and resistance R7, resistance R8 are sequentially connected in series, and resistance R8's is another for one end
End is with being electrically connected to power supply.
A kind of 4. jamproof on-off circuit of false-touch prevention according to claim 3, it is characterised in that the reverse circuit
(103) triode Q1, triode Q2 and resistance R9 are included, wherein, triode Q1 base stage is electrically connected to resistance R8 one end, electricity
With being electrically connected to power supply, triode Q1 colelctor electrode is electrically connected to triode Q2 base stage to the resistance R8 other end, and is electrically connected to
Resistance R9 one end, the resistance R9 other end are electrically connected to output end OUT, and triode Q2 colelctor electrode is electrically connected to the triggering
Device U1 the 3rd pin 1CP, and resistance R6 one end is electrically connected to, triode Q1 and triode Q2 emitter stage are electrically connected to
Power supply.
A kind of 5. jamproof on-off circuit of false-touch prevention according to claim 4, it is characterised in that the output circuit
(104) trigger U1, resistance R3, resistance R10, electric capacity C3, electric capacity C4 are included, wherein,
The 1st pin 1Q ends of the trigger U1 as the jamproof on-off circuit of the false-touch prevention output end and be electrically connected to
Resistance R10 one end and electric capacity C4 one end, with being electrically connected to power supply, and R10 is as the output end for the resistance R10 other end
Load resistance, the electric capacity C4 other end is electrically connected to resistance R4 one end and the 11st pin of the trigger U1, resistance R4
The other end with being electrically connected to power supply；
The 2nd pin of the trigger U1End electrically connects with the 5th pin 1D ends, and the 3rd pin 1CP ends are electrically connected to described turn over
The triode Q2 of shifting circuit (103) colelctor electrode and resistance R6 one end, the 4th pin 1R ends be electrically connected to resistance R3 one end and
Electric capacity C3 one end, with being electrically connected to power supply, the electric capacity C3 other end is electrically connected to the trigger U1 to the resistance R3 other end
The 9th pin 2D ends and positive source VCC, the 6th pin 1S ends connect the 7th pin Vss ends and with being electrically connected to power supply；
The 8th pin 2S ends of the trigger U1 are electrically connected to electric capacity C6 one end and electric capacity C5 one end, electric capacity C6 one end
With being electrically connected to power supply and the other end is electrically connected to positive source VCC, and the electric capacity C5 other end is electrically connected to resistance R5 one end,
10th pin 2R ends are electrically connected between the electric capacity C5 other end and resistance R5 one end, and the 13rd pin 2Q ends are electrically connected to resistance
Between the R5 other end and resistance R11 one end, the 9th pin 2D ends are electrically connected to electric capacity C3 positive pole, and the 12nd pin is hanging not
With the 14th pin vdd terminal and switch SW are electrically connected to positive source VCC in parallel.
6. the jamproof on-off circuit of a kind of false-touch prevention according to claim 5, it is characterised in that the trigger U1 is
Flip and flop generator.
7. the jamproof on-off circuit of a kind of false-touch prevention according to claim 6, it is characterised in that the electric capacity C6 is filter
Ripple electric capacity, the RC parallel circuits of resistance R1 and electric capacity the C1 composition are de-noising circuit and filter circuit.
A kind of 8. jamproof on-off circuit of false-touch prevention according to claim 7, it is characterised in that the false-touch prevention delay
Threshold time not less than 1 second and no more than the power cut off delay threshold time.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720503901.1U CN206743207U (en) | 2017-05-09 | 2017-05-09 | A kind of jamproof on-off circuit of false-touch prevention |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720503901.1U CN206743207U (en) | 2017-05-09 | 2017-05-09 | A kind of jamproof on-off circuit of false-touch prevention |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206743207U true CN206743207U (en) | 2017-12-12 |
Family
ID=60564185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720503901.1U Withdrawn - After Issue CN206743207U (en) | 2017-05-09 | 2017-05-09 | A kind of jamproof on-off circuit of false-touch prevention |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN206743207U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106961267A (en) * | 2017-05-09 | 2017-07-18 | 四川巧夺天工信息安全智能设备有限公司 | A kind of jamproof on-off circuit of false-touch prevention |
| CN110362145A (en) * | 2019-08-12 | 2019-10-22 | 兆讯恒达微电子技术(北京)有限公司 | A kind of switching on and shutting down control circuit of on-off control method and Embedded |
-
2017
- 2017-05-09 CN CN201720503901.1U patent/CN206743207U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106961267A (en) * | 2017-05-09 | 2017-07-18 | 四川巧夺天工信息安全智能设备有限公司 | A kind of jamproof on-off circuit of false-touch prevention |
| CN106961267B (en) * | 2017-05-09 | 2023-05-30 | 四川巧夺天工信息安全智能设备有限公司 | Anti-misoperation anti-interference switching circuit |
| CN110362145A (en) * | 2019-08-12 | 2019-10-22 | 兆讯恒达微电子技术(北京)有限公司 | A kind of switching on and shutting down control circuit of on-off control method and Embedded |
| CN110362145B (en) * | 2019-08-12 | 2024-02-09 | 兆讯恒达科技股份有限公司 | On-off control method and on-chip integrated on-off control circuit |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20171212 Effective date of abandoning: 20230530 |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20171212 Effective date of abandoning: 20230530 |
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| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |