CN206711075U - A kind of four-quadrant analog divider - Google Patents
A kind of four-quadrant analog divider Download PDFInfo
- Publication number
- CN206711075U CN206711075U CN201720434413.XU CN201720434413U CN206711075U CN 206711075 U CN206711075 U CN 206711075U CN 201720434413 U CN201720434413 U CN 201720434413U CN 206711075 U CN206711075 U CN 206711075U
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- circuit
- analog
- quadrant
- absolute value
- analog divider
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Abstract
It the utility model is related to a kind of four-quadrant analog divider, electronic technology field, the divider includes the first absolute value circuit, second absolute value circuit the first analog divider circuit, second analog divider circuit, 3rd analog divider circuit, first four-quadrant analog multiplier circuit and the second four-quadrant analog multiplier circuit, input signal using analog quantity as absolute value circuit, input signal of the output signal of absolute value circuit as analog divider circuit, input signal using the output signal of analog divider circuit as four-quadrant analog multiplier circuit, the result that two input signals are divided by may finally be obtained, the final output signal of i.e. designed four-quadrant simulation division.
Description
Technical field
A kind of four-quadrant analog divider is the utility model is related to, belongs to electronic technology field.
Background technology
Analog divider is a kind of electronic device that can be realized two analog quantitys and be divided by, and is not only applicable to simulation trial at present
Aspect, and expand to the fields such as radio communication, television broadcasting, measuring instrument, control system.Sent out as these fields are flourishing
Exhibition, the requirement more and more higher to analog divider, is not only limited to first quartile computing, but need the simulation division of four-quadrant
Computing, therefore, the research of four-quadrant analog divider are particularly important in these fields.
Research for analog divider, there are a variety of methods.Chinese patent CN105677295 A, it is proposed that Yi Zhongqiu
The circuit of ratio value between two input voltages, that is, four-quadrant analog divider circuit.This method by ratio value computing unit,
Analog result output unit and four-quadrant adjustment and sequencing unit composition, core are that parallel A/D converter is changed with parallel D/A
Device, for calculating the ratio value between two bipolarity input voltages, while export the ratiometric result of analog signal form.But the party
Method ratio value calculating speed is slow, and two input voltages are gentle, no generality, and the reference voltage of A/D converter
The input voltage range of input is also restricted.
Utility model content
The utility model is in order to solve problems of the prior art, there is provided one kind is multiplied using amplifier, four-quadrant simulation
Four-quadrant analog divider circuit on the basis of musical instruments used in a Buddhist or Taoist mass etc..
In order to achieve the above object, the utility model proposes technical scheme be：A kind of four-quadrant analog divider, is used for
Realize that two analog quantitys are divided by, including absolute value circuit, analog divider circuit and four-quadrant analog multiplier circuit, it is described exhausted
Two are provided with to value circuit, respectively the first absolute value circuit and the second absolute value circuit, analog divider circuit are provided with three,
Respectively the first analog divider circuit, the second analog divider circuit and the 3rd analog divider circuit, four-quadrant simulation multiply
Adder circuit is provided with two, respectively the first four-quadrant analog multiplier circuit and the second four-quadrant analog multiplier circuit, the
The input of one absolute value circuit and the second absolute value circuit inputs two analog quantitys respectively, the first absolute value circuit and second exhausted
The output end for being worth circuit is connected with two inputs of the first analog divider circuit respectively, the first analog divider circuit
Output end and the output end of the first absolute value circuit are connected with two inputs of the second analog divider circuit respectively, the second mould
The output end of plan divider circuit and the output end of the second absolute value circuit are defeated with two of the 3rd analog divider circuit respectively
Enter end connection, an input of the first four-quadrant analog multiplier circuit and the output end of the 3rd analog divider circuit connect
Connect, another input inputs an analog quantity, an input of the second four-quadrant analog multiplier circuit and the first four-quadrant
The output end connection of analog multiplier circuit is limited, another input inputs another analog quantity.
Above-mentioned technical proposal is improved to：The absolute value circuit includes resistance, diode and chip 3554AM.
The analog divider circuit includes resistance, chip 3554AM and multiplier chip MC1496.
The four-quadrant analog multiplier circuit includes resistance, 1A current sources and chip 2N2219.
The beneficial effects of the utility model are：
1st, the utility model using absolute value circuit, analog divider circuit and four-quadrant analog multiplier circuit these
Most basic, common circuit realizes four-quadrant analog divider function, and design is simple, it is readily appreciated that, it is cheap, it is low in energy consumption
It is and easily fabricated.
2nd, output end of the present utility model is the result that two input signals are divided by, wherein, input signal can have and just have
Negative, therefore, output result also has and is just having negative, can solve the division arithmetic in four quadrants.
Brief description of the drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 is the circuit diagram of absolute value circuit.
Fig. 3 is circuit diagram of the simulation except device circuit.
Fig. 4 is circuit diagram of the simulation except device circuit.
Fig. 5 is circuit diagram of the present utility model.
Embodiment
Below in conjunction with the accompanying drawings and the utility model is described in detail specific embodiment.
Embodiment
As shown in figure 1, a kind of four-quadrant analog divider of the present embodiment, is made up of three parts, respectively absolute value is electric
Device circuit is removed on road, simulation and simulation removes device circuit.
As shown in Fig. 2 absolute value circuit is made up of resistance, diode and chip 3554AM, by resistance, chip
3554AM and multiplier chip MC1496 is formed, wherein all resistance are all equal.When input signal is positive half cycle (i.e. positive electricity
Pressure) when, VD1 conductings, VD2 is not turned on, because all resistance are all equal, output, bear half
Week, (i.e. negative voltage) VD1 was not turned on, VD2 conductings, output。
As shown in figure 3, what simulation division circuit was made up of analog multiplier as the negative-feedback circuit of integrated transporting discharging, its
It is made up of resistance, chip 3554AM and multiplier chip MC1496.As seen from the figure,, because, institute
With, therefore export。
Fig. 4 is double-balance four-quadrant analog multiplier circuit.This circuit requirement works as input voltageWithRespectively much
During less than 52mv, in voltageWithUnder effect, input signalWithBy triode、WithAfterwards, it is defeated
Go out four-quadrant multiplication result, wherein, wherein。
Wherein, chip 3554AM is the chip of AD companies production, has low noise, low-power consumption, JEET input operation amplifiers
The features such as device.MC1496 is the chip of ON semiconductor companies production, possesses splendid carrier wave rejection, high cmrr with
And the features such as gain and adjustable signal.Chip 2N2219 possesses that working environment Applicable temperature scope is wide, and saturation voltage is low, and electric current increases
The features such as benefit is high.
Fig. 5 is the circuit structure diagram of the four-quadrant analog divider of the present embodiment, including the first absolute value circuit, second exhausted
To value circuit, the first analog divider circuit, the second analog divider circuit, the 3rd analog divider circuit, the first four-quadrant
Analog multiplier circuit and the second four-quadrant analog multiplier circuit.
In the course of the work first by two absolute value circuits,Mouth inputs input signal respectively,, it is defeated herein
Entering signal can just can bear, whenPass through for timing, VD1 conductings, VD2 cut-offs, input voltage, pass through from amplifier U3 negative terminals,
Now, pass through, pass through from amplifier U1 negative terminals, output voltage, now on the occasion of.WhenDuring to bear,
VD2 is turned on, and VD1 cut-offs, input voltage passes through, pass through from amplifier U3 negative terminals, now, pass through, from
Amplifier U1 negative terminals pass through, output voltage, due toBe it is negative, nowFor on the occasion of wherein all resistances are all
It is identical, value 10k Ω.By two output signals of absolute value circuitWithThe first analog divider circuit is inputted respectively
'sWith, whereinPass throughInto amplifier U1,With Multiplication output resultAlso amplifier is entered
U1, wherein, pass through negative-feedback to output, wherein all resistances are 1k Ω.Again will
The output signal of first analog divider circuitWith the output signal of the first absolute value circuitThe simulation of input second respectively
Divider circuitWith, the output signal of the second analog divider circuitWith the output signal of the second absolute value circuitThe 3rd analog divider circuit is inputted respectivelyWith, obtained output signal is。
In four-quadrant analog multiplier circuit, by input signalAnode is connected with triode T1 with T4 base stage, willNegative terminal is connected with triode T2 with T3 base stage, input signalAnode is connected with triode T5 base stage,Negative terminal with
Triode T6 base stage is connected, and the negative terminal of output signal is connected with triode T1 with T3 transmitting collection, and output signal is just
End is connected with triode T2 with T4 transmitting collection.
By the output result of the 3rd analog divider circuitWith the input signal of the first absolute value circuitRespectively as
Two input signals of the first four-quadrant analog multiplier, final output signal.Then will output
SignalWith the input signal of the second absolute value circuitAs two input signals of the second four-quadrant analog multiplier, then
Using four-quadrant analog multiplier function, can obtain, i.e.,, realize two inputs
The result that signal is divided by.
Four-quadrant analog divider of the present utility model is not limited to the various embodiments described above, all to be obtained using equivalent substitution mode
To technical scheme all fall within the requires of the utility model protection in the range of.
Claims (4)
- A kind of 1. four-quadrant analog divider, for realizing that two analog quantitys are divided by, it is characterised in that：Including absolute value circuit, Analog divider circuit and four-quadrant analog multiplier circuit, the absolute value circuit are provided with two, respectively the first absolute value Circuit and the second absolute value circuit, analog divider circuit are provided with three, respectively the first analog divider circuit, the second simulation Divider circuit and the 3rd analog divider circuit, four-quadrant analog multiplier circuit are provided with two, respectively the first four-quadrant Analog multiplier circuit and the second four-quadrant analog multiplier circuit, the input of the first absolute value circuit and the second absolute value circuit End inputs two analog quantitys respectively, the output end of the first absolute value circuit and the second absolute value circuit respectively with the first simulation division Two inputs connection of device circuit, the output end of the first analog divider circuit and the output end difference of the first absolute value circuit It is connected with two inputs of the second analog divider circuit, the output end of the second analog divider circuit and the second absolute value electricity The output end on road is connected with two inputs of the 3rd analog divider circuit respectively, the first four-quadrant analog multiplier circuit One input is connected with the output end of the 3rd analog divider circuit, another input one analog quantity of input, and the two or four One input of quadrant analog multiplier circuit is connected with the output end of the first four-quadrant analog multiplier circuit, and another is defeated Enter end and input another analog quantity.
- 2. four-quadrant analog divider according to claim 1, it is characterised in that：The absolute value circuit includes resistance, two Pole pipe and chip 3554AM.
- 3. four-quadrant analog divider according to claim 1, it is characterised in that：The analog divider circuit includes electricity Resistance, chip 3554AM and multiplier chip MC1496.
- 4. four-quadrant analog divider according to claim 1, it is characterised in that：The four-quadrant analog multiplier circuit bag Include resistance, 1A current sources and chip 2N2219.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720434413.XU CN206711075U (en) | 2017-04-24 | 2017-04-24 | A kind of four-quadrant analog divider |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720434413.XU CN206711075U (en) | 2017-04-24 | 2017-04-24 | A kind of four-quadrant analog divider |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206711075U true CN206711075U (en) | 2017-12-05 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720434413.XU Expired - Fee Related CN206711075U (en) | 2017-04-24 | 2017-04-24 | A kind of four-quadrant analog divider |
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| Country | Link |
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| CN (1) | CN206711075U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116755655A (en) * | 2023-08-21 | 2023-09-15 | 深圳市芯茂微电子有限公司 | Multiplication and division arithmetic unit |
-
2017
- 2017-04-24 CN CN201720434413.XU patent/CN206711075U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116755655A (en) * | 2023-08-21 | 2023-09-15 | 深圳市芯茂微电子有限公司 | Multiplication and division arithmetic unit |
| CN116755655B (en) * | 2023-08-21 | 2023-10-17 | 深圳市芯茂微电子有限公司 | Multiplication and division arithmetic unit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171205 Termination date: 20190424 |
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| CF01 | Termination of patent right due to non-payment of annual fee |